cmd/internal/obj/ppc64: allow VR register arguments to VS registers
Likewise, reorder register numbers such that extended mnemonics which
use FPR arguments can be transparently encoded as a VSR argument for
the move to/from VSR class of instructions. Specifically, ensure the
following holds for all FPx and VRx constants: FPRx & 63 == x, and
VRx & 63 == x + 32.
This simplifies encoding machine instructions, and likewise helps
ppc64 assembly writers to avoid hokey workarounds when switching from
vector to vector-scalar register notation. Notably, many VSX
instructions are limited to vector operands due to encoding
restrictions.
Secondly, this explicitly rejects dubious usages of the m[tf]vsr
family of instructions which had previously been accepted.
* Reject two GPR arguments for non-MTVSRDD opcodes. These
have no defined behavior today, and may set RFU bits. e.g
MTVSRD R1, R2, VS1
* Reject FPR destinations for MTVSRDD, and only accept with two GPR
arguments. This copies two GPR values into either half of a VSR. e.g
MTVSRDD R1, R2, F1
MTVSRDD R1, F1
Change-Id: If13dd88c3791d1892dbd18ef0e34675a5285fff9
Reviewed-on: https://go-review.googlesource.com/c/go/+/342929
Run-TryBot: Paul Murphy <murp@ibm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Trust: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com>