[dev.typeparams] merge dev.regabi (618e3c1) into dev.typeparams

This involved a couple non-trivial fixes in go/types:
 - move the check for main function signature to resolver.go, to be
   consistent with init. Also, update uses of _InvalidInitSig to
   _InvalidInitDecl, consistent with what we decided for dev.regabi.
 - Update some tests in api_test.go which newly fail after CL 289715
   (fixing reporting of untyped nil) In all cases but one, these updates
   were consistent with types2. However, in one case types2 seems to be
   able to resolve more type information than go/types for a broken
   package. I left a TODO to investigate this further.

Change-Id: I8244b7c81654194edd5af8de689a13c262117dff

diff --git a/doc/go1.16.html b/doc/go1.16.html
index 8d31f63fa2a12eecd2f63b1e6e8694e1776925c9..878bf0d0293954705527215b9775fa3d28c185f8 100644 (file)
--- a/doc/go1.16.html
+++ b/doc/go1.16.html
@@ -364,6 +364,8 @@ func TestFoo(t *testing.T) {
 }
 </pre>
 
+<h4 id="vet-frame-pointer">New warning for frame pointer</h4>
+
 <p><!-- CL 248686, CL 276372 -->
   The vet tool now warns about amd64 assembly that clobbers the BP
   register (the frame pointer) without saving and restoring it,

diff --git a/src/cmd/asm/internal/arch/arch.go b/src/cmd/asm/internal/arch/arch.go
index a62e55191e6898d43efc4aef5030bf9df5aea1ac..026d8abf81305f51d953b500c35d3bd2d7c7a087 100644 (file)
--- a/src/cmd/asm/internal/arch/arch.go
+++ b/src/cmd/asm/internal/arch/arch.go
@@ -109,6 +109,10 @@ func archX86(linkArch *obj.LinkArch) *Arch {
        register["SB"] = RSB
        register["FP"] = RFP
        register["PC"] = RPC
+       if linkArch == &x86.Linkamd64 {
+               // Alias g to R14
+               register["g"] = x86.REGG
+       }
        // Register prefix not used on this architecture.
 
        instructions := make(map[string]obj.As)

diff --git a/src/cmd/asm/internal/asm/operand_test.go b/src/cmd/asm/internal/asm/operand_test.go
index 2e83e176b297cb5840944f7c3a6787370644ac97..c6def15e20eac16b07239ecca149ac03a66e0929 100644 (file)
--- a/src/cmd/asm/internal/asm/operand_test.go
+++ b/src/cmd/asm/internal/asm/operand_test.go
@@ -259,6 +259,7 @@ var amd64OperandTests = []operandTest{
        {"R15", "R15"},
        {"R8", "R8"},
        {"R9", "R9"},
+       {"g", "R14"},
        {"SI", "SI"},
        {"SP", "SP"},
        {"X0", "X0"},

diff --git a/src/cmd/compile/internal/amd64/ggen.go b/src/cmd/compile/internal/amd64/ggen.go
index dacdb07a3837dc5243acf8591b563105f98ca4c9..aefdb14a69b12e91afcc1ca2f2c6f525a9234645 100644 (file)
--- a/src/cmd/compile/internal/amd64/ggen.go
+++ b/src/cmd/compile/internal/amd64/ggen.go
@@ -22,8 +22,8 @@ var isPlan9 = objabi.GOOS == "plan9"
 const (
        dzBlocks    = 16 // number of MOV/ADD blocks
        dzBlockLen  = 4  // number of clears per block
-       dzBlockSize = 19 // size of instructions in a single block
-       dzMovSize   = 4  // size of single MOV instruction w/ offset
+       dzBlockSize = 23 // size of instructions in a single block
+       dzMovSize   = 5  // size of single MOV instruction w/ offset
        dzLeaqSize  = 4  // size of single LEAQ instruction
        dzClearStep = 16 // number of bytes cleared by each MOV instruction
 

diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go
index da355c49d1e2a5623d45d8d2142e7ea983aaec6d..4938e4b0e351983f640704df393ba11556a20a28 100644 (file)
--- a/src/cmd/compile/internal/amd64/ssa.go
+++ b/src/cmd/compile/internal/amd64/ssa.go
@@ -166,6 +166,34 @@ func duff(size int64) (int64, int64) {
        return off, adj
 }
 
+func getgFromTLS(s *ssagen.State, r int16) {
+       // See the comments in cmd/internal/obj/x86/obj6.go
+       // near CanUse1InsnTLS for a detailed explanation of these instructions.
+       if x86.CanUse1InsnTLS(base.Ctxt) {
+               // MOVQ (TLS), r
+               p := s.Prog(x86.AMOVQ)
+               p.From.Type = obj.TYPE_MEM
+               p.From.Reg = x86.REG_TLS
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = r
+       } else {
+               // MOVQ TLS, r
+               // MOVQ (r)(TLS*1), r
+               p := s.Prog(x86.AMOVQ)
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = x86.REG_TLS
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = r
+               q := s.Prog(x86.AMOVQ)
+               q.From.Type = obj.TYPE_MEM
+               q.From.Reg = r
+               q.From.Index = x86.REG_TLS
+               q.From.Scale = 1
+               q.To.Type = obj.TYPE_REG
+               q.To.Reg = r
+       }
+}
+
 func ssaGenValue(s *ssagen.State, v *ssa.Value) {
        switch v.Op {
        case ssa.OpAMD64VFMADD231SD:
@@ -813,6 +841,20 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                p.To.Type = obj.TYPE_MEM
                p.To.Reg = v.Args[0].Reg()
                ssagen.AddAux2(&p.To, v, sc.Off())
+       case ssa.OpAMD64MOVOstorezero:
+               if s.ABI != obj.ABIInternal {
+                       v.Fatalf("MOVOstorezero can be only used in ABIInternal functions")
+               }
+               if !base.Flag.ABIWrap {
+                       // zeroing X15 manually if wrappers are not used
+                       opregreg(s, x86.AXORPS, x86.REG_X15, x86.REG_X15)
+               }
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = x86.REG_X15
+               p.To.Type = obj.TYPE_MEM
+               p.To.Reg = v.Args[0].Reg()
+               ssagen.AddAux(&p.To, v)
        case ssa.OpAMD64MOVQstoreconstidx1, ssa.OpAMD64MOVQstoreconstidx8, ssa.OpAMD64MOVLstoreconstidx1, ssa.OpAMD64MOVLstoreconstidx4, ssa.OpAMD64MOVWstoreconstidx1, ssa.OpAMD64MOVWstoreconstidx2, ssa.OpAMD64MOVBstoreconstidx1,
                ssa.OpAMD64ADDLconstmodifyidx1, ssa.OpAMD64ADDLconstmodifyidx4, ssa.OpAMD64ADDLconstmodifyidx8, ssa.OpAMD64ADDQconstmodifyidx1, ssa.OpAMD64ADDQconstmodifyidx8,
                ssa.OpAMD64ANDLconstmodifyidx1, ssa.OpAMD64ANDLconstmodifyidx4, ssa.OpAMD64ANDLconstmodifyidx8, ssa.OpAMD64ANDQconstmodifyidx1, ssa.OpAMD64ANDQconstmodifyidx8,
@@ -900,6 +942,13 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                        v.Fatalf("input[0] and output not in same register %s", v.LongString())
                }
        case ssa.OpAMD64DUFFZERO:
+               if s.ABI != obj.ABIInternal {
+                       v.Fatalf("MOVOconst can be only used in ABIInternal functions")
+               }
+               if !base.Flag.ABIWrap {
+                       // zeroing X15 manually if wrappers are not used
+                       opregreg(s, x86.AXORPS, x86.REG_X15, x86.REG_X15)
+               }
                off := duffStart(v.AuxInt)
                adj := duffAdj(v.AuxInt)
                var p *obj.Prog
@@ -915,12 +964,6 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                p.To.Type = obj.TYPE_ADDR
                p.To.Sym = ir.Syms.Duffzero
                p.To.Offset = off
-       case ssa.OpAMD64MOVOconst:
-               if v.AuxInt != 0 {
-                       v.Fatalf("MOVOconst can only do constant=0")
-               }
-               r := v.Reg()
-               opregreg(s, x86.AXORPS, r, r)
        case ssa.OpAMD64DUFFCOPY:
                p := s.Prog(obj.ADUFFCOPY)
                p.To.Type = obj.TYPE_ADDR
@@ -974,33 +1017,26 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                // Closure pointer is DX.
                ssagen.CheckLoweredGetClosurePtr(v)
        case ssa.OpAMD64LoweredGetG:
+               if base.Flag.ABIWrap {
+                       v.Fatalf("LoweredGetG should not appear in new ABI")
+               }
                r := v.Reg()
-               // See the comments in cmd/internal/obj/x86/obj6.go
-               // near CanUse1InsnTLS for a detailed explanation of these instructions.
-               if x86.CanUse1InsnTLS(base.Ctxt) {
-                       // MOVQ (TLS), r
-                       p := s.Prog(x86.AMOVQ)
-                       p.From.Type = obj.TYPE_MEM
-                       p.From.Reg = x86.REG_TLS
-                       p.To.Type = obj.TYPE_REG
-                       p.To.Reg = r
-               } else {
-                       // MOVQ TLS, r
-                       // MOVQ (r)(TLS*1), r
-                       p := s.Prog(x86.AMOVQ)
-                       p.From.Type = obj.TYPE_REG
-                       p.From.Reg = x86.REG_TLS
-                       p.To.Type = obj.TYPE_REG
-                       p.To.Reg = r
-                       q := s.Prog(x86.AMOVQ)
-                       q.From.Type = obj.TYPE_MEM
-                       q.From.Reg = r
-                       q.From.Index = x86.REG_TLS
-                       q.From.Scale = 1
-                       q.To.Type = obj.TYPE_REG
-                       q.To.Reg = r
+               getgFromTLS(s, r)
+       case ssa.OpAMD64CALLstatic:
+               if s.ABI == obj.ABI0 && v.Aux.(*ssa.AuxCall).Fn.ABI() == obj.ABIInternal {
+                       // zeroing X15 when entering ABIInternal from ABI0
+                       opregreg(s, x86.AXORPS, x86.REG_X15, x86.REG_X15)
+                       // set G register from TLS
+                       getgFromTLS(s, x86.REG_R14)
+               }
+               s.Call(v)
+               if s.ABI == obj.ABIInternal && v.Aux.(*ssa.AuxCall).Fn.ABI() == obj.ABI0 {
+                       // zeroing X15 when entering ABIInternal from ABI0
+                       opregreg(s, x86.AXORPS, x86.REG_X15, x86.REG_X15)
+                       // set G register from TLS
+                       getgFromTLS(s, x86.REG_R14)
                }
-       case ssa.OpAMD64CALLstatic, ssa.OpAMD64CALLclosure, ssa.OpAMD64CALLinter:
+       case ssa.OpAMD64CALLclosure, ssa.OpAMD64CALLinter:
                s.Call(v)
 
        case ssa.OpAMD64LoweredGetCallerPC:
@@ -1297,6 +1333,12 @@ func ssaGenBlock(s *ssagen.State, b, next *ssa.Block) {
        case ssa.BlockRet:
                s.Prog(obj.ARET)
        case ssa.BlockRetJmp:
+               if s.ABI == obj.ABI0 && b.Aux.(*obj.LSym).ABI() == obj.ABIInternal {
+                       // zeroing X15 when entering ABIInternal from ABI0
+                       opregreg(s, x86.AXORPS, x86.REG_X15, x86.REG_X15)
+                       // set G register from TLS
+                       getgFromTLS(s, x86.REG_R14)
+               }
                p := s.Prog(obj.ARET)
                p.To.Type = obj.TYPE_MEM
                p.To.Name = obj.NAME_EXTERN

diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go
index e952c73d9b487dd5ed06b96671defa0529c1daf0..c29bc8fae6f70bf0a7cca248b2730f68f40bc586 100644 (file)
--- a/src/cmd/compile/internal/ssa/config.go
+++ b/src/cmd/compile/internal/ssa/config.go
@@ -5,6 +5,7 @@
 package ssa
 
 import (
+       "cmd/compile/internal/base"
        "cmd/compile/internal/ir"
        "cmd/compile/internal/types"
        "cmd/internal/obj"
@@ -194,9 +195,10 @@ func NewConfig(arch string, types Types, ctxt *obj.Link, optimize bool) *Config
                c.registers = registersAMD64[:]
                c.gpRegMask = gpRegMaskAMD64
                c.fpRegMask = fpRegMaskAMD64
+               c.specialRegMask = specialRegMaskAMD64
                c.FPReg = framepointerRegAMD64
                c.LinkReg = linkRegAMD64
-               c.hasGReg = false
+               c.hasGReg = base.Flag.ABIWrap
        case "386":
                c.PtrSize = 4
                c.RegSize = 4

diff --git a/src/cmd/compile/internal/ssa/gen/AMD64.rules b/src/cmd/compile/internal/ssa/gen/AMD64.rules
index 7d46266411fce4af915f6fa2426dd1db73054fb2..3c75bcfa05f61f8974d60b5c7051685f72d7e0c6 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/AMD64.rules
+++ b/src/cmd/compile/internal/ssa/gen/AMD64.rules
@@ -361,31 +361,31 @@
 // Adjust zeros to be a multiple of 16 bytes.
 (Zero [s] destptr mem) && s%16 != 0 && s > 16 && s%16 > 8 && config.useSSE =>
        (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16])
-               (MOVOstore destptr (MOVOconst [0]) mem))
+               (MOVOstorezero destptr mem))
 
 (Zero [s] destptr mem) && s%16 != 0 && s > 16 && s%16 <= 8 && config.useSSE =>
        (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16])
                (MOVQstoreconst [makeValAndOff32(0,0)] destptr mem))
 
 (Zero [16] destptr mem) && config.useSSE =>
-       (MOVOstore destptr (MOVOconst [0]) mem)
+       (MOVOstorezero destptr mem)
 (Zero [32] destptr mem) && config.useSSE =>
-       (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0])
-               (MOVOstore destptr (MOVOconst [0]) mem))
+       (MOVOstorezero (OffPtr <destptr.Type> destptr [16])
+               (MOVOstorezero destptr mem))
 (Zero [48] destptr mem) && config.useSSE =>
-       (MOVOstore (OffPtr <destptr.Type> destptr [32]) (MOVOconst [0])
-               (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0])
-                       (MOVOstore destptr (MOVOconst [0]) mem)))
+       (MOVOstorezero (OffPtr <destptr.Type> destptr [32])
+               (MOVOstorezero (OffPtr <destptr.Type> destptr [16])
+                       (MOVOstorezero destptr mem)))
 (Zero [64] destptr mem) && config.useSSE =>
-       (MOVOstore (OffPtr <destptr.Type> destptr [48]) (MOVOconst [0])
-               (MOVOstore (OffPtr <destptr.Type> destptr [32]) (MOVOconst [0])
-                       (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0])
-                               (MOVOstore destptr (MOVOconst [0]) mem))))
+       (MOVOstorezero (OffPtr <destptr.Type> destptr [48])
+               (MOVOstorezero (OffPtr <destptr.Type> destptr [32])
+                       (MOVOstorezero (OffPtr <destptr.Type> destptr [16])
+                               (MOVOstorezero destptr mem))))
 
 // Medium zeroing uses a duff device.
 (Zero [s] destptr mem)
        && s > 64 && s <= 1024 && s%16 == 0 && !config.noDuffDevice =>
-       (DUFFZERO [s] destptr (MOVOconst [0]) mem)
+       (DUFFZERO [s] destptr mem)
 
 // Large zeroing uses REP STOSQ.
 (Zero [s] destptr mem)
@@ -459,7 +459,7 @@
 (IsInBounds idx len) => (SETB (CMPQ idx len))
 (IsSliceInBounds idx len) => (SETBE (CMPQ idx len))
 (NilCheck ...) => (LoweredNilCheck ...)
-(GetG ...) => (LoweredGetG ...)
+(GetG mem) && !base.Flag.ABIWrap => (LoweredGetG mem) // only lower in old ABI. in new ABI we have a G register.
 (GetClosurePtr ...) => (LoweredGetClosurePtr ...)
 (GetCallerPC ...) => (LoweredGetCallerPC ...)
 (GetCallerSP ...) => (LoweredGetCallerSP ...)
@@ -1900,7 +1900,7 @@
   && c.Val() == 0
   && c2.Val() == 0
   && clobber(x)
-  => (MOVOstore [c2.Off32()] {s} p (MOVOconst [0]) mem)
+  => (MOVOstorezero [c2.Off32()] {s} p mem)
 
 // Combine stores into larger (unaligned) stores. Little endian.
 (MOVBstore [i] {s} p (SHR(W|L|Q)const [8] w) x:(MOVBstore [i-1] {s} p w mem))

diff --git a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
index de5372670b3657981b605d3d75928dd74c2cda06..043162e544e5e5e944c3c7f5df88d52c1a25f4ae 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
@@ -44,7 +44,7 @@ var regNamesAMD64 = []string{
        "R11",
        "R12",
        "R13",
-       "R14",
+       "g", // a.k.a. R14
        "R15",
        "X0",
        "X1",
@@ -61,7 +61,7 @@ var regNamesAMD64 = []string{
        "X12",
        "X13",
        "X14",
-       "X15",
+       "X15", // constant 0 in ABIInternal
 
        // If you add registers, update asyncPreempt in runtime
 
@@ -96,11 +96,14 @@ func init() {
                cx         = buildReg("CX")
                dx         = buildReg("DX")
                bx         = buildReg("BX")
-               gp         = buildReg("AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15")
-               fp         = buildReg("X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15")
+               gp         = buildReg("AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15")
+               g          = buildReg("g")
+               fp         = buildReg("X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14")
+               x15        = buildReg("X15")
                gpsp       = gp | buildReg("SP")
                gpspsb     = gpsp | buildReg("SB")
-               callerSave = gp | fp
+               gpspsbg    = gpspsb | g
+               callerSave = gp | fp | g // runtime.setg (and anything calling it) may clobber g
        )
        // Common slices of register masks
        var (
@@ -113,10 +116,10 @@ func init() {
                gp01           = regInfo{inputs: nil, outputs: gponly}
                gp11           = regInfo{inputs: []regMask{gp}, outputs: gponly}
                gp11sp         = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
-               gp11sb         = regInfo{inputs: []regMask{gpspsb}, outputs: gponly}
+               gp11sb         = regInfo{inputs: []regMask{gpspsbg}, outputs: gponly}
                gp21           = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
                gp21sp         = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
-               gp21sb         = regInfo{inputs: []regMask{gpspsb, gpsp}, outputs: gponly}
+               gp21sb         = regInfo{inputs: []regMask{gpspsbg, gpsp}, outputs: gponly}
                gp21shift      = regInfo{inputs: []regMask{gp, cx}, outputs: []regMask{gp}}
                gp11div        = regInfo{inputs: []regMask{ax, gpsp &^ dx}, outputs: []regMask{ax, dx}}
                gp21hmul       = regInfo{inputs: []regMask{ax, gpsp}, outputs: []regMask{dx}, clobbers: ax}
@@ -125,9 +128,9 @@ func init() {
 
                gp2flags     = regInfo{inputs: []regMask{gpsp, gpsp}}
                gp1flags     = regInfo{inputs: []regMask{gpsp}}
-               gp0flagsLoad = regInfo{inputs: []regMask{gpspsb, 0}}
-               gp1flagsLoad = regInfo{inputs: []regMask{gpspsb, gpsp, 0}}
-               gp2flagsLoad = regInfo{inputs: []regMask{gpspsb, gpsp, gpsp, 0}}
+               gp0flagsLoad = regInfo{inputs: []regMask{gpspsbg, 0}}
+               gp1flagsLoad = regInfo{inputs: []regMask{gpspsbg, gpsp, 0}}
+               gp2flagsLoad = regInfo{inputs: []regMask{gpspsbg, gpsp, gpsp, 0}}
                flagsgp      = regInfo{inputs: nil, outputs: gponly}
 
                gp11flags      = regInfo{inputs: []regMask{gp}, outputs: []regMask{gp, 0}}
@@ -136,24 +139,24 @@ func init() {
                readflags = regInfo{inputs: nil, outputs: gponly}
                flagsgpax = regInfo{inputs: nil, clobbers: ax, outputs: []regMask{gp &^ ax}}
 
-               gpload      = regInfo{inputs: []regMask{gpspsb, 0}, outputs: gponly}
-               gp21load    = regInfo{inputs: []regMask{gp, gpspsb, 0}, outputs: gponly}
-               gploadidx   = regInfo{inputs: []regMask{gpspsb, gpsp, 0}, outputs: gponly}
-               gp21loadidx = regInfo{inputs: []regMask{gp, gpspsb, gpsp, 0}, outputs: gponly}
+               gpload      = regInfo{inputs: []regMask{gpspsbg, 0}, outputs: gponly}
+               gp21load    = regInfo{inputs: []regMask{gp, gpspsbg, 0}, outputs: gponly}
+               gploadidx   = regInfo{inputs: []regMask{gpspsbg, gpsp, 0}, outputs: gponly}
+               gp21loadidx = regInfo{inputs: []regMask{gp, gpspsbg, gpsp, 0}, outputs: gponly}
                gp21pax     = regInfo{inputs: []regMask{gp &^ ax, gp}, outputs: []regMask{gp &^ ax}, clobbers: ax}
 
-               gpstore         = regInfo{inputs: []regMask{gpspsb, gpsp, 0}}
-               gpstoreconst    = regInfo{inputs: []regMask{gpspsb, 0}}
-               gpstoreidx      = regInfo{inputs: []regMask{gpspsb, gpsp, gpsp, 0}}
-               gpstoreconstidx = regInfo{inputs: []regMask{gpspsb, gpsp, 0}}
-               gpstorexchg     = regInfo{inputs: []regMask{gp, gpspsb, 0}, outputs: []regMask{gp}}
+               gpstore         = regInfo{inputs: []regMask{gpspsbg, gpsp, 0}}
+               gpstoreconst    = regInfo{inputs: []regMask{gpspsbg, 0}}
+               gpstoreidx      = regInfo{inputs: []regMask{gpspsbg, gpsp, gpsp, 0}}
+               gpstoreconstidx = regInfo{inputs: []regMask{gpspsbg, gpsp, 0}}
+               gpstorexchg     = regInfo{inputs: []regMask{gp, gpspsbg, 0}, outputs: []regMask{gp}}
                cmpxchg         = regInfo{inputs: []regMask{gp, ax, gp, 0}, outputs: []regMask{gp, 0}, clobbers: ax}
 
                fp01        = regInfo{inputs: nil, outputs: fponly}
                fp21        = regInfo{inputs: []regMask{fp, fp}, outputs: fponly}
                fp31        = regInfo{inputs: []regMask{fp, fp, fp}, outputs: fponly}
-               fp21load    = regInfo{inputs: []regMask{fp, gpspsb, 0}, outputs: fponly}
-               fp21loadidx = regInfo{inputs: []regMask{fp, gpspsb, gpspsb, 0}, outputs: fponly}
+               fp21load    = regInfo{inputs: []regMask{fp, gpspsbg, 0}, outputs: fponly}
+               fp21loadidx = regInfo{inputs: []regMask{fp, gpspsbg, gpspsb, 0}, outputs: fponly}
                fpgp        = regInfo{inputs: fponly, outputs: gponly}
                gpfp        = regInfo{inputs: gponly, outputs: fponly}
                fp11        = regInfo{inputs: fponly, outputs: fponly}
@@ -684,19 +687,20 @@ func init() {
                // Note: LEAx{1,2,4,8} must not have OpSB as either argument.
 
                // auxint+aux == add auxint and the offset of the symbol in aux (if any) to the effective address
-               {name: "MOVBload", argLength: 2, reg: gpload, asm: "MOVBLZX", aux: "SymOff", typ: "UInt8", faultOnNilArg0: true, symEffect: "Read"},  // load byte from arg0+auxint+aux. arg1=mem.  Zero extend.
-               {name: "MOVBQSXload", argLength: 2, reg: gpload, asm: "MOVBQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},             // ditto, sign extend to int64
-               {name: "MOVWload", argLength: 2, reg: gpload, asm: "MOVWLZX", aux: "SymOff", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"}, // load 2 bytes from arg0+auxint+aux. arg1=mem.  Zero extend.
-               {name: "MOVWQSXload", argLength: 2, reg: gpload, asm: "MOVWQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},             // ditto, sign extend to int64
-               {name: "MOVLload", argLength: 2, reg: gpload, asm: "MOVL", aux: "SymOff", typ: "UInt32", faultOnNilArg0: true, symEffect: "Read"},    // load 4 bytes from arg0+auxint+aux. arg1=mem.  Zero extend.
-               {name: "MOVLQSXload", argLength: 2, reg: gpload, asm: "MOVLQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},             // ditto, sign extend to int64
-               {name: "MOVQload", argLength: 2, reg: gpload, asm: "MOVQ", aux: "SymOff", typ: "UInt64", faultOnNilArg0: true, symEffect: "Read"},    // load 8 bytes from arg0+auxint+aux. arg1=mem
-               {name: "MOVBstore", argLength: 3, reg: gpstore, asm: "MOVB", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},    // store byte in arg1 to arg0+auxint+aux. arg2=mem
-               {name: "MOVWstore", argLength: 3, reg: gpstore, asm: "MOVW", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},    // store 2 bytes in arg1 to arg0+auxint+aux. arg2=mem
-               {name: "MOVLstore", argLength: 3, reg: gpstore, asm: "MOVL", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},    // store 4 bytes in arg1 to arg0+auxint+aux. arg2=mem
-               {name: "MOVQstore", argLength: 3, reg: gpstore, asm: "MOVQ", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},    // store 8 bytes in arg1 to arg0+auxint+aux. arg2=mem
-               {name: "MOVOload", argLength: 2, reg: fpload, asm: "MOVUPS", aux: "SymOff", typ: "Int128", faultOnNilArg0: true, symEffect: "Read"},  // load 16 bytes from arg0+auxint+aux. arg1=mem
-               {name: "MOVOstore", argLength: 3, reg: fpstore, asm: "MOVUPS", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},  // store 16 bytes in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVBload", argLength: 2, reg: gpload, asm: "MOVBLZX", aux: "SymOff", typ: "UInt8", faultOnNilArg0: true, symEffect: "Read"},                                   // load byte from arg0+auxint+aux. arg1=mem.  Zero extend.
+               {name: "MOVBQSXload", argLength: 2, reg: gpload, asm: "MOVBQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},                                              // ditto, sign extend to int64
+               {name: "MOVWload", argLength: 2, reg: gpload, asm: "MOVWLZX", aux: "SymOff", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"},                                  // load 2 bytes from arg0+auxint+aux. arg1=mem.  Zero extend.
+               {name: "MOVWQSXload", argLength: 2, reg: gpload, asm: "MOVWQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},                                              // ditto, sign extend to int64
+               {name: "MOVLload", argLength: 2, reg: gpload, asm: "MOVL", aux: "SymOff", typ: "UInt32", faultOnNilArg0: true, symEffect: "Read"},                                     // load 4 bytes from arg0+auxint+aux. arg1=mem.  Zero extend.
+               {name: "MOVLQSXload", argLength: 2, reg: gpload, asm: "MOVLQSX", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},                                              // ditto, sign extend to int64
+               {name: "MOVQload", argLength: 2, reg: gpload, asm: "MOVQ", aux: "SymOff", typ: "UInt64", faultOnNilArg0: true, symEffect: "Read"},                                     // load 8 bytes from arg0+auxint+aux. arg1=mem
+               {name: "MOVBstore", argLength: 3, reg: gpstore, asm: "MOVB", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},                                     // store byte in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVWstore", argLength: 3, reg: gpstore, asm: "MOVW", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},                                     // store 2 bytes in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVLstore", argLength: 3, reg: gpstore, asm: "MOVL", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},                                     // store 4 bytes in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVQstore", argLength: 3, reg: gpstore, asm: "MOVQ", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},                                     // store 8 bytes in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVOload", argLength: 2, reg: fpload, asm: "MOVUPS", aux: "SymOff", typ: "Int128", faultOnNilArg0: true, symEffect: "Read"},                                   // load 16 bytes from arg0+auxint+aux. arg1=mem
+               {name: "MOVOstore", argLength: 3, reg: fpstore, asm: "MOVUPS", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"},                                   // store 16 bytes in arg1 to arg0+auxint+aux. arg2=mem
+               {name: "MOVOstorezero", argLength: 2, reg: regInfo{inputs: []regMask{gpspsb, 0}}, asm: "MOVUPS", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 16 bytes of zero to arg0+auxint+aux. arg1=mem
 
                // indexed loads/stores
                {name: "MOVBloadidx1", argLength: 3, reg: gploadidx, commutative: true, asm: "MOVBLZX", scale: 1, aux: "SymOff", typ: "UInt8", symEffect: "Read"},  // load a byte from arg0+arg1+auxint+aux. arg2=mem
@@ -735,22 +739,20 @@ func init() {
                {name: "MOVQstoreconstidx8", argLength: 3, reg: gpstoreconstidx, asm: "MOVQ", scale: 8, aux: "SymValAndOff", typ: "Mem", symEffect: "Write"},                    // store 8 bytes of ... 8*arg1 ...
 
                // arg0 = pointer to start of memory to zero
-               // arg1 = value to store (will always be zero)
-               // arg2 = mem
+               // arg1 = mem
                // auxint = # of bytes to zero
                // returns mem
                {
                        name:      "DUFFZERO",
                        aux:       "Int64",
-                       argLength: 3,
+                       argLength: 2,
                        reg: regInfo{
-                               inputs:   []regMask{buildReg("DI"), buildReg("X0")},
+                               inputs:   []regMask{buildReg("DI")},
                                clobbers: buildReg("DI"),
                        },
                        faultOnNilArg0: true,
                        unsafePoint:    true, // FP maintenance around DUFFCOPY can be clobbered by interrupts
                },
-               {name: "MOVOconst", reg: regInfo{nil, 0, []regMask{fp}}, typ: "Int128", aux: "Int128", rematerializeable: true},
 
                // arg0 = address of memory to zero
                // arg1 = # of 8-byte words to zero
@@ -830,7 +832,7 @@ func init() {
                {name: "LoweredNilCheck", argLength: 2, reg: regInfo{inputs: []regMask{gpsp}}, clobberFlags: true, nilCheck: true, faultOnNilArg0: true},
                // LoweredWB invokes runtime.gcWriteBarrier. arg0=destptr, arg1=srcptr, arg2=mem, aux=runtime.gcWriteBarrier
                // It saves all GP registers if necessary, but may clobber others.
-               {name: "LoweredWB", argLength: 3, reg: regInfo{inputs: []regMask{buildReg("DI"), buildReg("AX CX DX BX BP SI R8 R9")}, clobbers: callerSave &^ gp}, clobberFlags: true, aux: "Sym", symEffect: "None"},
+               {name: "LoweredWB", argLength: 3, reg: regInfo{inputs: []regMask{buildReg("DI"), buildReg("AX CX DX BX BP SI R8 R9")}, clobbers: callerSave &^ (gp | g)}, clobberFlags: true, aux: "Sym", symEffect: "None"},
 
                {name: "LoweredHasCPUFeature", argLength: 0, reg: gp01, rematerializeable: true, typ: "UInt64", aux: "Sym", symEffect: "None"},
 
@@ -935,6 +937,7 @@ func init() {
                regnames:        regNamesAMD64,
                gpregmask:       gp,
                fpregmask:       fp,
+               specialregmask:  x15,
                framepointerreg: int8(num["BP"]),
                linkreg:         -1, // not used
        })

diff --git a/src/cmd/compile/internal/ssa/gen/rulegen.go b/src/cmd/compile/internal/ssa/gen/rulegen.go
index aaf9101368fcf6e75315c678ca898facfa5c0122..6388aab3621b902ec73d221150332385d5907f64 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/rulegen.go
+++ b/src/cmd/compile/internal/ssa/gen/rulegen.go
@@ -582,6 +582,7 @@ func fprint(w io.Writer, n Node) {
                        "math",
                        "cmd/internal/obj",
                        "cmd/internal/objabi",
+                       "cmd/compile/internal/base",
                        "cmd/compile/internal/types",
                }, n.Arch.imports...) {
                        fmt.Fprintf(w, "import %q\n", path)

diff --git a/src/cmd/compile/internal/ssa/op.go b/src/cmd/compile/internal/ssa/op.go
index c64b145107e23adae26a245455a0f88da671bc3b..f41d014d4138d18444edbdf4757bf4a54edd107b 100644 (file)
--- a/src/cmd/compile/internal/ssa/op.go
+++ b/src/cmd/compile/internal/ssa/op.go
@@ -202,9 +202,9 @@ func ClosureAuxCall(args []Param, results []Param) *AuxCall {
 func (*AuxCall) CanBeAnSSAAux() {}
 
 // OwnAuxCall returns a function's own AuxCall
-func OwnAuxCall(args []Param, results []Param) *AuxCall {
+func OwnAuxCall(fn *obj.LSym, args []Param, results []Param) *AuxCall {
        // TODO if this remains identical to ClosureAuxCall above after new ABI is done, should deduplicate.
-       return &AuxCall{Fn: nil, args: args, results: results}
+       return &AuxCall{Fn: fn, args: args, results: results}
 }
 
 const (

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index e590f6ba5d990a05837f58bdc77277c97e519fac..ccfed93475ddb78e6333e6bbac9fe5bfa12ab980 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -970,6 +970,7 @@ const (
        OpAMD64MOVQstore
        OpAMD64MOVOload
        OpAMD64MOVOstore
+       OpAMD64MOVOstorezero
        OpAMD64MOVBloadidx1
        OpAMD64MOVWloadidx1
        OpAMD64MOVWloadidx2
@@ -998,7 +999,6 @@ const (
        OpAMD64MOVQstoreconstidx1
        OpAMD64MOVQstoreconstidx8
        OpAMD64DUFFZERO
-       OpAMD64MOVOconst
        OpAMD64REPSTOSQ
        OpAMD64CALLstatic
        OpAMD64CALLclosure
@@ -6162,11 +6162,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6178,11 +6178,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6193,11 +6193,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6208,11 +6208,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6224,11 +6224,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AMULSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6240,11 +6240,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AMULSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6255,11 +6255,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ADIVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6270,11 +6270,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ADIVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6287,10 +6287,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6303,10 +6303,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6318,7 +6318,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.AMOVSS,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6330,7 +6330,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.AMOVSD,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6343,11 +6343,11 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6360,11 +6360,11 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6377,11 +6377,11 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6394,11 +6394,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6411,8 +6411,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6425,8 +6425,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6439,9 +6439,9 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6454,9 +6454,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6469,9 +6469,9 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6484,9 +6484,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6500,11 +6500,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6518,11 +6518,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6536,11 +6536,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6554,11 +6554,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6572,11 +6572,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMULSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6590,11 +6590,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMULSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6608,11 +6608,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ADIVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6626,11 +6626,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ADIVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6644,12 +6644,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6663,12 +6663,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6682,12 +6682,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6701,12 +6701,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6720,12 +6720,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6739,12 +6739,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6758,12 +6758,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6777,12 +6777,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6796,12 +6796,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6815,12 +6815,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6834,12 +6834,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6853,12 +6853,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6872,12 +6872,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6891,12 +6891,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6910,12 +6910,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6929,12 +6929,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
-                               {2, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -6946,11 +6946,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -6962,11 +6962,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -6978,10 +6978,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -6993,10 +6993,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7010,7 +7010,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7024,7 +7024,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7036,11 +7036,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7052,11 +7052,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7069,10 +7069,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7085,10 +7085,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7101,11 +7101,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AIMULQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7118,11 +7118,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AIMULL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7134,10 +7134,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AIMUL3Q,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7149,10 +7149,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AIMUL3L,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7165,7 +7165,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 4, // DX
                        outputs: []outputInfo{
@@ -7183,7 +7183,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 4, // DX
                        outputs: []outputInfo{
@@ -7200,7 +7200,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
@@ -7216,7 +7216,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
@@ -7232,7 +7232,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
@@ -7248,7 +7248,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
@@ -7264,11 +7264,11 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7281,7 +7281,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7298,7 +7298,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7315,7 +7315,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7331,7 +7331,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7347,7 +7347,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7363,7 +7363,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65531}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7378,11 +7378,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ANEGL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7394,12 +7394,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7411,12 +7411,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7428,11 +7428,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7444,11 +7444,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AADCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7459,12 +7459,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7475,12 +7475,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASBBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7492,11 +7492,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7508,11 +7508,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASBBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7525,7 +7525,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1},     // AX
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 4}, // DX
@@ -7542,7 +7542,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {0, 4},     // DX
                                {1, 1},     // AX
-                               {2, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {2, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {0, 1}, // AX
@@ -7559,11 +7559,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7576,11 +7576,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7593,10 +7593,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7609,10 +7609,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7626,7 +7626,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7640,7 +7640,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7653,11 +7653,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7670,11 +7670,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7687,10 +7687,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7703,10 +7703,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7720,7 +7720,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7734,7 +7734,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7747,11 +7747,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7764,11 +7764,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7781,10 +7781,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7797,10 +7797,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7814,7 +7814,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7828,7 +7828,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7838,8 +7838,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7849,8 +7849,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7860,8 +7860,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7871,8 +7871,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7883,7 +7883,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7894,7 +7894,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7905,7 +7905,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7916,7 +7916,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -7929,8 +7929,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7943,8 +7943,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7957,8 +7957,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7971,8 +7971,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7985,7 +7985,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7998,7 +7998,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8011,7 +8011,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8024,7 +8024,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8037,9 +8037,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8053,9 +8053,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8068,9 +8068,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8084,9 +8084,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8099,9 +8099,9 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8115,9 +8115,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8131,9 +8131,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8146,8 +8146,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8161,8 +8161,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8175,8 +8175,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8190,8 +8190,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8204,8 +8204,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8219,8 +8219,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8234,8 +8234,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8245,8 +8245,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AUCOMISS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -8256,8 +8256,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AUCOMISD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -8267,8 +8267,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ABTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8278,8 +8278,8 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ABTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8291,11 +8291,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTCL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8307,11 +8307,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8323,11 +8323,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8339,11 +8339,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8355,11 +8355,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTSL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8371,11 +8371,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8386,7 +8386,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ABTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8397,7 +8397,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ABTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8410,10 +8410,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTCL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8426,10 +8426,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8442,10 +8442,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8458,10 +8458,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8474,10 +8474,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTSL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8490,10 +8490,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABTSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8507,8 +8507,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8522,8 +8522,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTCL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8537,8 +8537,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8552,8 +8552,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTSL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8567,8 +8567,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8582,8 +8582,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8597,7 +8597,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8611,7 +8611,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTCL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8625,7 +8625,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8639,7 +8639,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTSL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8653,7 +8653,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8667,7 +8667,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8678,8 +8678,8 @@ var opcodeTable = [...]opInfo{
                asm:         x86.ATESTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8690,8 +8690,8 @@ var opcodeTable = [...]opInfo{
                asm:         x86.ATESTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8702,8 +8702,8 @@ var opcodeTable = [...]opInfo{
                asm:         x86.ATESTW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8714,8 +8714,8 @@ var opcodeTable = [...]opInfo{
                asm:         x86.ATESTB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8726,7 +8726,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ATESTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8737,7 +8737,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ATESTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8748,7 +8748,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ATESTW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8759,7 +8759,7 @@ var opcodeTable = [...]opInfo{
                asm:     x86.ATESTB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8772,10 +8772,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8788,10 +8788,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8804,10 +8804,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8820,10 +8820,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHLL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8836,10 +8836,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8852,10 +8852,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8868,10 +8868,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8884,10 +8884,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8900,10 +8900,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8916,10 +8916,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8932,10 +8932,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8948,10 +8948,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASHRB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8964,10 +8964,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8980,10 +8980,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -8996,10 +8996,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9012,10 +9012,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9028,10 +9028,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASARQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9044,10 +9044,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASARL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9060,10 +9060,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASARW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9076,10 +9076,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ASARB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9092,10 +9092,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9108,10 +9108,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9124,10 +9124,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9140,10 +9140,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9156,10 +9156,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9172,10 +9172,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9188,10 +9188,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9204,10 +9204,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 2},     // CX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9220,10 +9220,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9236,10 +9236,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AROLL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9252,10 +9252,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AROLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9268,10 +9268,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AROLB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9286,11 +9286,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9305,11 +9305,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9324,11 +9324,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9343,11 +9343,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9362,11 +9362,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9381,11 +9381,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9400,11 +9400,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9419,11 +9419,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9438,11 +9438,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9457,11 +9457,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9476,12 +9476,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9496,12 +9496,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9516,12 +9516,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9536,12 +9536,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9556,12 +9556,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9576,12 +9576,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9596,12 +9596,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9616,12 +9616,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9636,12 +9636,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9656,12 +9656,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9676,12 +9676,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9696,12 +9696,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9716,12 +9716,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9736,12 +9736,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9756,12 +9756,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9776,12 +9776,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9796,12 +9796,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9816,12 +9816,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9836,12 +9836,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9856,12 +9856,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9876,12 +9876,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9896,12 +9896,12 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9916,12 +9916,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9936,12 +9936,12 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9956,12 +9956,12 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -9975,8 +9975,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -9990,8 +9990,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10005,8 +10005,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10020,8 +10020,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10035,8 +10035,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10050,8 +10050,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10065,8 +10065,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10080,8 +10080,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10095,8 +10095,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10110,8 +10110,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10125,9 +10125,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10141,9 +10141,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10157,9 +10157,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10173,9 +10173,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10189,9 +10189,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10205,9 +10205,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10221,9 +10221,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10237,9 +10237,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10253,9 +10253,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10269,9 +10269,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10285,9 +10285,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10301,9 +10301,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10317,9 +10317,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10333,9 +10333,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10349,9 +10349,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10365,9 +10365,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10381,9 +10381,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10397,9 +10397,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10413,9 +10413,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10429,9 +10429,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10445,9 +10445,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10461,9 +10461,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10477,9 +10477,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10493,9 +10493,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10509,9 +10509,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10525,8 +10525,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10540,8 +10540,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10555,8 +10555,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10570,8 +10570,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10585,8 +10585,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10600,8 +10600,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10615,8 +10615,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10630,8 +10630,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10645,8 +10645,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10660,8 +10660,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10675,8 +10675,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10690,8 +10690,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10705,8 +10705,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10720,8 +10720,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10735,8 +10735,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10750,8 +10750,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10765,8 +10765,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10780,8 +10780,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10795,8 +10795,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10810,8 +10810,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10823,10 +10823,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ANEGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10838,10 +10838,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ANEGL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10853,10 +10853,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ANOTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10868,10 +10868,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ANOTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10881,11 +10881,11 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ABSFQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10896,10 +10896,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABSFL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10909,11 +10909,11 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ABSRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10924,10 +10924,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABSRL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10938,11 +10938,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10953,11 +10953,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10968,11 +10968,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10983,11 +10983,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -10998,11 +10998,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11013,11 +11013,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11028,11 +11028,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQLS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11043,11 +11043,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11058,11 +11058,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11073,11 +11073,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQCS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11088,11 +11088,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11103,11 +11103,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11118,11 +11118,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11133,11 +11133,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11148,11 +11148,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11163,11 +11163,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11178,11 +11178,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLLS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11193,11 +11193,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11208,11 +11208,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11223,11 +11223,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLCS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11238,11 +11238,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11253,11 +11253,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11268,11 +11268,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11283,11 +11283,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11298,11 +11298,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11313,11 +11313,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11328,11 +11328,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWLS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11343,11 +11343,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11358,11 +11358,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11373,11 +11373,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWCS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11388,12 +11388,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11404,11 +11404,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11419,11 +11419,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11434,11 +11434,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVQCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11449,12 +11449,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11465,11 +11465,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11480,11 +11480,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11495,11 +11495,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVLCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11510,12 +11510,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11526,11 +11526,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11541,11 +11541,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11556,11 +11556,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ACMOVWCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11572,10 +11572,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABSWAPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11587,10 +11587,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.ABSWAPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11601,10 +11601,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.APOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11615,10 +11615,10 @@ var opcodeTable = [...]opInfo{
                asm:          x86.APOPCNTL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11628,10 +11628,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASQRTSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -11642,10 +11642,10 @@ var opcodeTable = [...]opInfo{
                asm:     x86.AROUNDSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -11656,12 +11656,12 @@ var opcodeTable = [...]opInfo{
                asm:          x86.AVFMADD231SD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {2, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -11671,7 +11671,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASBBQ,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11681,7 +11681,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASBBL,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11691,7 +11691,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETEQ,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11701,7 +11701,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETNE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11711,7 +11711,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETLT,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11721,7 +11721,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETLE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11731,7 +11731,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETGT,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11741,7 +11741,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETGE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11751,7 +11751,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETCS,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11761,7 +11761,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETLS,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11771,7 +11771,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETHI,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11781,7 +11781,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETCC,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11791,7 +11791,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETOS,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11804,7 +11804,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11817,7 +11817,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11830,7 +11830,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11843,7 +11843,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11856,7 +11856,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11869,7 +11869,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11882,7 +11882,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETCS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11895,7 +11895,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11908,7 +11908,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11921,7 +11921,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11933,7 +11933,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        clobbers: 1, // AX
                        outputs: []outputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11945,7 +11945,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        clobbers: 1, // AX
                        outputs: []outputInfo{
-                               {0, 65518}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49134}, // CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11955,7 +11955,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETPC,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11965,7 +11965,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETPS,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11975,7 +11975,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETHI,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11985,7 +11985,7 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ASETCC,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -11995,10 +11995,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVBQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12008,10 +12008,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVBLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12021,10 +12021,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVWQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12034,10 +12034,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVWLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12047,10 +12047,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVLQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12060,10 +12060,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12075,7 +12075,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.AMOVL,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12087,7 +12087,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.AMOVQ,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12097,10 +12097,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTTSD2SL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12110,10 +12110,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTTSD2SQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12123,10 +12123,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTTSS2SL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12136,10 +12136,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTTSS2SQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12149,10 +12149,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSL2SS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12162,10 +12162,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSL2SD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12175,10 +12175,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSQ2SS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12188,10 +12188,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSQ2SD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12201,10 +12201,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSD2SS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12214,10 +12214,10 @@ var opcodeTable = [...]opInfo{
                asm:    x86.ACVTSS2SD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12226,10 +12226,10 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12238,10 +12238,10 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12250,10 +12250,10 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12262,10 +12262,10 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12277,11 +12277,11 @@ var opcodeTable = [...]opInfo{
                asm:          x86.APXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12294,10 +12294,10 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12310,10 +12310,10 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12326,10 +12326,10 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12343,11 +12343,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12361,11 +12361,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12379,11 +12379,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12396,11 +12396,11 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12413,11 +12413,11 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12430,11 +12430,11 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12447,11 +12447,11 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12464,11 +12464,11 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12481,11 +12481,11 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12498,11 +12498,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12515,11 +12515,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12532,11 +12532,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12549,10 +12549,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12565,10 +12565,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12581,10 +12581,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVWLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12597,10 +12597,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVWQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12613,10 +12613,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12629,10 +12629,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVLQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12645,10 +12645,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12661,8 +12661,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12675,8 +12675,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12689,8 +12689,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12703,8 +12703,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12717,10 +12717,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVUPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -12733,8 +12733,21 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVUPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+               },
+       },
+       {
+               name:           "MOVOstorezero",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymWrite,
+               asm:            x86.AMOVUPS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -12748,11 +12761,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12766,11 +12779,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12783,11 +12796,11 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12801,11 +12814,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12818,11 +12831,11 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12835,11 +12848,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12853,11 +12866,11 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12870,11 +12883,11 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -12888,9 +12901,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12904,9 +12917,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12919,9 +12932,9 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12935,9 +12948,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12950,9 +12963,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12965,9 +12978,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12981,9 +12994,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12996,9 +13009,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13011,7 +13024,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13024,7 +13037,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13037,7 +13050,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13050,7 +13063,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13064,8 +13077,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13079,8 +13092,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13093,8 +13106,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13108,8 +13121,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13122,8 +13135,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13137,8 +13150,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13151,36 +13164,24 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
        {
                name:           "DUFFZERO",
                auxType:        auxInt64,
-               argLen:         3,
+               argLen:         2,
                faultOnNilArg0: true,
                unsafePoint:    true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 128},   // DI
-                               {1, 65536}, // X0
+                               {0, 128}, // DI
                        },
                        clobbers: 128, // DI
                },
        },
-       {
-               name:              "MOVOconst",
-               auxType:           auxInt128,
-               argLen:            0,
-               rematerializeable: true,
-               reg: regInfo{
-                       outputs: []outputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-               },
-       },
        {
                name:           "REPSTOSQ",
                argLen:         4,
@@ -13201,7 +13202,7 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                call:         true,
                reg: regInfo{
-                       clobbers: 4294967279, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       clobbers: 2147483631, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 g R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                },
        },
        {
@@ -13213,9 +13214,9 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 4},     // DX
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
-                       clobbers: 4294967279, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       clobbers: 2147483631, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 g R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                },
        },
        {
@@ -13226,9 +13227,9 @@ var opcodeTable = [...]opInfo{
                call:         true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
-                       clobbers: 4294967279, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       clobbers: 2147483631, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 g R15 X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                },
        },
        {
@@ -13271,7 +13272,7 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13291,7 +13292,7 @@ var opcodeTable = [...]opInfo{
                rematerializeable: true,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13301,7 +13302,7 @@ var opcodeTable = [...]opInfo{
                rematerializeable: true,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13313,7 +13314,7 @@ var opcodeTable = [...]opInfo{
                faultOnNilArg0: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65535}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13328,7 +13329,7 @@ var opcodeTable = [...]opInfo{
                                {0, 128}, // DI
                                {1, 879}, // AX CX DX BX BP SI R8 R9
                        },
-                       clobbers: 4294901760, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       clobbers: 2147418112, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                },
        },
        {
@@ -13339,7 +13340,7 @@ var opcodeTable = [...]opInfo{
                symEffect:         SymNone,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13413,10 +13414,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13429,10 +13430,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13445,10 +13446,10 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13463,11 +13464,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13482,11 +13483,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13501,11 +13502,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13521,11 +13522,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13541,11 +13542,11 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 65519},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13571,13 +13572,13 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 1},     // AX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13593,13 +13594,13 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 1},     // AX
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {2, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                        clobbers: 1, // AX
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
@@ -13614,8 +13615,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13630,8 +13631,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13646,8 +13647,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13662,8 +13663,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 65535},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -36172,8 +36173,8 @@ var registersAMD64 = [...]Register{
        {11, x86.REG_R11, 10, "R11"},
        {12, x86.REG_R12, 11, "R12"},
        {13, x86.REG_R13, 12, "R13"},
-       {14, x86.REG_R14, 13, "R14"},
-       {15, x86.REG_R15, 14, "R15"},
+       {14, x86.REGG, -1, "g"},
+       {15, x86.REG_R15, 13, "R15"},
        {16, x86.REG_X0, -1, "X0"},
        {17, x86.REG_X1, -1, "X1"},
        {18, x86.REG_X2, -1, "X2"},
@@ -36192,9 +36193,9 @@ var registersAMD64 = [...]Register{
        {31, x86.REG_X15, -1, "X15"},
        {32, 0, -1, "SB"},
 }
-var gpRegMaskAMD64 = regMask(65519)
-var fpRegMaskAMD64 = regMask(4294901760)
-var specialRegMaskAMD64 = regMask(0)
+var gpRegMaskAMD64 = regMask(49135)
+var fpRegMaskAMD64 = regMask(2147418112)
+var specialRegMaskAMD64 = regMask(2147483648)
 var framepointerRegAMD64 = int8(5)
 var linkRegAMD64 = int8(-1)
 var registersARM = [...]Register{

diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go
index db2dc7a0040490c33f956564a397bfa8e3a512c8..03498c719c0956094970f77ee88324ee5012630d 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteAMD64.go
+++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go
@@ -4,6 +4,7 @@
 package ssa
 
 import "math"
+import "cmd/compile/internal/base"
 import "cmd/compile/internal/types"
 
 func rewriteValueAMD64(v *Value) bool {
@@ -767,8 +768,7 @@ func rewriteValueAMD64(v *Value) bool {
                v.Op = OpAMD64LoweredGetClosurePtr
                return true
        case OpGetG:
-               v.Op = OpAMD64LoweredGetG
-               return true
+               return rewriteValueAMD64_OpGetG(v)
        case OpHasCPUFeature:
                return rewriteValueAMD64_OpHasCPUFeature(v)
        case OpHmul32:
@@ -14226,7 +14226,7 @@ func rewriteValueAMD64_OpAMD64MOVQstoreconst(v *Value) bool {
        }
        // match: (MOVQstoreconst [c] {s} p x:(MOVQstoreconst [c2] {s} p mem))
        // cond: config.useSSE && x.Uses == 1 && c2.Off() + 8 == c.Off() && c.Val() == 0 && c2.Val() == 0 && clobber(x)
-       // result: (MOVOstore [c2.Off32()] {s} p (MOVOconst [0]) mem)
+       // result: (MOVOstorezero [c2.Off32()] {s} p mem)
        for {
                c := auxIntToValAndOff(v.AuxInt)
                s := auxToSym(v.Aux)
@@ -14243,12 +14243,10 @@ func rewriteValueAMD64_OpAMD64MOVQstoreconst(v *Value) bool {
                if p != x.Args[0] || !(config.useSSE && x.Uses == 1 && c2.Off()+8 == c.Off() && c.Val() == 0 && c2.Val() == 0 && clobber(x)) {
                        break
                }
-               v.reset(OpAMD64MOVOstore)
+               v.reset(OpAMD64MOVOstorezero)
                v.AuxInt = int32ToAuxInt(c2.Off32())
                v.Aux = symToAux(s)
-               v0 := b.NewValue0(x.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v0.AuxInt = int128ToAuxInt(0)
-               v.AddArg3(p, v0, mem)
+               v.AddArg2(p, mem)
                return true
        }
        // match: (MOVQstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem)
@@ -30128,6 +30126,22 @@ func rewriteValueAMD64_OpFloor(v *Value) bool {
                return true
        }
 }
+func rewriteValueAMD64_OpGetG(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (GetG mem)
+       // cond: !base.Flag.ABIWrap
+       // result: (LoweredGetG mem)
+       for {
+               mem := v_0
+               if !(!base.Flag.ABIWrap) {
+                       break
+               }
+               v.reset(OpAMD64LoweredGetG)
+               v.AddArg(mem)
+               return true
+       }
+       return false
+}
 func rewriteValueAMD64_OpHasCPUFeature(v *Value) bool {
        b := v.Block
        typ := &b.Func.Config.Types
@@ -34163,7 +34177,7 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
        }
        // match: (Zero [s] destptr mem)
        // cond: s%16 != 0 && s > 16 && s%16 > 8 && config.useSSE
-       // result: (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16]) (MOVOstore destptr (MOVOconst [0]) mem))
+       // result: (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16]) (MOVOstorezero destptr mem))
        for {
                s := auxIntToInt64(v.AuxInt)
                destptr := v_0
@@ -34176,10 +34190,8 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                v0 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
                v0.AuxInt = int64ToAuxInt(s % 16)
                v0.AddArg(destptr)
-               v1 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v2 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v2.AuxInt = int128ToAuxInt(0)
-               v1.AddArg3(destptr, v2, mem)
+               v1 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v1.AddArg2(destptr, mem)
                v.AddArg2(v0, v1)
                return true
        }
@@ -34206,7 +34218,7 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
        }
        // match: (Zero [16] destptr mem)
        // cond: config.useSSE
-       // result: (MOVOstore destptr (MOVOconst [0]) mem)
+       // result: (MOVOstorezero destptr mem)
        for {
                if auxIntToInt64(v.AuxInt) != 16 {
                        break
@@ -34216,15 +34228,13 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                if !(config.useSSE) {
                        break
                }
-               v.reset(OpAMD64MOVOstore)
-               v0 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v0.AuxInt = int128ToAuxInt(0)
-               v.AddArg3(destptr, v0, mem)
+               v.reset(OpAMD64MOVOstorezero)
+               v.AddArg2(destptr, mem)
                return true
        }
        // match: (Zero [32] destptr mem)
        // cond: config.useSSE
-       // result: (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0]) (MOVOstore destptr (MOVOconst [0]) mem))
+       // result: (MOVOstorezero (OffPtr <destptr.Type> destptr [16]) (MOVOstorezero destptr mem))
        for {
                if auxIntToInt64(v.AuxInt) != 32 {
                        break
@@ -34234,20 +34244,18 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                if !(config.useSSE) {
                        break
                }
-               v.reset(OpAMD64MOVOstore)
+               v.reset(OpAMD64MOVOstorezero)
                v0 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
                v0.AuxInt = int64ToAuxInt(16)
                v0.AddArg(destptr)
-               v1 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v1.AuxInt = int128ToAuxInt(0)
-               v2 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v2.AddArg3(destptr, v1, mem)
-               v.AddArg3(v0, v1, v2)
+               v1 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v1.AddArg2(destptr, mem)
+               v.AddArg2(v0, v1)
                return true
        }
        // match: (Zero [48] destptr mem)
        // cond: config.useSSE
-       // result: (MOVOstore (OffPtr <destptr.Type> destptr [32]) (MOVOconst [0]) (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0]) (MOVOstore destptr (MOVOconst [0]) mem)))
+       // result: (MOVOstorezero (OffPtr <destptr.Type> destptr [32]) (MOVOstorezero (OffPtr <destptr.Type> destptr [16]) (MOVOstorezero destptr mem)))
        for {
                if auxIntToInt64(v.AuxInt) != 48 {
                        break
@@ -34257,25 +34265,23 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                if !(config.useSSE) {
                        break
                }
-               v.reset(OpAMD64MOVOstore)
+               v.reset(OpAMD64MOVOstorezero)
                v0 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
                v0.AuxInt = int64ToAuxInt(32)
                v0.AddArg(destptr)
-               v1 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v1.AuxInt = int128ToAuxInt(0)
-               v2 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v3 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
-               v3.AuxInt = int64ToAuxInt(16)
-               v3.AddArg(destptr)
-               v4 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v4.AddArg3(destptr, v1, mem)
-               v2.AddArg3(v3, v1, v4)
-               v.AddArg3(v0, v1, v2)
+               v1 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v2 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
+               v2.AuxInt = int64ToAuxInt(16)
+               v2.AddArg(destptr)
+               v3 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v3.AddArg2(destptr, mem)
+               v1.AddArg2(v2, v3)
+               v.AddArg2(v0, v1)
                return true
        }
        // match: (Zero [64] destptr mem)
        // cond: config.useSSE
-       // result: (MOVOstore (OffPtr <destptr.Type> destptr [48]) (MOVOconst [0]) (MOVOstore (OffPtr <destptr.Type> destptr [32]) (MOVOconst [0]) (MOVOstore (OffPtr <destptr.Type> destptr [16]) (MOVOconst [0]) (MOVOstore destptr (MOVOconst [0]) mem))))
+       // result: (MOVOstorezero (OffPtr <destptr.Type> destptr [48]) (MOVOstorezero (OffPtr <destptr.Type> destptr [32]) (MOVOstorezero (OffPtr <destptr.Type> destptr [16]) (MOVOstorezero destptr mem))))
        for {
                if auxIntToInt64(v.AuxInt) != 64 {
                        break
@@ -34285,30 +34291,28 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                if !(config.useSSE) {
                        break
                }
-               v.reset(OpAMD64MOVOstore)
+               v.reset(OpAMD64MOVOstorezero)
                v0 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
                v0.AuxInt = int64ToAuxInt(48)
                v0.AddArg(destptr)
-               v1 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v1.AuxInt = int128ToAuxInt(0)
-               v2 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v3 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
-               v3.AuxInt = int64ToAuxInt(32)
-               v3.AddArg(destptr)
-               v4 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v5 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
-               v5.AuxInt = int64ToAuxInt(16)
-               v5.AddArg(destptr)
-               v6 := b.NewValue0(v.Pos, OpAMD64MOVOstore, types.TypeMem)
-               v6.AddArg3(destptr, v1, mem)
-               v4.AddArg3(v5, v1, v6)
-               v2.AddArg3(v3, v1, v4)
-               v.AddArg3(v0, v1, v2)
+               v1 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v2 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
+               v2.AuxInt = int64ToAuxInt(32)
+               v2.AddArg(destptr)
+               v3 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v4 := b.NewValue0(v.Pos, OpOffPtr, destptr.Type)
+               v4.AuxInt = int64ToAuxInt(16)
+               v4.AddArg(destptr)
+               v5 := b.NewValue0(v.Pos, OpAMD64MOVOstorezero, types.TypeMem)
+               v5.AddArg2(destptr, mem)
+               v3.AddArg2(v4, v5)
+               v1.AddArg2(v2, v3)
+               v.AddArg2(v0, v1)
                return true
        }
        // match: (Zero [s] destptr mem)
        // cond: s > 64 && s <= 1024 && s%16 == 0 && !config.noDuffDevice
-       // result: (DUFFZERO [s] destptr (MOVOconst [0]) mem)
+       // result: (DUFFZERO [s] destptr mem)
        for {
                s := auxIntToInt64(v.AuxInt)
                destptr := v_0
@@ -34318,9 +34322,7 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
                }
                v.reset(OpAMD64DUFFZERO)
                v.AuxInt = int64ToAuxInt(s)
-               v0 := b.NewValue0(v.Pos, OpAMD64MOVOconst, types.TypeInt128)
-               v0.AuxInt = int128ToAuxInt(0)
-               v.AddArg3(destptr, v0, mem)
+               v.AddArg2(destptr, mem)
                return true
        }
        // match: (Zero [s] destptr mem)

diff --git a/src/cmd/compile/internal/ssagen/abi.go b/src/cmd/compile/internal/ssagen/abi.go
index 5bebce1db58df057faa7c4133cf21134b1e1cb68..7180b3816ceea1daa0f6171ac02b8ad970a1f0f2 100644 (file)
--- a/src/cmd/compile/internal/ssagen/abi.go
+++ b/src/cmd/compile/internal/ssagen/abi.go
@@ -300,9 +300,20 @@ func makeABIWrapper(f *ir.Func, wrapperABI obj.ABI) {
        // to allocate any stack space). Doing this will require some
        // extra work in typecheck/walk/ssa, might want to add a new node
        // OTAILCALL or something to this effect.
-       var tail ir.Node
-       if tfn.Type().NumResults() == 0 && tfn.Type().NumParams() == 0 && tfn.Type().NumRecvs() == 0 && !(base.Ctxt.Arch.Name == "ppc64le" && base.Ctxt.Flag_dynlink) {
+       tailcall := tfn.Type().NumResults() == 0 && tfn.Type().NumParams() == 0 && tfn.Type().NumRecvs() == 0
+       if base.Ctxt.Arch.Name == "ppc64le" && base.Ctxt.Flag_dynlink {
+               // cannot tailcall on PPC64 with dynamic linking, as we need
+               // to restore R2 after call.
+               tailcall = false
+       }
+       if base.Ctxt.Arch.Name == "amd64" && wrapperABI == obj.ABIInternal {
+               // cannot tailcall from ABIInternal to ABI0 on AMD64, as we need
+               // to special registers (X15) when returning to ABIInternal.
+               tailcall = false
+       }
 
+       var tail ir.Node
+       if tailcall {
                tail = ir.NewTailCallStmt(base.Pos, f.Nname)
        } else {
                call := ir.NewCallExpr(base.Pos, ir.OCALL, f.Nname, nil)

diff --git a/src/cmd/compile/internal/ssagen/ssa.go b/src/cmd/compile/internal/ssagen/ssa.go
index b042c132d542e96ed1ec7e975a40c460d2cbdb04..6b1ddebd32aae2f33a9c52ea2d0039543c2499c5 100644 (file)
--- a/src/cmd/compile/internal/ssagen/ssa.go
+++ b/src/cmd/compile/internal/ssagen/ssa.go
@@ -468,7 +468,7 @@ func buildssa(fn *ir.Func, worker int) *ssa.Func {
                        s.Fatalf("local variable with class %v unimplemented", n.Class)
                }
        }
-       s.f.OwnAux = ssa.OwnAuxCall(args, results)
+       s.f.OwnAux = ssa.OwnAuxCall(fn.LSym, args, results)
 
        // Populate SSAable arguments.
        for _, n := range fn.Dcl {
@@ -6266,6 +6266,8 @@ type Branch struct {
 
 // State contains state needed during Prog generation.
 type State struct {
+       ABI obj.ABI
+
        pp *objw.Progs
 
        // Branches remembers all the branch instructions we've seen
@@ -6361,6 +6363,7 @@ func (s *State) DebugFriendlySetPosFrom(v *ssa.Value) {
 // genssa appends entries to pp for each instruction in f.
 func genssa(f *ssa.Func, pp *objw.Progs) {
        var s State
+       s.ABI = f.OwnAux.Fn.ABI()
 
        e := f.Frontend().(*ssafn)
 

diff --git a/src/cmd/dist/build.go b/src/cmd/dist/build.go
index c8c3212d1661f8eb835c20493bba15c35d84fdd4..332f2fab5816fb2139e58817cdbe6cede093bada 100644 (file)
--- a/src/cmd/dist/build.go
+++ b/src/cmd/dist/build.go
@@ -1765,6 +1765,8 @@ func IsRuntimePackagePath(pkgpath string) bool {
                rval = true
        case "syscall":
                rval = true
+       case "crypto/x509/internal/macos": // libc function wrappers need to be ABIInternal
+               rval = true
        default:
                rval = strings.HasPrefix(pkgpath, "runtime/internal")
        }

diff --git a/src/cmd/internal/obj/link.go b/src/cmd/internal/obj/link.go
index 35cb53cbf6cc83dcdccdc2a7df79e61d300929b0..82069023280773ea8524f49905a920ced2793c7b 100644 (file)
--- a/src/cmd/internal/obj/link.go
+++ b/src/cmd/internal/obj/link.go
@@ -39,6 +39,7 @@ import (
        "cmd/internal/sys"
        "fmt"
        "sync"
+       "sync/atomic"
 )
 
 // An Addr is an argument to an instruction.
@@ -647,37 +648,52 @@ const (
        attrABIBase
 )
 
-func (a Attribute) DuplicateOK() bool        { return a&AttrDuplicateOK != 0 }
-func (a Attribute) MakeTypelink() bool       { return a&AttrMakeTypelink != 0 }
-func (a Attribute) CFunc() bool              { return a&AttrCFunc != 0 }
-func (a Attribute) NoSplit() bool            { return a&AttrNoSplit != 0 }
-func (a Attribute) Leaf() bool               { return a&AttrLeaf != 0 }
-func (a Attribute) OnList() bool             { return a&AttrOnList != 0 }
-func (a Attribute) ReflectMethod() bool      { return a&AttrReflectMethod != 0 }
-func (a Attribute) Local() bool              { return a&AttrLocal != 0 }
-func (a Attribute) Wrapper() bool            { return a&AttrWrapper != 0 }
-func (a Attribute) NeedCtxt() bool           { return a&AttrNeedCtxt != 0 }
-func (a Attribute) NoFrame() bool            { return a&AttrNoFrame != 0 }
-func (a Attribute) Static() bool             { return a&AttrStatic != 0 }
-func (a Attribute) WasInlined() bool         { return a&AttrWasInlined != 0 }
-func (a Attribute) TopFrame() bool           { return a&AttrTopFrame != 0 }
-func (a Attribute) Indexed() bool            { return a&AttrIndexed != 0 }
-func (a Attribute) UsedInIface() bool        { return a&AttrUsedInIface != 0 }
-func (a Attribute) ContentAddressable() bool { return a&AttrContentAddressable != 0 }
-func (a Attribute) ABIWrapper() bool         { return a&AttrABIWrapper != 0 }
+func (a *Attribute) load() Attribute { return Attribute(atomic.LoadUint32((*uint32)(a))) }
+
+func (a *Attribute) DuplicateOK() bool        { return a.load()&AttrDuplicateOK != 0 }
+func (a *Attribute) MakeTypelink() bool       { return a.load()&AttrMakeTypelink != 0 }
+func (a *Attribute) CFunc() bool              { return a.load()&AttrCFunc != 0 }
+func (a *Attribute) NoSplit() bool            { return a.load()&AttrNoSplit != 0 }
+func (a *Attribute) Leaf() bool               { return a.load()&AttrLeaf != 0 }
+func (a *Attribute) OnList() bool             { return a.load()&AttrOnList != 0 }
+func (a *Attribute) ReflectMethod() bool      { return a.load()&AttrReflectMethod != 0 }
+func (a *Attribute) Local() bool              { return a.load()&AttrLocal != 0 }
+func (a *Attribute) Wrapper() bool            { return a.load()&AttrWrapper != 0 }
+func (a *Attribute) NeedCtxt() bool           { return a.load()&AttrNeedCtxt != 0 }
+func (a *Attribute) NoFrame() bool            { return a.load()&AttrNoFrame != 0 }
+func (a *Attribute) Static() bool             { return a.load()&AttrStatic != 0 }
+func (a *Attribute) WasInlined() bool         { return a.load()&AttrWasInlined != 0 }
+func (a *Attribute) TopFrame() bool           { return a.load()&AttrTopFrame != 0 }
+func (a *Attribute) Indexed() bool            { return a.load()&AttrIndexed != 0 }
+func (a *Attribute) UsedInIface() bool        { return a.load()&AttrUsedInIface != 0 }
+func (a *Attribute) ContentAddressable() bool { return a.load()&AttrContentAddressable != 0 }
+func (a *Attribute) ABIWrapper() bool         { return a.load()&AttrABIWrapper != 0 }
 
 func (a *Attribute) Set(flag Attribute, value bool) {
-       if value {
-               *a |= flag
-       } else {
-               *a &^= flag
+       for {
+               v0 := a.load()
+               v := v0
+               if value {
+                       v |= flag
+               } else {
+                       v &^= flag
+               }
+               if atomic.CompareAndSwapUint32((*uint32)(a), uint32(v0), uint32(v)) {
+                       break
+               }
        }
 }
 
-func (a Attribute) ABI() ABI { return ABI(a / attrABIBase) }
+func (a *Attribute) ABI() ABI { return ABI(a.load() / attrABIBase) }
 func (a *Attribute) SetABI(abi ABI) {
        const mask = 1 // Only one ABI bit for now.
-       *a = (*a &^ (mask * attrABIBase)) | Attribute(abi)*attrABIBase
+       for {
+               v0 := a.load()
+               v := (v0 &^ (mask * attrABIBase)) | Attribute(abi)*attrABIBase
+               if atomic.CompareAndSwapUint32((*uint32)(a), uint32(v0), uint32(v)) {
+                       break
+               }
+       }
 }
 
 var textAttrStrings = [...]struct {

diff --git a/src/cmd/internal/obj/x86/a.out.go b/src/cmd/internal/obj/x86/a.out.go
index 30c1a6a44547d8f84590ab78d53f77bc99ae2d91..3be4b59da461f52dea5358173053c820b6c3c2c5 100644 (file)
--- a/src/cmd/internal/obj/x86/a.out.go
+++ b/src/cmd/internal/obj/x86/a.out.go
@@ -263,6 +263,7 @@ const (
        FREGRET  = REG_X0
        REGSP    = REG_SP
        REGCTXT  = REG_DX
+       REGG     = REG_R14     // g register in ABIInternal
        REGEXT   = REG_R15     // compiler allocates external registers R15 down
        FREGMIN  = REG_X0 + 5  // first register variable
        FREGEXT  = REG_X0 + 15 // first external register

diff --git a/src/cmd/internal/obj/x86/obj6.go b/src/cmd/internal/obj/x86/obj6.go
index 1674db626fbb19424e63424f285a989274e5b024..84de58a4c4b87290a1437b82b4db2c5e40599b9b 100644 (file)
--- a/src/cmd/internal/obj/x86/obj6.go
+++ b/src/cmd/internal/obj/x86/obj6.go
@@ -637,13 +637,19 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
                }
        }
 
+       var regg int16
        if !p.From.Sym.NoSplit() || (p.From.Sym.Wrapper() && !p.From.Sym.ABIWrapper()) {
-               p = obj.Appendp(p, newprog)
-               p = load_g_cx(ctxt, p, newprog) // load g into CX
+               if ctxt.Arch.Family == sys.AMD64 && objabi.Regabi_enabled != 0 && cursym.ABI() == obj.ABIInternal {
+                       regg = REGG // use the g register directly in ABIInternal
+               } else {
+                       p = obj.Appendp(p, newprog)
+                       p = load_g_cx(ctxt, p, newprog) // load g into CX
+                       regg = REG_CX
+               }
        }
 
        if !cursym.Func().Text.From.Sym.NoSplit() {
-               p = stacksplit(ctxt, cursym, p, newprog, autoffset, int32(textarg)) // emit split check
+               p = stacksplit(ctxt, cursym, p, newprog, autoffset, int32(textarg), regg) // emit split check
        }
 
        // Delve debugger would like the next instruction to be noted as the end of the function prologue.
@@ -695,7 +701,7 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
                //   g._panic.argp = bottom-of-frame
                // }
                //
-               //      MOVQ g_panic(CX), BX
+               //      MOVQ g_panic(g), BX
                //      TESTQ BX, BX
                //      JNE checkargp
                // end:
@@ -718,7 +724,7 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
                p = obj.Appendp(p, newprog)
                p.As = AMOVQ
                p.From.Type = obj.TYPE_MEM
-               p.From.Reg = REG_CX
+               p.From.Reg = regg
                p.From.Offset = 4 * int64(ctxt.Arch.PtrSize) // g_panic
                p.To.Type = obj.TYPE_REG
                p.To.Reg = REG_BX
@@ -969,9 +975,9 @@ func load_g_cx(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) *obj.Prog {
 
 // Append code to p to check for stack split.
 // Appends to (does not overwrite) p.
-// Assumes g is in CX.
+// Assumes g is in rg.
 // Returns last new instruction.
-func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgAlloc, framesize int32, textarg int32) *obj.Prog {
+func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgAlloc, framesize int32, textarg int32, rg int16) *obj.Prog {
        cmp := ACMPQ
        lea := ALEAQ
        mov := AMOVQ
@@ -993,7 +999,8 @@ func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgA
                p.As = cmp
                p.From.Type = obj.TYPE_REG
                p.From.Reg = REG_SP
-               indir_cx(ctxt, &p.To)
+               p.To.Type = obj.TYPE_MEM
+               p.To.Reg = rg
                p.To.Offset = 2 * int64(ctxt.Arch.PtrSize) // G.stackguard0
                if cursym.CFunc() {
                        p.To.Offset = 3 * int64(ctxt.Arch.PtrSize) // G.stackguard1
@@ -1021,7 +1028,8 @@ func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgA
                p.As = cmp
                p.From.Type = obj.TYPE_REG
                p.From.Reg = REG_AX
-               indir_cx(ctxt, &p.To)
+               p.To.Type = obj.TYPE_MEM
+               p.To.Reg = rg
                p.To.Offset = 2 * int64(ctxt.Arch.PtrSize) // G.stackguard0
                if cursym.CFunc() {
                        p.To.Offset = 3 * int64(ctxt.Arch.PtrSize) // G.stackguard1
@@ -1047,7 +1055,8 @@ func stacksplit(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog, newprog obj.ProgA
                p = obj.Appendp(p, newprog)
 
                p.As = mov
-               indir_cx(ctxt, &p.From)
+               p.From.Type = obj.TYPE_MEM
+               p.From.Reg = rg
                p.From.Offset = 2 * int64(ctxt.Arch.PtrSize) // G.stackguard0
                if cursym.CFunc() {
                        p.From.Offset = 3 * int64(ctxt.Arch.PtrSize) // G.stackguard1

diff --git a/src/cmd/internal/objabi/path.go b/src/cmd/internal/objabi/path.go
index fd1c9981c69d0f9b1220d7e37de1e08068d4584a..1a0784cf7f0d2b8a011335deca967f6df4732a6d 100644 (file)
--- a/src/cmd/internal/objabi/path.go
+++ b/src/cmd/internal/objabi/path.go
@@ -56,6 +56,8 @@ func IsRuntimePackagePath(pkgpath string) bool {
                rval = true
        case "syscall":
                rval = true
+       case "crypto/x509/internal/macos": // libc function wrappers need to be ABIInternal
+               rval = true
        default:
                rval = strings.HasPrefix(pkgpath, "runtime/internal")
        }

diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go
index 17d5040827c0e4b03f708b719bf7752c486f3cf6..71cef0b774ff8d4a2bcda88f4b692ae2f57be29d 100644 (file)
--- a/src/cmd/link/internal/ld/lib.go
+++ b/src/cmd/link/internal/ld/lib.go
@@ -2091,6 +2091,26 @@ func ldshlibsyms(ctxt *Link, shlib string) {
                Errorf(nil, "cannot read symbols from shared library: %s", libpath)
                return
        }
+
+       // collect text symbol ABI versions.
+       symabi := make(map[string]int) // map (unmangled) symbol name to version
+       if *flagAbiWrap {
+               for _, elfsym := range syms {
+                       if elf.ST_TYPE(elfsym.Info) != elf.STT_FUNC {
+                               continue
+                       }
+                       // Demangle the name. Keep in sync with symtab.go:putelfsym.
+                       if strings.HasSuffix(elfsym.Name, ".abiinternal") {
+                               // ABIInternal symbol has mangled name, so the primary symbol is ABI0.
+                               symabi[strings.TrimSuffix(elfsym.Name, ".abiinternal")] = 0
+                       }
+                       if strings.HasSuffix(elfsym.Name, ".abi0") {
+                               // ABI0 symbol has mangled name, so the primary symbol is ABIInternal.
+                               symabi[strings.TrimSuffix(elfsym.Name, ".abi0")] = sym.SymVerABIInternal
+                       }
+               }
+       }
+
        for _, elfsym := range syms {
                if elf.ST_TYPE(elfsym.Info) == elf.STT_NOTYPE || elf.ST_TYPE(elfsym.Info) == elf.STT_SECTION {
                        continue
@@ -2099,12 +2119,23 @@ func ldshlibsyms(ctxt *Link, shlib string) {
                // Symbols whose names start with "type." are compiler
                // generated, so make functions with that prefix internal.
                ver := 0
+               symname := elfsym.Name // (unmangled) symbol name
                if elf.ST_TYPE(elfsym.Info) == elf.STT_FUNC && strings.HasPrefix(elfsym.Name, "type.") {
                        ver = sym.SymVerABIInternal
+               } else if *flagAbiWrap && elf.ST_TYPE(elfsym.Info) == elf.STT_FUNC {
+                       if strings.HasSuffix(elfsym.Name, ".abiinternal") {
+                               ver = sym.SymVerABIInternal
+                               symname = strings.TrimSuffix(elfsym.Name, ".abiinternal")
+                       } else if strings.HasSuffix(elfsym.Name, ".abi0") {
+                               ver = 0
+                               symname = strings.TrimSuffix(elfsym.Name, ".abi0")
+                       } else if abi, ok := symabi[elfsym.Name]; ok {
+                               ver = abi
+                       }
                }
 
                l := ctxt.loader
-               s := l.LookupOrCreateSym(elfsym.Name, ver)
+               s := l.LookupOrCreateSym(symname, ver)
 
                // Because loadlib above loads all .a files before loading
                // any shared libraries, any non-dynimport symbols we find
@@ -2129,6 +2160,10 @@ func ldshlibsyms(ctxt *Link, shlib string) {
                        }
                }
 
+               if symname != elfsym.Name {
+                       l.SetSymExtname(s, elfsym.Name)
+               }
+
                // For function symbols, we don't know what ABI is
                // available, so alias it under both ABIs.
                //
@@ -2137,7 +2172,12 @@ func ldshlibsyms(ctxt *Link, shlib string) {
                // mangle Go function names in the .so to include the
                // ABI.
                if elf.ST_TYPE(elfsym.Info) == elf.STT_FUNC && ver == 0 {
-                       alias := ctxt.loader.LookupOrCreateSym(elfsym.Name, sym.SymVerABIInternal)
+                       if *flagAbiWrap {
+                               if _, ok := symabi[symname]; ok {
+                                       continue // only use alias for functions w/o ABI wrappers
+                               }
+                       }
+                       alias := ctxt.loader.LookupOrCreateSym(symname, sym.SymVerABIInternal)
                        if l.SymType(alias) != 0 {
                                continue
                        }

diff --git a/src/crypto/x509/internal/macos/corefoundation.s b/src/crypto/x509/internal/macos/corefoundation.s
index a4495d68dd3575bda0423647dd4dee296ab8ceb4..1ce39fac9d752ba95f64d7f75b2fb2aa6f5b5f50 100644 (file)
--- a/src/crypto/x509/internal/macos/corefoundation.s
+++ b/src/crypto/x509/internal/macos/corefoundation.s
@@ -6,21 +6,24 @@
 
 #include "textflag.h"
 
-TEXT ·x509_CFArrayGetCount_trampoline(SB),NOSPLIT,$0-0
+// The trampolines are ABIInternal as they are address-taken in
+// Go code.
+
+TEXT ·x509_CFArrayGetCount_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFArrayGetCount(SB)
-TEXT ·x509_CFArrayGetValueAtIndex_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFArrayGetValueAtIndex_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFArrayGetValueAtIndex(SB)
-TEXT ·x509_CFDataGetBytePtr_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFDataGetBytePtr_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFDataGetBytePtr(SB)
-TEXT ·x509_CFDataGetLength_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFDataGetLength_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFDataGetLength(SB)
-TEXT ·x509_CFStringCreateWithBytes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFStringCreateWithBytes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFStringCreateWithBytes(SB)
-TEXT ·x509_CFRelease_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFRelease_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFRelease(SB)
-TEXT ·x509_CFDictionaryGetValueIfPresent_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFDictionaryGetValueIfPresent_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFDictionaryGetValueIfPresent(SB)
-TEXT ·x509_CFNumberGetValue_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFNumberGetValue_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFNumberGetValue(SB)
-TEXT ·x509_CFEqual_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_CFEqual_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_CFEqual(SB)

diff --git a/src/crypto/x509/internal/macos/security.s b/src/crypto/x509/internal/macos/security.s
index bd446dbcbe260fa0b310667ef3dc96faa54a63cf..bea265a5ef9166b3e66c307b14d64777b9561c05 100644 (file)
--- a/src/crypto/x509/internal/macos/security.s
+++ b/src/crypto/x509/internal/macos/security.s
@@ -6,11 +6,14 @@
 
 #include "textflag.h"
 
-TEXT ·x509_SecTrustSettingsCopyCertificates_trampoline(SB),NOSPLIT,$0-0
+// The trampolines are ABIInternal as they are address-taken in
+// Go code.
+
+TEXT ·x509_SecTrustSettingsCopyCertificates_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_SecTrustSettingsCopyCertificates(SB)
-TEXT ·x509_SecItemExport_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_SecItemExport_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_SecItemExport(SB)
-TEXT ·x509_SecTrustSettingsCopyTrustSettings_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_SecTrustSettingsCopyTrustSettings_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_SecTrustSettingsCopyTrustSettings(SB)
-TEXT ·x509_SecPolicyCopyProperties_trampoline(SB),NOSPLIT,$0-0
+TEXT ·x509_SecPolicyCopyProperties_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     x509_SecPolicyCopyProperties(SB)

diff --git a/src/embed/embed.go b/src/embed/embed.go
index 5f984aaf71d285cecceb00ccd928b85a62a3dad1..7f2719d2a78062ab9749f17fe67c9ea8f4d7ab64 100644 (file)
--- a/src/embed/embed.go
+++ b/src/embed/embed.go
@@ -61,12 +61,15 @@
 // The Go build system will recognize the directives and arrange for the declared variable
 // (in the example above, content) to be populated with the matching files from the file system.
 //
-// The //go:embed directive accepts multiple space-separated patterns for brevity,
-// but it can also be repeated, to avoid very long lines when there are many patterns.
-// The patterns are interpreted relative to the package directory containing the source file.
-// The path separator is a forward slash, even on Windows systems.
-// To allow for naming files with spaces in their names, patterns can be written
-// as Go double-quoted or back-quoted string literals.
+// The //go:embed directive accepts multiple space-separated patterns for
+// brevity, but it can also be repeated, to avoid very long lines when there are
+// many patterns. The patterns are interpreted relative to the package directory
+// containing the source file. The path separator is a forward slash, even on
+// Windows systems. Patterns may not contain ‘.’ or ‘..’ or empty path elements,
+// nor may they begin or end with a slash. To match everything in the current
+// directory, use ‘*’ instead of ‘.’. To allow for naming files with spaces in
+// their names, patterns can be written as Go double-quoted or back-quoted
+// string literals.
 //
 // If a pattern names a directory, all files in the subtree rooted at that directory are
 // embedded (recursively), except that files with names beginning with ‘.’ or ‘_’
@@ -87,9 +90,6 @@
 // Matches for empty directories are ignored. After that, each pattern in a //go:embed line
 // must match at least one file or non-empty directory.
 //
-// Patterns must not contain ‘.’ or ‘..’ path elements nor begin with a leading slash.
-// To match everything in the current directory, use ‘*’ instead of ‘.’.
-//
 // If any patterns are invalid or have invalid matches, the build will fail.
 //
 // Strings and Bytes

diff --git a/src/go/types/api_test.go b/src/go/types/api_test.go
index 014cd5282e6a1f8c21b91b2108a3d8881c9aa102..3ea14c9316b1c92a9a14ba72beb0779add688e7e 100644 (file)
--- a/src/go/types/api_test.go
+++ b/src/go/types/api_test.go
@@ -188,6 +188,9 @@ func TestValuesInfo(t *testing.T) {
 }
 
 func TestTypesInfo(t *testing.T) {
+       // Test sources that are not expected to typecheck must start with the broken prefix.
+       const broken = "package broken_"
+
        var tests = []struct {
                src  string
                expr string // expression
@@ -200,6 +203,39 @@ func TestTypesInfo(t *testing.T) {
                {`package b3; var x interface{} = 0i`, `0i`, `complex128`},
                {`package b4; var x interface{} = "foo"`, `"foo"`, `string`},
 
+               // uses of nil
+               {`package n0; var _ *int = nil`, `nil`, `untyped nil`},
+               {`package n1; var _ func() = nil`, `nil`, `untyped nil`},
+               {`package n2; var _ []byte = nil`, `nil`, `untyped nil`},
+               {`package n3; var _ map[int]int = nil`, `nil`, `untyped nil`},
+               {`package n4; var _ chan int = nil`, `nil`, `untyped nil`},
+               {`package n5; var _ interface{} = nil`, `nil`, `untyped nil`},
+               {`package n6; import "unsafe"; var _ unsafe.Pointer = nil`, `nil`, `untyped nil`},
+
+               {`package n10; var (x *int; _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n11; var (x func(); _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n12; var (x []byte; _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n13; var (x map[int]int; _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n14; var (x chan int; _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n15; var (x interface{}; _ = x == nil)`, `nil`, `untyped nil`},
+               {`package n15; import "unsafe"; var (x unsafe.Pointer; _ = x == nil)`, `nil`, `untyped nil`},
+
+               {`package n20; var _ = (*int)(nil)`, `nil`, `untyped nil`},
+               {`package n21; var _ = (func())(nil)`, `nil`, `untyped nil`},
+               {`package n22; var _ = ([]byte)(nil)`, `nil`, `untyped nil`},
+               {`package n23; var _ = (map[int]int)(nil)`, `nil`, `untyped nil`},
+               {`package n24; var _ = (chan int)(nil)`, `nil`, `untyped nil`},
+               {`package n25; var _ = (interface{})(nil)`, `nil`, `untyped nil`},
+               {`package n26; import "unsafe"; var _ = unsafe.Pointer(nil)`, `nil`, `untyped nil`},
+
+               {`package n30; func f(*int) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n31; func f(func()) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n32; func f([]byte) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n33; func f(map[int]int) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n34; func f(chan int) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n35; func f(interface{}) { f(nil) }`, `nil`, `untyped nil`},
+               {`package n35; import "unsafe"; func f(unsafe.Pointer) { f(nil) }`, `nil`, `untyped nil`},
+
                // comma-ok expressions
                {`package p0; var x interface{}; var _, _ = x.(int)`,
                        `x.(int)`,
@@ -281,25 +317,27 @@ func TestTypesInfo(t *testing.T) {
                },
 
                // tests for broken code that doesn't parse or type-check
-               {`package x0; func _() { var x struct {f string}; x.f := 0 }`, `x.f`, `string`},
-               {`package x1; func _() { var z string; type x struct {f string}; y := &x{q: z}}`, `z`, `string`},
-               {`package x2; func _() { var a, b string; type x struct {f string}; z := &x{f: a, f: b,}}`, `b`, `string`},
-               {`package x3; var x = panic("");`, `panic`, `func(interface{})`},
+               {broken + `x0; func _() { var x struct {f string}; x.f := 0 }`, `x.f`, `string`},
+               {broken + `x1; func _() { var z string; type x struct {f string}; y := &x{q: z}}`, `z`, `string`},
+               {broken + `x2; func _() { var a, b string; type x struct {f string}; z := &x{f: a; f: b;}}`, `b`, `string`},
+               {broken + `x3; var x = panic("");`, `panic`, `func(interface{})`},
                {`package x4; func _() { panic("") }`, `panic`, `func(interface{})`},
-               {`package x5; func _() { var x map[string][...]int; x = map[string][...]int{"": {1,2,3}} }`, `x`, `map[string][-1]int`},
+               {broken + `x5; func _() { var x map[string][...]int; x = map[string][...]int{"": {1,2,3}} }`, `x`, `map[string][-1]int`},
 
                // parameterized functions
                {genericPkg + `p0; func f[T any](T); var _ = f(int)`, `f`, `func[T₁ any](T₁)`},
                {genericPkg + `p1; func f[T any](T); var _ = f(int)`, `f(int)`, `func(int)`},
-               {genericPkg + `p2; func f[T any](T); var _ = f(42)`, `f`, `func[T₁ any](T₁)`},
-               {genericPkg + `p2; func f[T any](T); var _ = f(42)`, `f(42)`, `()`},
+               {genericPkg + `p2; func f[T any](T); func _() { f(42) }`, `f`, `func[T₁ any](T₁)`},
+               {genericPkg + `p3; func f[T any](T); func _() { f(42) }`, `f(42)`, `()`},
 
                // type parameters
                {genericPkg + `t0; type t[] int; var _ t`, `t`, `generic_t0.t`}, // t[] is a syntax error that is ignored in this test in favor of t
                {genericPkg + `t1; type t[P any] int; var _ t[int]`, `t`, `generic_t1.t[P₁ any]`},
                {genericPkg + `t2; type t[P interface{}] int; var _ t[int]`, `t`, `generic_t2.t[P₁ interface{}]`},
                {genericPkg + `t3; type t[P, Q interface{}] int; var _ t[int, int]`, `t`, `generic_t3.t[P₁, Q₂ interface{}]`},
-               {genericPkg + `t4; type t[P, Q interface{ m() }] int; var _ t[int, int]`, `t`, `generic_t4.t[P₁, Q₂ interface{m()}]`},
+
+               // TODO (rFindley): compare with types2, which resolves the type broken_t4.t[P₁, Q₂ interface{m()}] here
+               {broken + `t4; type t[P, Q interface{ m() }] int; var _ t[int, int]`, `t`, `broken_t4.t`},
 
                // instantiated types must be sanitized
                {genericPkg + `g0; type t[P any] int; var x struct{ f t[int] }; var _ = x.f`, `x.f`, `generic_g0.t[int]`},
@@ -307,7 +345,17 @@ func TestTypesInfo(t *testing.T) {
 
        for _, test := range tests {
                info := Info{Types: make(map[ast.Expr]TypeAndValue)}
-               name, _ := mayTypecheck(t, "TypesInfo", test.src, &info)
+               var name string
+               if strings.HasPrefix(test.src, broken) {
+                       var err error
+                       name, err = mayTypecheck(t, "TypesInfo", test.src, &info)
+                       if err == nil {
+                               t.Errorf("package %s: expected to fail but passed", name)
+                               continue
+                       }
+               } else {
+                       name = mustTypecheck(t, "TypesInfo", test.src, &info)
+               }
 
                // look for expression type
                var typ Type

diff --git a/src/go/types/assignments.go b/src/go/types/assignments.go
index 3aa06e8939fca76084b0217202c4f2eb8c4b4509..ee7dd962146bb73892b81009075af3a148c74ce6 100644 (file)
--- a/src/go/types/assignments.go
+++ b/src/go/types/assignments.go
@@ -129,6 +129,7 @@ func (check *Checker) initVar(lhs *Var, x *operand, context string) Type {
                if lhs.typ == nil {
                        lhs.typ = Typ[Invalid]
                }
+               lhs.used = true
                return nil
        }
 

diff --git a/src/go/types/conversions.go b/src/go/types/conversions.go
index 0756b575ae4039a91f72bfff35075f9f78a6184d..69463f0ca60e1b33b3c253c96e0ac4be384d146d 100644 (file)
--- a/src/go/types/conversions.go
+++ b/src/go/types/conversions.go
@@ -55,8 +55,8 @@ func (check *Checker) conversion(x *operand, T Type) {
                // - Keep untyped nil for untyped nil arguments.
                // - For integer to string conversions, keep the argument type.
                //   (See also the TODO below.)
-               if IsInterface(T) || constArg && !isConstType(T) {
-                       final = Default(x.typ)
+               if IsInterface(T) || constArg && !isConstType(T) || x.isNil() {
+                       final = Default(x.typ) // default type of untyped nil is untyped nil
                } else if isInteger(x.typ) && isString(T) {
                        final = x.typ
                }

diff --git a/src/go/types/decl.go b/src/go/types/decl.go
index bd2c5466617a78f747f24ce6e84a76b0b45d4270..f2e68bbd5c3fe38e08f978b4e7f74b9bd50e6573 100644 (file)
--- a/src/go/types/decl.go
+++ b/src/go/types/decl.go
@@ -511,6 +511,20 @@ func (check *Checker) constDecl(obj *Const, typ, init ast.Expr, inherited bool)
 func (check *Checker) varDecl(obj *Var, lhs []*Var, typ, init ast.Expr) {
        assert(obj.typ == nil)
 
+       // If we have undefined variable types due to errors,
+       // mark variables as used to avoid follow-on errors.
+       // Matches compiler behavior.
+       defer func() {
+               if obj.typ == Typ[Invalid] {
+                       obj.used = true
+               }
+               for _, lhs := range lhs {
+                       if lhs.typ == Typ[Invalid] {
+                               lhs.used = true
+                       }
+               }
+       }()
+
        // determine type, if any
        if typ != nil {
                obj.typ = check.varType(typ)

diff --git a/src/go/types/errorcodes.go b/src/go/types/errorcodes.go
index 7e6209155853b621a52003322fbf6f6474fd9c1a..2837019bf5ec39dd56b77a23c634e7aadec4353f 100644 (file)
--- a/src/go/types/errorcodes.go
+++ b/src/go/types/errorcodes.go
@@ -386,8 +386,8 @@ const (
        // _InvalidInitSig occurs when an init function declares parameters or
        // results.
        //
-       // Example:
-       //  func init() int { return 1 }
+       // Deprecated: no longer emitted by the type checker. _InvalidInitDecl is
+       // used instead.
        _InvalidInitSig
 
        // _InvalidInitDecl occurs when init is declared as anything other than a
@@ -395,6 +395,9 @@ const (
        //
        // Example:
        //  var init = 1
+       //
+       // Example:
+       //  func init() int { return 1 }
        _InvalidInitDecl
 
        // _InvalidMainDecl occurs when main is declared as anything other than a

diff --git a/src/go/types/expr.go b/src/go/types/expr.go
index 1deda99aaff30c57b73ecdc146d798ba65163ee9..0d9540245502a26b80798eb28787aa631748d250 100644 (file)
--- a/src/go/types/expr.go
+++ b/src/go/types/expr.go
@@ -586,7 +586,8 @@ func (check *Checker) implicitTypeAndValue(x *operand, target Type) (Type, const
                        if !hasNil(target) {
                                return nil, nil, _InvalidUntypedConversion
                        }
-                       // TODO(rFindley) return UntypedNil here (golang.org/issues/13061).
+                       // Preserve the type of nil as UntypedNil: see #13061.
+                       return Typ[UntypedNil], nil, 0
                default:
                        return nil, nil, _InvalidUntypedConversion
                }

diff --git a/src/go/types/resolver.go b/src/go/types/resolver.go
index 639ed121175cd51b5f8177c6a144e977fc1a4a18..4f09237692837c3fb81275e7e9149feb0653bede 100644 (file)
--- a/src/go/types/resolver.go
+++ b/src/go/types/resolver.go
@@ -379,14 +379,20 @@ func (check *Checker) collectObjects() {
                                                check.error(d.decl.Recv, _BadRecv, "method is missing receiver")
                                                // treat as function
                                        }
-                                       if name == "init" {
+                                       if name == "init" || (name == "main" && check.pkg.name == "main") {
+                                               code := _InvalidInitDecl
+                                               if name == "main" {
+                                                       code = _InvalidMainDecl
+                                               }
                                                if d.decl.Type.TParams != nil {
-                                                       check.softErrorf(d.decl.Type.TParams, _InvalidInitSig, "func init must have no type parameters")
+                                                       check.softErrorf(d.decl.Type.TParams, code, "func %s must have no type parameters", name)
                                                }
                                                if t := d.decl.Type; t.Params.NumFields() != 0 || t.Results != nil {
                                                        // TODO(rFindley) Should this be a hard error?
-                                                       check.softErrorf(d.decl, _InvalidInitSig, "func init must have no arguments and no return values")
+                                                       check.softErrorf(d.decl, code, "func %s must have no arguments and no return values", name)
                                                }
+                                       }
+                                       if name == "init" {
                                                // don't declare init functions in the package scope - they are invisible
                                                obj.parent = pkg.scope
                                                check.recordDef(d.decl.Name, obj)

diff --git a/src/go/types/testdata/main.src b/src/go/types/testdata/main.src
new file mode 100644 (file)
index 0000000..f892938
--- /dev/null
+++ b/src/go/types/testdata/main.src
@@ -0,0 +1,9 @@
+// Copyright 2020 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package main
+
+func main()
+func /* ERROR "no arguments and no return values" */ main /* ERROR redeclared */ (int)
+func /* ERROR "no arguments and no return values" */ main /* ERROR redeclared */ () int

diff --git a/src/go/types/testdata/vardecl.src b/src/go/types/testdata/vardecl.src
index 54f5ef1e10d0983f55f65ea32f421e2b4e53ee63..6e2d1b5bd5e3b5c65454b7987bb4db9d4be3d915 100644 (file)
--- a/src/go/types/testdata/vardecl.src
+++ b/src/go/types/testdata/vardecl.src
@@ -158,6 +158,18 @@ func _() {
        }
 }
 
+
+// Invalid variable declarations must not lead to "declared but not used errors".
+func _() {
+       var a x        // ERROR undeclared name: x
+       var b = x      // ERROR undeclared name: x
+       var c int = x  // ERROR undeclared name: x
+       var d, e, f x  /* ERROR x */ /* ERROR x */ /* ERROR x */
+       var g, h, i = x /* ERROR x */, x /* ERROR x */, x /* ERROR x */
+       var j, k, l float32 = x /* ERROR x */, x /* ERROR x */, x /* ERROR x */
+       // but no "declared but not used" errors
+}
+
 // Invalid (unused) expressions must not lead to spurious "declared but not used errors"
 func _() {
        var a, b, c int
@@ -203,4 +215,4 @@ func _() {
        _, _, _ = x, y, z
 }
 
-// TODO(gri) consolidate other var decl checks in this file
\ No newline at end of file
+// TODO(gri) consolidate other var decl checks in this file

diff --git a/src/io/fs/fs.go b/src/io/fs/fs.go
index b691a860498a2136cf97a56905739555bf4946f5..c330f123ad1fab136ed69a26a768f6863d14eb88 100644 (file)
--- a/src/io/fs/fs.go
+++ b/src/io/fs/fs.go
@@ -36,6 +36,7 @@ type FS interface {
 // sequences of path elements, like “x/y/z”.
 // Path names must not contain a “.” or “..” or empty element,
 // except for the special case that the root directory is named “.”.
+// Leading and trailing slashes (like “/x” or “x/”) are not allowed.
 //
 // Paths are slash-separated on all systems, even Windows.
 // Backslashes must not appear in path names.

diff --git a/src/math/big/nat.go b/src/math/big/nat.go
index 068176e1c1a18c59a8a8bb0a0a13f644a140e4cd..bbd6c8850b604b365011144e9ab8e6744ee27354 100644 (file)
--- a/src/math/big/nat.go
+++ b/src/math/big/nat.go
@@ -881,7 +881,7 @@ func (z nat) divRecursiveStep(u, v nat, depth int, tmp *nat, temps []*nat) {
                // then floor(u1/v1) >= floor(u/v)
                //
                // Moreover, the difference is at most 2 if len(v1) >= len(u/v)
-               // We choose s = B-1 since len(v)-B >= B+1 >= len(u/v)
+               // We choose s = B-1 since len(v)-s >= B+1 >= len(u/v)
                s := (B - 1)
                // Except for the first step, the top bits are always
                // a division remainder, so the quotient length is <= n.

diff --git a/src/runtime/asm.s b/src/runtime/asm.s
index 27d8df9e063ecf8404e5da9ffa15b88c5f4fffbc..72c744925d89aec9d1cc33a6eacf55f826866fcf 100644 (file)
--- a/src/runtime/asm.s
+++ b/src/runtime/asm.s
@@ -11,3 +11,8 @@
 DATA runtime·no_pointers_stackmap+0x00(SB)/4, $2
 DATA runtime·no_pointers_stackmap+0x04(SB)/4, $0
 GLOBL runtime·no_pointers_stackmap(SB),RODATA, $8
+
+#ifndef GOARCH_amd64
+TEXT ·sigpanic0<ABIInternal>(SB),NOSPLIT,$0-0
+       JMP     ·sigpanic<ABIInternal>(SB)
+#endif

diff --git a/src/runtime/asm_386.s b/src/runtime/asm_386.s
index fa3b1be3392598526a34281624482662069921be..429f3fef82916ae467b1d3123f24280f51dafd82 100644 (file)
--- a/src/runtime/asm_386.s
+++ b/src/runtime/asm_386.s
@@ -273,25 +273,6 @@ TEXT runtime·asminit(SB),NOSPLIT,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT, $0-4
-       MOVL    buf+0(FP), AX           // gobuf
-       LEAL    buf+0(FP), BX           // caller's SP
-       MOVL    BX, gobuf_sp(AX)
-       MOVL    0(SP), BX               // caller's PC
-       MOVL    BX, gobuf_pc(AX)
-       MOVL    $0, gobuf_ret(AX)
-       // Assert ctxt is zero. See func save.
-       MOVL    gobuf_ctxt(AX), BX
-       TESTL   BX, BX
-       JZ      2(PC)
-       CALL    runtime·badctxt(SB)
-       get_tls(CX)
-       MOVL    g(CX), BX
-       MOVL    BX, gobuf_g(AX)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $8-4

diff --git a/src/runtime/asm_amd64.s b/src/runtime/asm_amd64.s
index b5d01ba73ce037839219b12a56c68322c0cbd4f5..93280eee4a6c5dd59472423c581bd83f737b3c9b 100644 (file)
--- a/src/runtime/asm_amd64.s
+++ b/src/runtime/asm_amd64.s
@@ -84,9 +84,7 @@ GLOBL _rt0_amd64_lib_argc<>(SB),NOPTR, $8
 DATA _rt0_amd64_lib_argv<>(SB)/8, $0
 GLOBL _rt0_amd64_lib_argv<>(SB),NOPTR, $8
 
-// Defined as ABIInternal since it does not use the stack-based Go ABI (and
-// in addition there are no calls to this entry point from Go code).
-TEXT runtime·rt0_go<ABIInternal>(SB),NOSPLIT,$0
+TEXT runtime·rt0_go(SB),NOSPLIT,$0
        // copy arguments forward on an even stack
        MOVQ    DI, AX          // argc
        MOVQ    SI, BX          // argv
@@ -256,26 +254,6 @@ TEXT runtime·asminit(SB),NOSPLIT,$0-0
  *  go-routine
  */
 
-// func gosave(buf *gobuf)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT, $0-8
-       MOVQ    buf+0(FP), AX           // gobuf
-       LEAQ    buf+0(FP), BX           // caller's SP
-       MOVQ    BX, gobuf_sp(AX)
-       MOVQ    0(SP), BX               // caller's PC
-       MOVQ    BX, gobuf_pc(AX)
-       MOVQ    $0, gobuf_ret(AX)
-       MOVQ    BP, gobuf_bp(AX)
-       // Assert ctxt is zero. See func save.
-       MOVQ    gobuf_ctxt(AX), BX
-       TESTQ   BX, BX
-       JZ      2(PC)
-       CALL    runtime·badctxt(SB)
-       get_tls(CX)
-       MOVQ    g(CX), BX
-       MOVQ    BX, gobuf_g(AX)
-       RET
-
 // func gogo(buf *gobuf)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $16-8
@@ -284,6 +262,7 @@ TEXT runtime·gogo(SB), NOSPLIT, $16-8
        MOVQ    0(DX), CX               // make sure g != nil
        get_tls(CX)
        MOVQ    DX, g(CX)
+       MOVQ    DX, R14         // set the g register
        MOVQ    gobuf_sp(BX), SP        // restore SP
        MOVQ    gobuf_ret(BX), AX
        MOVQ    gobuf_ctxt(BX), DX
@@ -320,6 +299,7 @@ TEXT runtime·mcall(SB), NOSPLIT, $0-8
        MOVQ    $runtime·badmcall(SB), AX
        JMP     AX
        MOVQ    SI, g(CX)       // g = m->g0
+       MOVQ    SI, R14 // set the g register
        MOVQ    (g_sched+gobuf_sp)(SI), SP      // sp = m->g0->sched.sp
        PUSHQ   AX
        MOVQ    DI, DX
@@ -366,6 +346,7 @@ TEXT runtime·systemstack(SB), NOSPLIT, $0-8
 
        // switch to g0
        MOVQ    DX, g(CX)
+       MOVQ    DX, R14 // set the g register
        MOVQ    (g_sched+gobuf_sp)(DX), BX
        // make it look like mstart called systemstack on g0, to stop traceback
        SUBQ    $8, BX
@@ -604,18 +585,20 @@ TEXT runtime·jmpdefer(SB), NOSPLIT, $0-16
        MOVQ    0(DX), BX
        JMP     BX      // but first run the deferred function
 
-// Save state of caller into g->sched. Smashes R8, R9.
+// Save state of caller into g->sched. Smashes R9.
 TEXT gosave<>(SB),NOSPLIT,$0
-       get_tls(R8)
-       MOVQ    g(R8), R8
+#ifndef GOEXPERIMENT_REGABI
+       get_tls(R14)
+       MOVQ    g(R14), R14
+#endif
        MOVQ    0(SP), R9
-       MOVQ    R9, (g_sched+gobuf_pc)(R8)
+       MOVQ    R9, (g_sched+gobuf_pc)(R14)
        LEAQ    8(SP), R9
-       MOVQ    R9, (g_sched+gobuf_sp)(R8)
-       MOVQ    $0, (g_sched+gobuf_ret)(R8)
-       MOVQ    BP, (g_sched+gobuf_bp)(R8)
+       MOVQ    R9, (g_sched+gobuf_sp)(R14)
+       MOVQ    $0, (g_sched+gobuf_ret)(R14)
+       MOVQ    BP, (g_sched+gobuf_bp)(R14)
        // Assert ctxt is zero. See func save.
-       MOVQ    (g_sched+gobuf_ctxt)(R8), R9
+       MOVQ    (g_sched+gobuf_ctxt)(R14), R9
        TESTQ   R9, R9
        JZ      2(PC)
        CALL    runtime·badctxt(SB)
@@ -846,6 +829,7 @@ settls:
 TEXT setg_gcc<>(SB),NOSPLIT,$0
        get_tls(AX)
        MOVQ    DI, g(AX)
+       MOVQ    DI, R14 // set the g register
        RET
 
 TEXT runtime·abort(SB),NOSPLIT,$0-0
@@ -1382,6 +1366,18 @@ TEXT runtime·addmoduledata(SB),NOSPLIT,$0-0
        POPQ    R15
        RET
 
+// Initialize special registers then jump to sigpanic.
+// This function is injected from the signal handler for panicking
+// signals. It is quite painful to set X15 in the signal context,
+// so we do it here.
+TEXT ·sigpanic0<ABIInternal>(SB),NOSPLIT,$0-0
+#ifdef GOEXPERIMENT_REGABI
+       get_tls(R14)
+       MOVQ    g(R14), R14
+       XORPS   X15, X15
+#endif
+       JMP     ·sigpanic<ABIInternal>(SB)
+
 // gcWriteBarrier performs a heap pointer write and informs the GC.
 //
 // gcWriteBarrier does NOT follow the Go ABI. It takes two arguments:
@@ -1390,24 +1386,28 @@ TEXT runtime·addmoduledata(SB),NOSPLIT,$0-0
 // It clobbers FLAGS. It does not clobber any general-purpose registers,
 // but may clobber others (e.g., SSE registers).
 // Defined as ABIInternal since it does not use the stack-based Go ABI.
-TEXT runtime·gcWriteBarrier<ABIInternal>(SB),NOSPLIT,$120
+TEXT runtime·gcWriteBarrier<ABIInternal>(SB),NOSPLIT,$112
        // Save the registers clobbered by the fast path. This is slightly
        // faster than having the caller spill these.
-       MOVQ    R14, 104(SP)
-       MOVQ    R13, 112(SP)
+       MOVQ    R12, 96(SP)
+       MOVQ    R13, 104(SP)
        // TODO: Consider passing g.m.p in as an argument so they can be shared
        // across a sequence of write barriers.
+#ifdef GOEXPERIMENT_REGABI
+       MOVQ    g_m(R14), R13
+#else
        get_tls(R13)
        MOVQ    g(R13), R13
        MOVQ    g_m(R13), R13
+#endif
        MOVQ    m_p(R13), R13
-       MOVQ    (p_wbBuf+wbBuf_next)(R13), R14
+       MOVQ    (p_wbBuf+wbBuf_next)(R13), R12
        // Increment wbBuf.next position.
-       LEAQ    16(R14), R14
-       MOVQ    R14, (p_wbBuf+wbBuf_next)(R13)
-       CMPQ    R14, (p_wbBuf+wbBuf_end)(R13)
+       LEAQ    16(R12), R12
+       MOVQ    R12, (p_wbBuf+wbBuf_next)(R13)
+       CMPQ    R12, (p_wbBuf+wbBuf_end)(R13)
        // Record the write.
-       MOVQ    AX, -16(R14)    // Record value
+       MOVQ    AX, -16(R12)    // Record value
        // Note: This turns bad pointer writes into bad
        // pointer reads, which could be confusing. We could avoid
        // reading from obviously bad pointers, which would
@@ -1415,12 +1415,12 @@ TEXT runtime·gcWriteBarrier<ABIInternal>(SB),NOSPLIT,$120
        // patch this up in the signal handler, or use XCHG to
        // combine the read and the write.
        MOVQ    (DI), R13
-       MOVQ    R13, -8(R14)    // Record *slot
+       MOVQ    R13, -8(R12)    // Record *slot
        // Is the buffer full? (flags set in CMPQ above)
        JEQ     flush
 ret:
-       MOVQ    104(SP), R14
-       MOVQ    112(SP), R13
+       MOVQ    96(SP), R12
+       MOVQ    104(SP), R13
        // Do the write.
        MOVQ    AX, (DI)
        RET
@@ -1450,10 +1450,10 @@ flush:
        MOVQ    R9, 64(SP)
        MOVQ    R10, 72(SP)
        MOVQ    R11, 80(SP)
-       MOVQ    R12, 88(SP)
+       // R12 already saved
        // R13 already saved
-       // R14 already saved
-       MOVQ    R15, 96(SP)
+       // R14 is g
+       MOVQ    R15, 88(SP)
 
        // This takes arguments DI and AX
        CALL    runtime·wbBufFlush(SB)
@@ -1469,8 +1469,7 @@ flush:
        MOVQ    64(SP), R9
        MOVQ    72(SP), R10
        MOVQ    80(SP), R11
-       MOVQ    88(SP), R12
-       MOVQ    96(SP), R15
+       MOVQ    88(SP), R15
        JMP     ret
 
 // gcWriteBarrierCX is gcWriteBarrier, but with args in DI and CX.

diff --git a/src/runtime/asm_arm.s b/src/runtime/asm_arm.s
index c54b4eb0061e64ce95b779a2a091da1fd00e18ac..8eec84d3f2e641fe950cb65a7203f1719a56d11b 100644 (file)
--- a/src/runtime/asm_arm.s
+++ b/src/runtime/asm_arm.s
@@ -206,23 +206,6 @@ TEXT runtime·asminit(SB),NOSPLIT,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB),NOSPLIT|NOFRAME,$0-4
-       MOVW    buf+0(FP), R0
-       MOVW    R13, gobuf_sp(R0)
-       MOVW    LR, gobuf_pc(R0)
-       MOVW    g, gobuf_g(R0)
-       MOVW    $0, R11
-       MOVW    R11, gobuf_lr(R0)
-       MOVW    R11, gobuf_ret(R0)
-       // Assert ctxt is zero. See func save.
-       MOVW    gobuf_ctxt(R0), R0
-       CMP     R0, R11
-       B.EQ    2(PC)
-       CALL    runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB),NOSPLIT,$8-4

diff --git a/src/runtime/asm_arm64.s b/src/runtime/asm_arm64.s
index a09172f0c964dc3d2d52e068aaf67bfdd8b39931..8e4a1f74f9a1703bbbaaf91593fa9caad20a7004 100644 (file)
--- a/src/runtime/asm_arm64.s
+++ b/src/runtime/asm_arm64.s
@@ -113,23 +113,6 @@ TEXT runtime·asminit(SB),NOSPLIT|NOFRAME,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT|NOFRAME, $0-8
-       MOVD    buf+0(FP), R3
-       MOVD    RSP, R0
-       MOVD    R0, gobuf_sp(R3)
-       MOVD    R29, gobuf_bp(R3)
-       MOVD    LR, gobuf_pc(R3)
-       MOVD    g, gobuf_g(R3)
-       MOVD    ZR, gobuf_lr(R3)
-       MOVD    ZR, gobuf_ret(R3)
-       // Assert ctxt is zero. See func save.
-       MOVD    gobuf_ctxt(R3), R0
-       CBZ     R0, 2(PC)
-       CALL    runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $24-8

diff --git a/src/runtime/asm_mips64x.s b/src/runtime/asm_mips64x.s
index 19781f7885fda201c2f5b437bda1ef68cf8d1ec2..054a89dc37eeeefe83fbb9aaa0d270901b1be346 100644 (file)
--- a/src/runtime/asm_mips64x.s
+++ b/src/runtime/asm_mips64x.s
@@ -89,21 +89,6 @@ TEXT runtime·asminit(SB),NOSPLIT|NOFRAME,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT|NOFRAME, $0-8
-       MOVV    buf+0(FP), R1
-       MOVV    R29, gobuf_sp(R1)
-       MOVV    R31, gobuf_pc(R1)
-       MOVV    g, gobuf_g(R1)
-       MOVV    R0, gobuf_lr(R1)
-       MOVV    R0, gobuf_ret(R1)
-       // Assert ctxt is zero. See func save.
-       MOVV    gobuf_ctxt(R1), R1
-       BEQ     R1, 2(PC)
-       JAL     runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $16-8

diff --git a/src/runtime/asm_mipsx.s b/src/runtime/asm_mipsx.s
index ee87d81436304436952bdafc72ed5cd4bd185281..f57437d590279c7cc91111abbd6f1e1b4bef5839 100644 (file)
--- a/src/runtime/asm_mipsx.s
+++ b/src/runtime/asm_mipsx.s
@@ -90,21 +90,6 @@ TEXT runtime·asminit(SB),NOSPLIT,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB),NOSPLIT|NOFRAME,$0-4
-       MOVW    buf+0(FP), R1
-       MOVW    R29, gobuf_sp(R1)
-       MOVW    R31, gobuf_pc(R1)
-       MOVW    g, gobuf_g(R1)
-       MOVW    R0, gobuf_lr(R1)
-       MOVW    R0, gobuf_ret(R1)
-       // Assert ctxt is zero. See func save.
-       MOVW    gobuf_ctxt(R1), R1
-       BEQ     R1, 2(PC)
-       JAL     runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB),NOSPLIT,$8-4

diff --git a/src/runtime/asm_ppc64x.s b/src/runtime/asm_ppc64x.s
index dc34c0e4c876bd1d8d83e96b54307262a15835d2..763a92adf1864e66d0ca70554b5853bab5aef243 100644 (file)
--- a/src/runtime/asm_ppc64x.s
+++ b/src/runtime/asm_ppc64x.s
@@ -128,23 +128,6 @@ TEXT runtime·reginit(SB),NOSPLIT|NOFRAME,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT|NOFRAME, $0-8
-       MOVD    buf+0(FP), R3
-       MOVD    R1, gobuf_sp(R3)
-       MOVD    LR, R31
-       MOVD    R31, gobuf_pc(R3)
-       MOVD    g, gobuf_g(R3)
-       MOVD    R0, gobuf_lr(R3)
-       MOVD    R0, gobuf_ret(R3)
-       // Assert ctxt is zero. See func save.
-       MOVD    gobuf_ctxt(R3), R3
-       CMP     R0, R3
-       BEQ     2(PC)
-       BL      runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $16-8

diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s
index 01b42dc3debe6d98b975e586a963639e27467735..cf460d1586c83a7321f323df769c06f323ac77c6 100644 (file)
--- a/src/runtime/asm_riscv64.s
+++ b/src/runtime/asm_riscv64.s
@@ -297,21 +297,6 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8
        JALR    RA, T1
        JMP     runtime·badmcall2(SB)
 
-// func gosave(buf *gobuf)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT|NOFRAME, $0-8
-       MOV     buf+0(FP), T1
-       MOV     X2, gobuf_sp(T1)
-       MOV     RA, gobuf_pc(T1)
-       MOV     g, gobuf_g(T1)
-       MOV     ZERO, gobuf_lr(T1)
-       MOV     ZERO, gobuf_ret(T1)
-       // Assert ctxt is zero. See func save.
-       MOV     gobuf_ctxt(T1), T1
-       BEQ     T1, ZERO, 2(PC)
-       CALL    runtime·badctxt(SB)
-       RET
-
 // Save state of caller into g->sched. Smashes X31.
 TEXT gosave<>(SB),NOSPLIT|NOFRAME,$0
        MOV     X1, (g_sched+gobuf_pc)(g)

diff --git a/src/runtime/asm_s390x.s b/src/runtime/asm_s390x.s
index 7baef373247551d0b8de92862e271b1b256d45e6..1cd5eca06f8c3ee284eebbc417be23d83e3606ca 100644 (file)
--- a/src/runtime/asm_s390x.s
+++ b/src/runtime/asm_s390x.s
@@ -174,21 +174,6 @@ TEXT runtime·asminit(SB),NOSPLIT|NOFRAME,$0-0
  *  go-routine
  */
 
-// void gosave(Gobuf*)
-// save state in Gobuf; setjmp
-TEXT runtime·gosave(SB), NOSPLIT, $-8-8
-       MOVD    buf+0(FP), R3
-       MOVD    R15, gobuf_sp(R3)
-       MOVD    LR, gobuf_pc(R3)
-       MOVD    g, gobuf_g(R3)
-       MOVD    $0, gobuf_lr(R3)
-       MOVD    $0, gobuf_ret(R3)
-       // Assert ctxt is zero. See func save.
-       MOVD    gobuf_ctxt(R3), R3
-       CMPBEQ  R3, $0, 2(PC)
-       BL      runtime·badctxt(SB)
-       RET
-
 // void gogo(Gobuf*)
 // restore state from Gobuf; longjmp
 TEXT runtime·gogo(SB), NOSPLIT, $16-8

diff --git a/src/runtime/cgo/gcc_amd64.S b/src/runtime/cgo/gcc_amd64.S
index 17d9d47ef40cbc7d3f4e641b012c5cd6d6fd63ab..d75f8646663ab497a7ef5bcea498291f7301772b 100644 (file)
--- a/src/runtime/cgo/gcc_amd64.S
+++ b/src/runtime/cgo/gcc_amd64.S
@@ -30,9 +30,14 @@ EXT(crosscall_amd64):
        pushq %r15
 
 #if defined(_WIN64)
+       movq %r8, %rdi  /* arg of setg_gcc */
+       call *%rdx      /* setg_gcc */
        call *%rcx      /* fn */
 #else
-       call *%rdi      /* fn */
+       movq %rdi, %rbx
+       movq %rdx, %rdi /* arg of setg_gcc */
+       call *%rsi      /* setg_gcc */
+       call *%rbx      /* fn */
 #endif
 
        popq %r15

diff --git a/src/runtime/cgo/gcc_darwin_amd64.c b/src/runtime/cgo/gcc_darwin_amd64.c
index 51410d50269dafd1d5ee4c34294d08b1984a48eb..d5b7fd8fd802bf21d734db635e2a5455fb83403f 100644 (file)
--- a/src/runtime/cgo/gcc_darwin_amd64.c
+++ b/src/runtime/cgo/gcc_darwin_amd64.c
@@ -9,13 +9,16 @@
 #include "libcgo_unix.h"
 
 static void* threadentry(void*);
+static void (*setg_gcc)(void*);
 
 void
-x_cgo_init(G *g)
+x_cgo_init(G *g, void (*setg)(void*), void **tlsg, void **tlsbase)
 {
        pthread_attr_t attr;
        size_t size;
 
+       setg_gcc = setg;
+
        pthread_attr_init(&attr);
        pthread_attr_getstacksize(&attr, &size);
        g->stacklo = (uintptr)&attr - size + 4096;
@@ -57,10 +60,6 @@ threadentry(void *v)
        ts = *(ThreadStart*)v;
        free(v);
 
-       // Move the g pointer into the slot reserved in thread local storage.
-       // Constant must match the one in cmd/link/internal/ld/sym.go.
-       asm volatile("movq %0, %%gs:0x30" :: "r"(ts.g));
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_dragonfly_amd64.c b/src/runtime/cgo/gcc_dragonfly_amd64.c
index d25db91900071aea15e9ceaa4c46a245f73bbb43..0003414bf8665aba986a510192f2e7918fc62a55 100644 (file)
--- a/src/runtime/cgo/gcc_dragonfly_amd64.c
+++ b/src/runtime/cgo/gcc_dragonfly_amd64.c
@@ -61,11 +61,6 @@ threadentry(void *v)
        ts = *(ThreadStart*)v;
        free(v);
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_freebsd_amd64.c b/src/runtime/cgo/gcc_freebsd_amd64.c
index 514a2f8a235ee78c2c1f2e5e75e9ecc01ea49eac..6071ec39093783c469b99079dc770b0f19f896d7 100644 (file)
--- a/src/runtime/cgo/gcc_freebsd_amd64.c
+++ b/src/runtime/cgo/gcc_freebsd_amd64.c
@@ -69,11 +69,6 @@ threadentry(void *v)
        free(v);
        _cgo_tsan_release();
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_linux_amd64.c b/src/runtime/cgo/gcc_linux_amd64.c
index f2bf6482cb5f77689e4446e8ee0a8a87410700df..c25e7e769ba23ddae032e510b1c062dd776f1f6c 100644 (file)
--- a/src/runtime/cgo/gcc_linux_amd64.c
+++ b/src/runtime/cgo/gcc_linux_amd64.c
@@ -89,11 +89,6 @@ threadentry(void *v)
        free(v);
        _cgo_tsan_release();
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_netbsd_amd64.c b/src/runtime/cgo/gcc_netbsd_amd64.c
index dc966fc45b4ba4f3a9b723aace2de527297ea450..9f4b031a08954de8cba3ef6b63e6cd6ff17b0600 100644 (file)
--- a/src/runtime/cgo/gcc_netbsd_amd64.c
+++ b/src/runtime/cgo/gcc_netbsd_amd64.c
@@ -62,11 +62,6 @@ threadentry(void *v)
        ts = *(ThreadStart*)v;
        free(v);
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
        // On NetBSD, a new thread inherits the signal stack of the
        // creating thread. That confuses minit, so we remove that
        // signal stack here before calling the regular mstart. It's
@@ -78,6 +73,6 @@ threadentry(void *v)
        ss.ss_flags = SS_DISABLE;
        sigaltstack(&ss, nil);
 
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_openbsd_amd64.c b/src/runtime/cgo/gcc_openbsd_amd64.c
index 34319fb0b80e3b642ba8f6ce5a51b8bef9609816..09d2750f3ad8f96c7b31d69262fed414381e4be9 100644 (file)
--- a/src/runtime/cgo/gcc_openbsd_amd64.c
+++ b/src/runtime/cgo/gcc_openbsd_amd64.c
@@ -60,11 +60,6 @@ threadentry(void *v)
        ts = *(ThreadStart*)v;
        free(v);
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_solaris_amd64.c b/src/runtime/cgo/gcc_solaris_amd64.c
index 079bd12898e25652bc791cafd5acef38b6e8fc5a..e89e844b1e0ad30ba76d3af59695391e7ceb0eff 100644 (file)
--- a/src/runtime/cgo/gcc_solaris_amd64.c
+++ b/src/runtime/cgo/gcc_solaris_amd64.c
@@ -72,11 +72,6 @@ threadentry(void *v)
        ts = *(ThreadStart*)v;
        free(v);
 
-       /*
-        * Set specific keys.
-        */
-       setg_gcc((void*)ts.g);
-
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
        return nil;
 }

diff --git a/src/runtime/cgo/gcc_windows_amd64.c b/src/runtime/cgo/gcc_windows_amd64.c
index 0f8c817f0e4d138fd7d0efd396d26f16435bd6b3..25cfd086ddc3331997d59e7cb24a061b42d64e15 100644 (file)
--- a/src/runtime/cgo/gcc_windows_amd64.c
+++ b/src/runtime/cgo/gcc_windows_amd64.c
@@ -12,10 +12,12 @@
 #include "libcgo_windows.h"
 
 static void threadentry(void*);
+static void (*setg_gcc)(void*);
 
 void
-x_cgo_init(G *g)
+x_cgo_init(G *g, void (*setg)(void*), void **tlsg, void **tlsbase)
 {
+       setg_gcc = setg;
 }
 
 
@@ -46,10 +48,8 @@ threadentry(void *v)
         */
        asm volatile (
          "movq %0, %%gs:0x28\n"        // MOVL tls0, 0x28(GS)
-         "movq %%gs:0x28, %%rax\n" // MOVQ 0x28(GS), tmp
-         "movq %1, 0(%%rax)\n" // MOVQ g, 0(GS)
-         :: "r"(ts.tls), "r"(ts.g) : "%rax"
+         :: "r"(ts.tls)
        );
 
-       crosscall_amd64(ts.fn);
+       crosscall_amd64(ts.fn, setg_gcc, (void*)ts.g);
 }

diff --git a/src/runtime/cgo/libcgo.h b/src/runtime/cgo/libcgo.h
index aba500a301c66a0c1864c3fd9c61ebfc56e21a5f..af4960e7e952206a0923d4495137bb8eafeac9b4 100644 (file)
--- a/src/runtime/cgo/libcgo.h
+++ b/src/runtime/cgo/libcgo.h
@@ -66,7 +66,7 @@ uintptr_t _cgo_wait_runtime_init_done(void);
 /*
  * Call fn in the 6c world.
  */
-void crosscall_amd64(void (*fn)(void));
+void crosscall_amd64(void (*fn)(void), void (*setg_gcc)(void*), void *g);
 
 /*
  * Call fn in the 8c world.

diff --git a/src/runtime/duff_amd64.s b/src/runtime/duff_amd64.s
index 2ff5bf6dbcd66cfa51d8c0d0ca6bf32dcdcc9c03..df010f58533be30ae2ad5ae99c2ce55af283611b 100644 (file)
--- a/src/runtime/duff_amd64.s
+++ b/src/runtime/duff_amd64.s
@@ -5,100 +5,100 @@
 #include "textflag.h"
 
 TEXT runtime·duffzero<ABIInternal>(SB), NOSPLIT, $0-0
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
-       MOVUPS  X0,(DI)
-       MOVUPS  X0,16(DI)
-       MOVUPS  X0,32(DI)
-       MOVUPS  X0,48(DI)
+       MOVUPS  X15,(DI)
+       MOVUPS  X15,16(DI)
+       MOVUPS  X15,32(DI)
+       MOVUPS  X15,48(DI)
        LEAQ    64(DI),DI
 
        RET

diff --git a/src/runtime/histogram.go b/src/runtime/histogram.go
index 42baa6c5e2c0df3765e21e307bfdc4c1c808a92d..da4910d341cbcf861059f292eb4576a8e762e75a 100644 (file)
--- a/src/runtime/histogram.go
+++ b/src/runtime/histogram.go
@@ -26,7 +26,7 @@ const (
        // The number of super-buckets (timeHistNumSuperBuckets), on the
        // other hand, defines the range. To reserve room for sub-buckets,
        // bit timeHistSubBucketBits is the first bit considered for
-       // super-buckets, so super-bucket indicies are adjusted accordingly.
+       // super-buckets, so super-bucket indices are adjusted accordingly.
        //
        // As an example, consider 45 super-buckets with 16 sub-buckets.
        //

diff --git a/src/runtime/metrics/example_test.go b/src/runtime/metrics/example_test.go
index cade0c38bfde62c046d3e7c9332cff9163b4c23b..624d9d8a6bd1ec9d09c00172866b741efbd7470f 100644 (file)
--- a/src/runtime/metrics/example_test.go
+++ b/src/runtime/metrics/example_test.go
@@ -88,7 +88,7 @@ func medianBucket(h *metrics.Float64Histogram) float64 {
        total = 0
        for i, count := range h.Counts {
                total += count
-               if total > thresh {
+               if total >= thresh {
                        return h.Buckets[i]
                }
        }

diff --git a/src/runtime/mkduff.go b/src/runtime/mkduff.go
index 94ae75fbfe5ff93166e5b0243d01c206e5b6bffe..ef297f073e099fa4538cea75c218cc60c37638ee 100644 (file)
--- a/src/runtime/mkduff.go
+++ b/src/runtime/mkduff.go
@@ -62,15 +62,15 @@ func gen(arch string, tags, zero, copy func(io.Writer)) {
 func notags(w io.Writer) { fmt.Fprintln(w) }
 
 func zeroAMD64(w io.Writer) {
-       // X0: zero
+       // X15: zero
        // DI: ptr to memory to be zeroed
        // DI is updated as a side effect.
-       fmt.Fprintln(w, "TEXT runtime·duffzero(SB), NOSPLIT, $0-0")
+       fmt.Fprintln(w, "TEXT runtime·duffzero<ABIInternal>(SB), NOSPLIT, $0-0")
        for i := 0; i < 16; i++ {
-               fmt.Fprintln(w, "\tMOVUPS\tX0,(DI)")
-               fmt.Fprintln(w, "\tMOVUPS\tX0,16(DI)")
-               fmt.Fprintln(w, "\tMOVUPS\tX0,32(DI)")
-               fmt.Fprintln(w, "\tMOVUPS\tX0,48(DI)")
+               fmt.Fprintln(w, "\tMOVUPS\tX15,(DI)")
+               fmt.Fprintln(w, "\tMOVUPS\tX15,16(DI)")
+               fmt.Fprintln(w, "\tMOVUPS\tX15,32(DI)")
+               fmt.Fprintln(w, "\tMOVUPS\tX15,48(DI)")
                fmt.Fprintln(w, "\tLEAQ\t64(DI),DI") // We use lea instead of add, to avoid clobbering flags
                fmt.Fprintln(w)
        }
@@ -84,7 +84,7 @@ func copyAMD64(w io.Writer) {
        //
        // This is equivalent to a sequence of MOVSQ but
        // for some reason that is 3.5x slower than this code.
-       fmt.Fprintln(w, "TEXT runtime·duffcopy(SB), NOSPLIT, $0-0")
+       fmt.Fprintln(w, "TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT, $0-0")
        for i := 0; i < 64; i++ {
                fmt.Fprintln(w, "\tMOVUPS\t(SI), X0")
                fmt.Fprintln(w, "\tADDQ\t$16, SI")

diff --git a/src/runtime/race_amd64.s b/src/runtime/race_amd64.s
index 9818bc6ddff97e2366c80fb89cc4e4b3f2362c75..c3b7bbfbfe2e8084780fa123c1b326252705a362 100644 (file)
--- a/src/runtime/race_amd64.s
+++ b/src/runtime/race_amd64.s
@@ -146,8 +146,10 @@ TEXT       runtime·racewriterangepc1(SB), NOSPLIT, $0-24
 // If addr (RARG1) is out of range, do nothing.
 // Otherwise, setup goroutine context and invoke racecall. Other arguments already set.
 TEXT   racecalladdr<>(SB), NOSPLIT, $0-0
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_racectx(R14), RARG0   // goroutine context
        // Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend).
        CMPQ    RARG1, runtime·racearenastart(SB)
@@ -183,8 +185,10 @@ TEXT       runtime·racefuncenter(SB), NOSPLIT, $0-8
 // R11 = caller's return address
 TEXT   racefuncenter<>(SB), NOSPLIT, $0-0
        MOVQ    DX, R15         // save function entry context (for closures)
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_racectx(R14), RARG0   // goroutine context
        MOVQ    R11, RARG1
        // void __tsan_func_enter(ThreadState *thr, void *pc);
@@ -197,8 +201,10 @@ TEXT       racefuncenter<>(SB), NOSPLIT, $0-0
 // func runtime·racefuncexit()
 // Called from instrumented code.
 TEXT   runtime·racefuncexit(SB), NOSPLIT, $0-0
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_racectx(R14), RARG0   // goroutine context
        // void __tsan_func_exit(ThreadState *thr);
        MOVQ    $__tsan_func_exit(SB), AX
@@ -357,8 +363,10 @@ racecallatomic_data:
        JAE     racecallatomic_ignore
 racecallatomic_ok:
        // Addr is within the good range, call the atomic function.
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_racectx(R14), RARG0   // goroutine context
        MOVQ    8(SP), RARG1    // caller pc
        MOVQ    (SP), RARG2     // pc
@@ -370,8 +378,10 @@ racecallatomic_ignore:
        // An attempt to synchronize on the address would cause crash.
        MOVQ    AX, R15 // remember the original function
        MOVQ    $__tsan_go_ignore_sync_begin(SB), AX
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_racectx(R14), RARG0   // goroutine context
        CALL    racecall<>(SB)
        MOVQ    R15, AX // restore the original function
@@ -399,8 +409,10 @@ TEXT       runtime·racecall(SB), NOSPLIT, $0-0
 
 // Switches SP to g0 stack and calls (AX). Arguments already set.
 TEXT   racecall<>(SB), NOSPLIT, $0-0
+#ifndef GOEXPERIMENT_REGABI
        get_tls(R12)
        MOVQ    g(R12), R14
+#endif
        MOVQ    g_m(R14), R13
        // Switch to g0 stack.
        MOVQ    SP, R12         // callee-saved, preserved across the CALL
@@ -412,6 +424,9 @@ call:
        ANDQ    $~15, SP        // alignment for gcc ABI
        CALL    AX
        MOVQ    R12, SP
+       // Back to Go world, set special registers.
+       // The g register (R14) is preserved in C.
+       XORPS   X15, X15
        RET
 
 // C->Go callback thunk that allows to call runtime·racesymbolize from C code.
@@ -419,7 +434,9 @@ call:
 // The overall effect of Go->C->Go call chain is similar to that of mcall.
 // RARG0 contains command code. RARG1 contains command-specific context.
 // See racecallback for command codes.
-TEXT   runtime·racecallbackthunk(SB), NOSPLIT, $56-8
+// Defined as ABIInternal so as to avoid introducing a wrapper,
+// because its address is passed to C via funcPC.
+TEXT   runtime·racecallbackthunk<ABIInternal>(SB), NOSPLIT, $56-8
        // Handle command raceGetProcCmd (0) here.
        // First, code below assumes that we are on curg, while raceGetProcCmd
        // can be executed on g0. Second, it is called frequently, so will
@@ -447,12 +464,13 @@ rest:
        PUSHQ   R15
        // Set g = g0.
        get_tls(R12)
-       MOVQ    g(R12), R13
-       MOVQ    g_m(R13), R14
-       MOVQ    m_g0(R14), R15
+       MOVQ    g(R12), R14
+       MOVQ    g_m(R14), R13
+       MOVQ    m_g0(R13), R15
        CMPQ    R13, R15
        JEQ     noswitch        // branch if already on g0
        MOVQ    R15, g(R12)     // g = m->g0
+       MOVQ    R15, R14        // set g register
        PUSHQ   RARG1   // func arg
        PUSHQ   RARG0   // func arg
        CALL    runtime·racecallback(SB)

diff --git a/src/runtime/signal_amd64.go b/src/runtime/signal_amd64.go
index 6ab1f758c2293542396062811536109be2964ccb..3eeb5e044ff0ff1c5cae3d43ca064dda5b37dde1 100644 (file)
--- a/src/runtime/signal_amd64.go
+++ b/src/runtime/signal_amd64.go
@@ -65,11 +65,14 @@ func (c *sigctxt) preparePanic(sig uint32, gp *g) {
        pc := uintptr(c.rip())
        sp := uintptr(c.rsp())
 
+       // In case we are panicking from external code, we need to initialize
+       // Go special registers. We inject sigpanic0 (instead of sigpanic),
+       // which takes care of that.
        if shouldPushSigpanic(gp, pc, *(*uintptr)(unsafe.Pointer(sp))) {
-               c.pushCall(funcPC(sigpanic), pc)
+               c.pushCall(funcPC(sigpanic0), pc)
        } else {
                // Not safe to push the call. Just clobber the frame.
-               c.set_rip(uint64(funcPC(sigpanic)))
+               c.set_rip(uint64(funcPC(sigpanic0)))
        }
 }
 

diff --git a/src/runtime/stubs.go b/src/runtime/stubs.go
index 2ee2c74dfe07e5f1ef4e881352f296697644aab4..3d1e0c0bb4dd702ae3f0a1e91bb40ffc4f7b2225 100644 (file)
--- a/src/runtime/stubs.go
+++ b/src/runtime/stubs.go
@@ -167,7 +167,6 @@ func noescape(p unsafe.Pointer) unsafe.Pointer {
 // pointer-declared arguments.
 func cgocallback(fn, frame, ctxt uintptr)
 func gogo(buf *gobuf)
-func gosave(buf *gobuf)
 
 //go:noescape
 func jmpdefer(fv *funcval, argp uintptr)
@@ -357,3 +356,7 @@ func duffcopy()
 
 // Called from linker-generated .initarray; declared for go vet; do NOT call from Go.
 func addmoduledata()
+
+// Injected by the signal handler for panicking signals. On many platforms it just
+// jumps to sigpanic.
+func sigpanic0()

diff --git a/src/runtime/sys_darwin_amd64.s b/src/runtime/sys_darwin_amd64.s
index 630fb5df64fd2c73fd0c49f0d630a571a41dc2f5..0fe8c7e172f5b59df7aefa62379186b6ee00d489 100644 (file)
--- a/src/runtime/sys_darwin_amd64.s
+++ b/src/runtime/sys_darwin_amd64.s
@@ -5,6 +5,8 @@
 // System calls and other sys.stuff for AMD64, Darwin
 // System calls are implemented in libSystem, this file contains
 // trampolines that convert from Go to C calling convention.
+// The trampolines are ABIInternal as they are referenced from
+// Go code with funcPC.
 
 #include "go_asm.h"
 #include "go_tls.h"
@@ -13,7 +15,7 @@
 #define CLOCK_REALTIME         0
 
 // Exit the entire program (like C exit)
-TEXT runtime·exit_trampoline(SB),NOSPLIT,$0
+TEXT runtime·exit_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    0(DI), DI               // arg 1 exit status
@@ -22,7 +24,7 @@ TEXT runtime·exit_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·open_trampoline(SB),NOSPLIT,$0
+TEXT runtime·open_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    8(DI), SI               // arg 2 flags
@@ -33,7 +35,7 @@ TEXT runtime·open_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·close_trampoline(SB),NOSPLIT,$0
+TEXT runtime·close_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    0(DI), DI               // arg 1 fd
@@ -41,7 +43,7 @@ TEXT runtime·close_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·read_trampoline(SB),NOSPLIT,$0
+TEXT runtime·read_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 buf
@@ -57,7 +59,7 @@ noerr:
        POPQ    BP
        RET
 
-TEXT runtime·write_trampoline(SB),NOSPLIT,$0
+TEXT runtime·write_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 buf
@@ -73,7 +75,7 @@ noerr:
        POPQ    BP
        RET
 
-TEXT runtime·pipe_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pipe_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        CALL    libc_pipe(SB)           // pointer already in DI
@@ -84,7 +86,7 @@ TEXT runtime·pipe_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·setitimer_trampoline(SB),NOSPLIT,$0
+TEXT runtime·setitimer_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 new
@@ -94,7 +96,7 @@ TEXT runtime·setitimer_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·madvise_trampoline(SB), NOSPLIT, $0
+TEXT runtime·madvise_trampoline<ABIInternal>(SB), NOSPLIT, $0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 len
@@ -105,12 +107,12 @@ TEXT runtime·madvise_trampoline(SB), NOSPLIT, $0
        POPQ    BP
        RET
 
-TEXT runtime·mlock_trampoline(SB), NOSPLIT, $0
+TEXT runtime·mlock_trampoline<ABIInternal>(SB), NOSPLIT, $0
        UNDEF // unimplemented
 
 GLOBL timebase<>(SB),NOPTR,$(machTimebaseInfo__size)
 
-TEXT runtime·nanotime_trampoline(SB),NOSPLIT,$0
+TEXT runtime·nanotime_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    DI, BX
@@ -139,7 +141,7 @@ initialized:
        POPQ    BP
        RET
 
-TEXT runtime·walltime_trampoline(SB),NOSPLIT,$0
+TEXT runtime·walltime_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP                      // make a frame; keep stack aligned
        MOVQ    SP, BP
        MOVQ    DI, SI                  // arg 2 timespec
@@ -148,7 +150,7 @@ TEXT runtime·walltime_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·sigaction_trampoline(SB),NOSPLIT,$0
+TEXT runtime·sigaction_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 new
@@ -161,7 +163,7 @@ TEXT runtime·sigaction_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·sigprocmask_trampoline(SB),NOSPLIT,$0
+TEXT runtime·sigprocmask_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 new
@@ -174,7 +176,7 @@ TEXT runtime·sigprocmask_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·sigaltstack_trampoline(SB),NOSPLIT,$0
+TEXT runtime·sigaltstack_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 old
@@ -186,7 +188,7 @@ TEXT runtime·sigaltstack_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·raiseproc_trampoline(SB),NOSPLIT,$0
+TEXT runtime·raiseproc_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    0(DI), BX       // signal
@@ -212,7 +214,7 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32
 
 // This is the function registered during sigaction and is invoked when
 // a signal is received. It just redirects to the Go function sigtrampgo.
-TEXT runtime·sigtramp(SB),NOSPLIT,$0
+TEXT runtime·sigtramp<ABIInternal>(SB),NOSPLIT,$0
        // This runs on the signal stack, so we have lots of stack available.
        // We allocate our own stack space, because if we tell the linker
        // how much we're using, the NOSPLIT check fails.
@@ -246,7 +248,7 @@ TEXT runtime·sigtramp(SB),NOSPLIT,$0
 
 // Used instead of sigtramp in programs that use cgo.
 // Arguments from kernel are in DI, SI, DX.
-TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0
+TEXT runtime·cgoSigtramp<ABIInternal>(SB),NOSPLIT,$0
        // If no traceback function, do usual sigtramp.
        MOVQ    runtime·cgoTraceback(SB), AX
        TESTQ   AX, AX
@@ -289,12 +291,12 @@ TEXT runtime·cgoSigtramp(SB),NOSPLIT,$0
        // The first three arguments, and the fifth, are already in registers.
        // Set the two remaining arguments now.
        MOVQ    runtime·cgoTraceback(SB), CX
-       MOVQ    $runtime·sigtramp(SB), R9
+       MOVQ    $runtime·sigtramp<ABIInternal>(SB), R9
        MOVQ    _cgo_callers(SB), AX
        JMP     AX
 
 sigtramp:
-       JMP     runtime·sigtramp(SB)
+       JMP     runtime·sigtramp<ABIInternal>(SB)
 
 sigtrampnog:
        // Signal arrived on a non-Go thread. If this is SIGPROF, get a
@@ -320,7 +322,7 @@ sigtrampnog:
        MOVQ    _cgo_callers(SB), AX
        JMP     AX
 
-TEXT runtime·mmap_trampoline(SB),NOSPLIT,$0
+TEXT runtime·mmap_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP                      // make a frame; keep stack aligned
        MOVQ    SP, BP
        MOVQ    DI, BX
@@ -343,7 +345,7 @@ ok:
        POPQ    BP
        RET
 
-TEXT runtime·munmap_trampoline(SB),NOSPLIT,$0
+TEXT runtime·munmap_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 len
@@ -355,7 +357,7 @@ TEXT runtime·munmap_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·usleep_trampoline(SB),NOSPLIT,$0
+TEXT runtime·usleep_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    0(DI), DI       // arg 1 usec
@@ -367,7 +369,7 @@ TEXT runtime·settls(SB),NOSPLIT,$32
        // Nothing to do on Darwin, pthread already set thread-local storage up.
        RET
 
-TEXT runtime·sysctl_trampoline(SB),NOSPLIT,$0
+TEXT runtime·sysctl_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    8(DI), SI               // arg 2 miblen
@@ -380,7 +382,7 @@ TEXT runtime·sysctl_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·sysctlbyname_trampoline(SB),NOSPLIT,$0
+TEXT runtime·sysctlbyname_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 oldp
@@ -392,14 +394,14 @@ TEXT runtime·sysctlbyname_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·kqueue_trampoline(SB),NOSPLIT,$0
+TEXT runtime·kqueue_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        CALL    libc_kqueue(SB)
        POPQ    BP
        RET
 
-TEXT runtime·kevent_trampoline(SB),NOSPLIT,$0
+TEXT runtime·kevent_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI               // arg 2 keventt
@@ -418,7 +420,7 @@ ok:
        POPQ    BP
        RET
 
-TEXT runtime·fcntl_trampoline(SB),NOSPLIT,$0
+TEXT runtime·fcntl_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    4(DI), SI               // arg 2 cmd
@@ -475,7 +477,7 @@ TEXT runtime·mstart_stub(SB),NOSPLIT,$0
 // A pointer to the arguments is passed in DI.
 // A single int32 result is returned in AX.
 // (For more results, make an args/results structure.)
-TEXT runtime·pthread_attr_init_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_attr_init_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP      // make frame, keep stack 16-byte aligned.
        MOVQ    SP, BP
        MOVQ    0(DI), DI // arg 1 attr
@@ -483,7 +485,7 @@ TEXT runtime·pthread_attr_init_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_attr_getstacksize_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_attr_getstacksize_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 size
@@ -492,7 +494,7 @@ TEXT runtime·pthread_attr_getstacksize_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_attr_setdetachstate_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_attr_setdetachstate_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 state
@@ -501,7 +503,7 @@ TEXT runtime·pthread_attr_setdetachstate_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_create_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_create_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -514,7 +516,7 @@ TEXT runtime·pthread_create_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·raise_trampoline(SB),NOSPLIT,$0
+TEXT runtime·raise_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVL    0(DI), DI       // arg 1 signal
@@ -522,7 +524,7 @@ TEXT runtime·raise_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_mutex_init_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_mutex_init_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 attr
@@ -531,7 +533,7 @@ TEXT runtime·pthread_mutex_init_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_mutex_lock_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_mutex_lock_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    0(DI), DI       // arg 1 mutex
@@ -539,7 +541,7 @@ TEXT runtime·pthread_mutex_lock_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_mutex_unlock_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_mutex_unlock_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    0(DI), DI       // arg 1 mutex
@@ -547,7 +549,7 @@ TEXT runtime·pthread_mutex_unlock_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_cond_init_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_cond_init_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 attr
@@ -556,7 +558,7 @@ TEXT runtime·pthread_cond_init_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_cond_wait_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_cond_wait_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 mutex
@@ -565,7 +567,7 @@ TEXT runtime·pthread_cond_wait_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_cond_timedwait_relative_np_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_cond_timedwait_relative_np_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 mutex
@@ -575,7 +577,7 @@ TEXT runtime·pthread_cond_timedwait_relative_np_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_cond_signal_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_cond_signal_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    0(DI), DI       // arg 1 cond
@@ -583,7 +585,7 @@ TEXT runtime·pthread_cond_signal_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_self_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_self_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    DI, BX          // BX is caller-save
@@ -592,7 +594,7 @@ TEXT runtime·pthread_self_trampoline(SB),NOSPLIT,$0
        POPQ    BP
        RET
 
-TEXT runtime·pthread_kill_trampoline(SB),NOSPLIT,$0
+TEXT runtime·pthread_kill_trampoline<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        MOVQ    8(DI), SI       // arg 2 sig
@@ -617,7 +619,7 @@ TEXT runtime·pthread_kill_trampoline(SB),NOSPLIT,$0
 //
 // syscall expects a 32-bit result and tests for 32-bit -1
 // to decide there was an error.
-TEXT runtime·syscall(SB),NOSPLIT,$0
+TEXT runtime·syscall<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -667,7 +669,7 @@ ok:
 //
 // syscallX is like syscall but expects a 64-bit result
 // and tests for 64-bit -1 to decide there was an error.
-TEXT runtime·syscallX(SB),NOSPLIT,$0
+TEXT runtime·syscallX<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -703,7 +705,7 @@ ok:
 
 // syscallPtr is like syscallX except that the libc function reports an
 // error by returning NULL and setting errno.
-TEXT runtime·syscallPtr(SB),NOSPLIT,$0
+TEXT runtime·syscallPtr<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -756,7 +758,7 @@ ok:
 //
 // syscall6 expects a 32-bit result and tests for 32-bit -1
 // to decide there was an error.
-TEXT runtime·syscall6(SB),NOSPLIT,$0
+TEXT runtime·syscall6<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -809,7 +811,7 @@ ok:
 //
 // syscall6X is like syscall6 but expects a 64-bit result
 // and tests for 64-bit -1 to decide there was an error.
-TEXT runtime·syscall6X(SB),NOSPLIT,$0
+TEXT runtime·syscall6X<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP
@@ -845,7 +847,7 @@ ok:
 
 // syscallNoErr is like syscall6 but does not check for errors, and
 // only returns one value, for use with standard C ABI library functions.
-TEXT runtime·syscallNoErr(SB),NOSPLIT,$0
+TEXT runtime·syscallNoErr<ABIInternal>(SB),NOSPLIT,$0
        PUSHQ   BP
        MOVQ    SP, BP
        SUBQ    $16, SP

diff --git a/src/runtime/sys_linux_amd64.s b/src/runtime/sys_linux_amd64.s
index 37cb8dad0369e27cef3630c4227a94adb1c80867..d48573c2c592258ee749a5cd3ec24270c2ae55a9 100644 (file)
--- a/src/runtime/sys_linux_amd64.s
+++ b/src/runtime/sys_linux_amd64.s
@@ -215,9 +215,13 @@ TEXT runtime·walltime1(SB),NOSPLIT,$16-12
 
        MOVQ    SP, R12 // Save old SP; R12 unchanged by C code.
 
+#ifdef GOEXPERIMENT_REGABI
+       MOVQ    g_m(R14), BX // BX unchanged by C code.
+#else
        get_tls(CX)
        MOVQ    g(CX), AX
        MOVQ    g_m(AX), BX // BX unchanged by C code.
+#endif
 
        // Set vdsoPC and vdsoSP for SIGPROF traceback.
        // Save the old values on stack and restore them on exit,
@@ -232,7 +236,11 @@ TEXT runtime·walltime1(SB),NOSPLIT,$16-12
        MOVQ    CX, m_vdsoPC(BX)
        MOVQ    DX, m_vdsoSP(BX)
 
+#ifdef GOEXPERIMENT_REGABI
+       CMPQ    R14, m_curg(BX) // Only switch if on curg.
+#else
        CMPQ    AX, m_curg(BX)  // Only switch if on curg.
+#endif
        JNE     noswitch
 
        MOVQ    m_g0(BX), DX
@@ -275,9 +283,13 @@ TEXT runtime·nanotime1(SB),NOSPLIT,$16-8
 
        MOVQ    SP, R12 // Save old SP; R12 unchanged by C code.
 
+#ifdef GOEXPERIMENT_REGABI
+       MOVQ    g_m(R14), BX // BX unchanged by C code.
+#else
        get_tls(CX)
        MOVQ    g(CX), AX
        MOVQ    g_m(AX), BX // BX unchanged by C code.
+#endif
 
        // Set vdsoPC and vdsoSP for SIGPROF traceback.
        // Save the old values on stack and restore them on exit,
@@ -292,7 +304,11 @@ TEXT runtime·nanotime1(SB),NOSPLIT,$16-8
        MOVQ    CX, m_vdsoPC(BX)
        MOVQ    DX, m_vdsoSP(BX)
 
+#ifdef GOEXPERIMENT_REGABI
+       CMPQ    R14, m_curg(BX) // Only switch if on curg.
+#else
        CMPQ    AX, m_curg(BX)  // Only switch if on curg.
+#endif
        JNE     noswitch
 
        MOVQ    m_g0(BX), DX
@@ -632,6 +648,7 @@ nog1:
        get_tls(CX)
        MOVQ    R13, g_m(R9)
        MOVQ    R9, g(CX)
+       MOVQ    R9, R14 // set g register
        CALL    runtime·stackcheck(SB)
 
 nog2:

diff --git a/src/syscall/exec_plan9.go b/src/syscall/exec_plan9.go
index 47ccbdc384e93a8f826cf0de3b19f5f0e349aa5b..12c4237f69e4e7ed6a8d05257b594c84d276a477 100644 (file)
--- a/src/syscall/exec_plan9.go
+++ b/src/syscall/exec_plan9.go
@@ -320,14 +320,15 @@ func cexecPipe(p []int) error {
                return e
        }
 
-       fd, e := Open("#d/"+itoa(p[1]), O_CLOEXEC)
+       fd, e := Open("#d/"+itoa(p[1]), O_RDWR|O_CLOEXEC)
        if e != nil {
                Close(p[0])
                Close(p[1])
                return e
        }
 
-       Close(fd)
+       Close(p[1])
+       p[1] = fd
        return nil
 }
 

diff --git a/src/syscall/mkasm.go b/src/syscall/mkasm.go
index 2ebaf8d3513e53b2cedb20f85fdcb07cff2c1f17..e53d14bed10b26e386fc602e04e6e822f2dc7be9 100644 (file)
--- a/src/syscall/mkasm.go
+++ b/src/syscall/mkasm.go
@@ -53,7 +53,8 @@ func main() {
                fn := line[5 : len(line)-13]
                if !trampolines[fn] {
                        trampolines[fn] = true
-                       fmt.Fprintf(&out, "TEXT ·%s_trampoline(SB),NOSPLIT,$0-0\n", fn)
+                       // The trampolines are ABIInternal as they are address-taken in Go code.
+                       fmt.Fprintf(&out, "TEXT ·%s_trampoline<ABIInternal>(SB),NOSPLIT,$0-0\n", fn)
                        fmt.Fprintf(&out, "\tJMP\t%s(SB)\n", fn)
                }
        }

diff --git a/src/syscall/zsyscall_darwin_amd64.s b/src/syscall/zsyscall_darwin_amd64.s
index 492f94785548754bc70c6db0c60ba87217f5a959..5eb48cee447a3023aa65323d19ec8dc5514cf18a 100644 (file)
--- a/src/syscall/zsyscall_darwin_amd64.s
+++ b/src/syscall/zsyscall_darwin_amd64.s
@@ -1,253 +1,253 @@
 // go run mkasm.go darwin amd64
 // Code generated by the command above; DO NOT EDIT.
 #include "textflag.h"
-TEXT ·libc_getfsstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getfsstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getfsstat(SB)
-TEXT ·libc_setattrlist_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setattrlist_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setattrlist(SB)
-TEXT ·libc_fdopendir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fdopendir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fdopendir(SB)
-TEXT ·libc_sendfile_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendfile_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendfile(SB)
-TEXT ·libc_getgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgroups(SB)
-TEXT ·libc_setgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgroups(SB)
-TEXT ·libc_wait4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_wait4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_wait4(SB)
-TEXT ·libc_accept_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept(SB)
-TEXT ·libc_bind_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_bind_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_bind(SB)
-TEXT ·libc_connect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_connect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_connect(SB)
-TEXT ·libc_socket_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socket_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socket(SB)
-TEXT ·libc_getsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockopt(SB)
-TEXT ·libc_setsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsockopt(SB)
-TEXT ·libc_getpeername_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpeername_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpeername(SB)
-TEXT ·libc_getsockname_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockname_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockname(SB)
-TEXT ·libc_shutdown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_shutdown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_shutdown(SB)
-TEXT ·libc_socketpair_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socketpair_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socketpair(SB)
-TEXT ·libc_recvfrom_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvfrom_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvfrom(SB)
-TEXT ·libc_sendto_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendto_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendto(SB)
-TEXT ·libc_recvmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvmsg(SB)
-TEXT ·libc_sendmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendmsg(SB)
-TEXT ·libc_kevent_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kevent_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kevent(SB)
-TEXT ·libc_utimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimes(SB)
-TEXT ·libc_futimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_futimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_futimes(SB)
-TEXT ·libc_fcntl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fcntl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fcntl(SB)
-TEXT ·libc_pipe_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pipe_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pipe(SB)
-TEXT ·libc_kill_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kill_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kill(SB)
-TEXT ·libc_access_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_access_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_access(SB)
-TEXT ·libc_adjtime_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_adjtime_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_adjtime(SB)
-TEXT ·libc_chdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chdir(SB)
-TEXT ·libc_chflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chflags(SB)
-TEXT ·libc_chmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chmod(SB)
-TEXT ·libc_chown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chown(SB)
-TEXT ·libc_chroot_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chroot_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chroot(SB)
-TEXT ·libc_close_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_close_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_close(SB)
-TEXT ·libc_closedir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_closedir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_closedir(SB)
-TEXT ·libc_dup_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup(SB)
-TEXT ·libc_dup2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup2(SB)
-TEXT ·libc_exchangedata_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exchangedata_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exchangedata(SB)
-TEXT ·libc_fchdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchdir(SB)
-TEXT ·libc_fchflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchflags(SB)
-TEXT ·libc_fchmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchmod(SB)
-TEXT ·libc_fchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchown(SB)
-TEXT ·libc_flock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_flock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_flock(SB)
-TEXT ·libc_fpathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fpathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fpathconf(SB)
-TEXT ·libc_fsync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fsync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fsync(SB)
-TEXT ·libc_ftruncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ftruncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ftruncate(SB)
-TEXT ·libc_getdtablesize_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getdtablesize_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getdtablesize(SB)
-TEXT ·libc_getegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getegid(SB)
-TEXT ·libc_geteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_geteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_geteuid(SB)
-TEXT ·libc_getgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgid(SB)
-TEXT ·libc_getpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgid(SB)
-TEXT ·libc_getpgrp_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgrp_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgrp(SB)
-TEXT ·libc_getpid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpid(SB)
-TEXT ·libc_getppid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getppid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getppid(SB)
-TEXT ·libc_getpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpriority(SB)
-TEXT ·libc_getrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrlimit(SB)
-TEXT ·libc_getrusage_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrusage_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrusage(SB)
-TEXT ·libc_getsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsid(SB)
-TEXT ·libc_getuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getuid(SB)
-TEXT ·libc_issetugid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_issetugid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_issetugid(SB)
-TEXT ·libc_kqueue_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kqueue_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kqueue(SB)
-TEXT ·libc_lchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lchown(SB)
-TEXT ·libc_link_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_link_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_link(SB)
-TEXT ·libc_listen_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_listen_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_listen(SB)
-TEXT ·libc_mkdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkdir(SB)
-TEXT ·libc_mkfifo_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkfifo_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkfifo(SB)
-TEXT ·libc_mknod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mknod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mknod(SB)
-TEXT ·libc_mlock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mlock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mlock(SB)
-TEXT ·libc_mlockall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mlockall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mlockall(SB)
-TEXT ·libc_mprotect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mprotect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mprotect(SB)
-TEXT ·libc_munlock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munlock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munlock(SB)
-TEXT ·libc_munlockall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munlockall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munlockall(SB)
-TEXT ·libc_open_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_open_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_open(SB)
-TEXT ·libc_pathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pathconf(SB)
-TEXT ·libc_pread_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pread_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pread(SB)
-TEXT ·libc_pwrite_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pwrite_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pwrite(SB)
-TEXT ·libc_read_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_read_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_read(SB)
-TEXT ·libc_readdir_r_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readdir_r_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readdir_r(SB)
-TEXT ·libc_readlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readlink(SB)
-TEXT ·libc_rename_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rename_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rename(SB)
-TEXT ·libc_revoke_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_revoke_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_revoke(SB)
-TEXT ·libc_rmdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rmdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rmdir(SB)
-TEXT ·libc_lseek_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lseek_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lseek(SB)
-TEXT ·libc_select_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_select_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_select(SB)
-TEXT ·libc_setegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setegid(SB)
-TEXT ·libc_seteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_seteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_seteuid(SB)
-TEXT ·libc_setgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgid(SB)
-TEXT ·libc_setlogin_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setlogin_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setlogin(SB)
-TEXT ·libc_setpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpgid(SB)
-TEXT ·libc_setpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpriority(SB)
-TEXT ·libc_setprivexec_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setprivexec_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setprivexec(SB)
-TEXT ·libc_setregid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setregid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setregid(SB)
-TEXT ·libc_setreuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setreuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setreuid(SB)
-TEXT ·libc_setrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setrlimit(SB)
-TEXT ·libc_setsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsid(SB)
-TEXT ·libc_settimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_settimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_settimeofday(SB)
-TEXT ·libc_setuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setuid(SB)
-TEXT ·libc_symlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_symlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_symlink(SB)
-TEXT ·libc_sync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sync(SB)
-TEXT ·libc_truncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_truncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_truncate(SB)
-TEXT ·libc_umask_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_umask_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_umask(SB)
-TEXT ·libc_undelete_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_undelete_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_undelete(SB)
-TEXT ·libc_unlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlink(SB)
-TEXT ·libc_unmount_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unmount_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unmount(SB)
-TEXT ·libc_write_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_write_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_write(SB)
-TEXT ·libc_writev_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_writev_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_writev(SB)
-TEXT ·libc_mmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mmap(SB)
-TEXT ·libc_munmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munmap(SB)
-TEXT ·libc_fork_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fork_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fork(SB)
-TEXT ·libc_ioctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ioctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ioctl(SB)
-TEXT ·libc_execve_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_execve_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_execve(SB)
-TEXT ·libc_exit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exit(SB)
-TEXT ·libc_sysctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sysctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sysctl(SB)
-TEXT ·libc_unlinkat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlinkat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlinkat(SB)
-TEXT ·libc_openat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_openat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_openat(SB)
-TEXT ·libc_getcwd_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getcwd_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getcwd(SB)
-TEXT ·libc_fstat64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstat64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstat64(SB)
-TEXT ·libc_fstatfs64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatfs64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatfs64(SB)
-TEXT ·libc_gettimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_gettimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_gettimeofday(SB)
-TEXT ·libc_lstat64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lstat64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lstat64(SB)
-TEXT ·libc_stat64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_stat64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_stat64(SB)
-TEXT ·libc_statfs64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_statfs64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_statfs64(SB)
-TEXT ·libc_fstatat64_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatat64_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatat64(SB)
-TEXT ·libc_ptrace_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ptrace_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ptrace(SB)

diff --git a/src/syscall/zsyscall_darwin_arm64.s b/src/syscall/zsyscall_darwin_arm64.s
index b606c6e49e35bba658ee8f19eb432debeb6fd820..73e4a3fd8dff254827822e583e5f1dd407fc3398 100644 (file)
--- a/src/syscall/zsyscall_darwin_arm64.s
+++ b/src/syscall/zsyscall_darwin_arm64.s
@@ -1,253 +1,253 @@
 // go run mkasm.go darwin arm64
 // Code generated by the command above; DO NOT EDIT.
 #include "textflag.h"
-TEXT ·libc_getfsstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getfsstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getfsstat(SB)
-TEXT ·libc_setattrlist_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setattrlist_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setattrlist(SB)
-TEXT ·libc_fdopendir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fdopendir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fdopendir(SB)
-TEXT ·libc_sendfile_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendfile_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendfile(SB)
-TEXT ·libc_getgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgroups(SB)
-TEXT ·libc_setgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgroups(SB)
-TEXT ·libc_wait4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_wait4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_wait4(SB)
-TEXT ·libc_accept_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept(SB)
-TEXT ·libc_bind_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_bind_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_bind(SB)
-TEXT ·libc_connect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_connect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_connect(SB)
-TEXT ·libc_socket_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socket_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socket(SB)
-TEXT ·libc_getsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockopt(SB)
-TEXT ·libc_setsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsockopt(SB)
-TEXT ·libc_getpeername_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpeername_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpeername(SB)
-TEXT ·libc_getsockname_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockname_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockname(SB)
-TEXT ·libc_shutdown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_shutdown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_shutdown(SB)
-TEXT ·libc_socketpair_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socketpair_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socketpair(SB)
-TEXT ·libc_recvfrom_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvfrom_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvfrom(SB)
-TEXT ·libc_sendto_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendto_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendto(SB)
-TEXT ·libc_recvmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvmsg(SB)
-TEXT ·libc_sendmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendmsg(SB)
-TEXT ·libc_kevent_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kevent_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kevent(SB)
-TEXT ·libc_utimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimes(SB)
-TEXT ·libc_futimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_futimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_futimes(SB)
-TEXT ·libc_fcntl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fcntl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fcntl(SB)
-TEXT ·libc_pipe_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pipe_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pipe(SB)
-TEXT ·libc_kill_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kill_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kill(SB)
-TEXT ·libc_access_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_access_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_access(SB)
-TEXT ·libc_adjtime_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_adjtime_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_adjtime(SB)
-TEXT ·libc_chdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chdir(SB)
-TEXT ·libc_chflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chflags(SB)
-TEXT ·libc_chmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chmod(SB)
-TEXT ·libc_chown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chown(SB)
-TEXT ·libc_chroot_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chroot_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chroot(SB)
-TEXT ·libc_close_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_close_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_close(SB)
-TEXT ·libc_closedir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_closedir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_closedir(SB)
-TEXT ·libc_dup_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup(SB)
-TEXT ·libc_dup2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup2(SB)
-TEXT ·libc_exchangedata_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exchangedata_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exchangedata(SB)
-TEXT ·libc_fchdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchdir(SB)
-TEXT ·libc_fchflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchflags(SB)
-TEXT ·libc_fchmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchmod(SB)
-TEXT ·libc_fchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchown(SB)
-TEXT ·libc_flock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_flock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_flock(SB)
-TEXT ·libc_fpathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fpathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fpathconf(SB)
-TEXT ·libc_fsync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fsync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fsync(SB)
-TEXT ·libc_ftruncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ftruncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ftruncate(SB)
-TEXT ·libc_getdtablesize_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getdtablesize_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getdtablesize(SB)
-TEXT ·libc_getegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getegid(SB)
-TEXT ·libc_geteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_geteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_geteuid(SB)
-TEXT ·libc_getgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgid(SB)
-TEXT ·libc_getpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgid(SB)
-TEXT ·libc_getpgrp_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgrp_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgrp(SB)
-TEXT ·libc_getpid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpid(SB)
-TEXT ·libc_getppid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getppid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getppid(SB)
-TEXT ·libc_getpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpriority(SB)
-TEXT ·libc_getrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrlimit(SB)
-TEXT ·libc_getrusage_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrusage_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrusage(SB)
-TEXT ·libc_getsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsid(SB)
-TEXT ·libc_getuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getuid(SB)
-TEXT ·libc_issetugid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_issetugid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_issetugid(SB)
-TEXT ·libc_kqueue_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kqueue_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kqueue(SB)
-TEXT ·libc_lchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lchown(SB)
-TEXT ·libc_link_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_link_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_link(SB)
-TEXT ·libc_listen_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_listen_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_listen(SB)
-TEXT ·libc_mkdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkdir(SB)
-TEXT ·libc_mkfifo_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkfifo_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkfifo(SB)
-TEXT ·libc_mknod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mknod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mknod(SB)
-TEXT ·libc_mlock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mlock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mlock(SB)
-TEXT ·libc_mlockall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mlockall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mlockall(SB)
-TEXT ·libc_mprotect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mprotect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mprotect(SB)
-TEXT ·libc_munlock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munlock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munlock(SB)
-TEXT ·libc_munlockall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munlockall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munlockall(SB)
-TEXT ·libc_open_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_open_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_open(SB)
-TEXT ·libc_pathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pathconf(SB)
-TEXT ·libc_pread_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pread_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pread(SB)
-TEXT ·libc_pwrite_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pwrite_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pwrite(SB)
-TEXT ·libc_read_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_read_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_read(SB)
-TEXT ·libc_readdir_r_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readdir_r_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readdir_r(SB)
-TEXT ·libc_readlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readlink(SB)
-TEXT ·libc_rename_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rename_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rename(SB)
-TEXT ·libc_revoke_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_revoke_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_revoke(SB)
-TEXT ·libc_rmdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rmdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rmdir(SB)
-TEXT ·libc_lseek_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lseek_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lseek(SB)
-TEXT ·libc_select_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_select_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_select(SB)
-TEXT ·libc_setegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setegid(SB)
-TEXT ·libc_seteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_seteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_seteuid(SB)
-TEXT ·libc_setgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgid(SB)
-TEXT ·libc_setlogin_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setlogin_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setlogin(SB)
-TEXT ·libc_setpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpgid(SB)
-TEXT ·libc_setpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpriority(SB)
-TEXT ·libc_setprivexec_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setprivexec_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setprivexec(SB)
-TEXT ·libc_setregid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setregid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setregid(SB)
-TEXT ·libc_setreuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setreuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setreuid(SB)
-TEXT ·libc_setrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setrlimit(SB)
-TEXT ·libc_setsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsid(SB)
-TEXT ·libc_settimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_settimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_settimeofday(SB)
-TEXT ·libc_setuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setuid(SB)
-TEXT ·libc_symlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_symlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_symlink(SB)
-TEXT ·libc_sync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sync(SB)
-TEXT ·libc_truncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_truncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_truncate(SB)
-TEXT ·libc_umask_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_umask_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_umask(SB)
-TEXT ·libc_undelete_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_undelete_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_undelete(SB)
-TEXT ·libc_unlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlink(SB)
-TEXT ·libc_unmount_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unmount_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unmount(SB)
-TEXT ·libc_write_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_write_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_write(SB)
-TEXT ·libc_writev_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_writev_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_writev(SB)
-TEXT ·libc_mmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mmap(SB)
-TEXT ·libc_munmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munmap(SB)
-TEXT ·libc_fork_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fork_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fork(SB)
-TEXT ·libc_ioctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ioctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ioctl(SB)
-TEXT ·libc_execve_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_execve_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_execve(SB)
-TEXT ·libc_exit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exit(SB)
-TEXT ·libc_sysctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sysctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sysctl(SB)
-TEXT ·libc_unlinkat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlinkat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlinkat(SB)
-TEXT ·libc_openat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_openat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_openat(SB)
-TEXT ·libc_getcwd_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getcwd_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getcwd(SB)
-TEXT ·libc_fstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstat(SB)
-TEXT ·libc_fstatfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatfs(SB)
-TEXT ·libc_gettimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_gettimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_gettimeofday(SB)
-TEXT ·libc_lstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lstat(SB)
-TEXT ·libc_stat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_stat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_stat(SB)
-TEXT ·libc_statfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_statfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_statfs(SB)
-TEXT ·libc_fstatat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatat(SB)
-TEXT ·libc_ptrace_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ptrace_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ptrace(SB)

diff --git a/src/syscall/zsyscall_openbsd_amd64.s b/src/syscall/zsyscall_openbsd_amd64.s
index e5c5dde930bb6062e4960c66bcc88aab91578d11..8256a451f5f86eb895112485adda8fba2a87a201 100644 (file)
--- a/src/syscall/zsyscall_openbsd_amd64.s
+++ b/src/syscall/zsyscall_openbsd_amd64.s
@@ -1,233 +1,233 @@
 // go run mkasm.go openbsd amd64
 // Code generated by the command above; DO NOT EDIT.
 #include "textflag.h"
-TEXT ·libc_getgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgroups(SB)
-TEXT ·libc_setgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgroups(SB)
-TEXT ·libc_wait4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_wait4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_wait4(SB)
-TEXT ·libc_accept_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept(SB)
-TEXT ·libc_bind_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_bind_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_bind(SB)
-TEXT ·libc_connect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_connect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_connect(SB)
-TEXT ·libc_socket_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socket_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socket(SB)
-TEXT ·libc_getsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockopt(SB)
-TEXT ·libc_setsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsockopt(SB)
-TEXT ·libc_getpeername_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpeername_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpeername(SB)
-TEXT ·libc_getsockname_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockname_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockname(SB)
-TEXT ·libc_shutdown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_shutdown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_shutdown(SB)
-TEXT ·libc_socketpair_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socketpair_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socketpair(SB)
-TEXT ·libc_recvfrom_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvfrom_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvfrom(SB)
-TEXT ·libc_sendto_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendto_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendto(SB)
-TEXT ·libc_recvmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvmsg(SB)
-TEXT ·libc_sendmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendmsg(SB)
-TEXT ·libc_kevent_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kevent_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kevent(SB)
-TEXT ·libc_utimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimes(SB)
-TEXT ·libc_futimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_futimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_futimes(SB)
-TEXT ·libc_fcntl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fcntl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fcntl(SB)
-TEXT ·libc_pipe2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pipe2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pipe2(SB)
-TEXT ·libc_accept4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept4(SB)
-TEXT ·libc_getdents_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getdents_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getdents(SB)
-TEXT ·libc_access_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_access_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_access(SB)
-TEXT ·libc_adjtime_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_adjtime_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_adjtime(SB)
-TEXT ·libc_chdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chdir(SB)
-TEXT ·libc_chflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chflags(SB)
-TEXT ·libc_chmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chmod(SB)
-TEXT ·libc_chown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chown(SB)
-TEXT ·libc_chroot_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chroot_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chroot(SB)
-TEXT ·libc_close_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_close_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_close(SB)
-TEXT ·libc_dup_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup(SB)
-TEXT ·libc_dup2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup2(SB)
-TEXT ·libc_fchdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchdir(SB)
-TEXT ·libc_fchflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchflags(SB)
-TEXT ·libc_fchmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchmod(SB)
-TEXT ·libc_fchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchown(SB)
-TEXT ·libc_flock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_flock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_flock(SB)
-TEXT ·libc_fpathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fpathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fpathconf(SB)
-TEXT ·libc_fstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstat(SB)
-TEXT ·libc_fstatfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatfs(SB)
-TEXT ·libc_fsync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fsync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fsync(SB)
-TEXT ·libc_ftruncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ftruncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ftruncate(SB)
-TEXT ·libc_getegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getegid(SB)
-TEXT ·libc_geteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_geteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_geteuid(SB)
-TEXT ·libc_getgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgid(SB)
-TEXT ·libc_getpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgid(SB)
-TEXT ·libc_getpgrp_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgrp_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgrp(SB)
-TEXT ·libc_getpid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpid(SB)
-TEXT ·libc_getppid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getppid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getppid(SB)
-TEXT ·libc_getpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpriority(SB)
-TEXT ·libc_getrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrlimit(SB)
-TEXT ·libc_getrusage_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrusage_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrusage(SB)
-TEXT ·libc_getsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsid(SB)
-TEXT ·libc_gettimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_gettimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_gettimeofday(SB)
-TEXT ·libc_getuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getuid(SB)
-TEXT ·libc_issetugid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_issetugid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_issetugid(SB)
-TEXT ·libc_kill_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kill_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kill(SB)
-TEXT ·libc_kqueue_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kqueue_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kqueue(SB)
-TEXT ·libc_lchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lchown(SB)
-TEXT ·libc_link_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_link_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_link(SB)
-TEXT ·libc_listen_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_listen_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_listen(SB)
-TEXT ·libc_lstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lstat(SB)
-TEXT ·libc_mkdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkdir(SB)
-TEXT ·libc_mkfifo_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkfifo_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkfifo(SB)
-TEXT ·libc_mknod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mknod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mknod(SB)
-TEXT ·libc_nanosleep_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_nanosleep_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_nanosleep(SB)
-TEXT ·libc_open_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_open_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_open(SB)
-TEXT ·libc_pathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pathconf(SB)
-TEXT ·libc_pread_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pread_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pread(SB)
-TEXT ·libc_pwrite_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pwrite_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pwrite(SB)
-TEXT ·libc_read_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_read_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_read(SB)
-TEXT ·libc_readlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readlink(SB)
-TEXT ·libc_rename_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rename_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rename(SB)
-TEXT ·libc_revoke_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_revoke_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_revoke(SB)
-TEXT ·libc_rmdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rmdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rmdir(SB)
-TEXT ·libc_select_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_select_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_select(SB)
-TEXT ·libc_setegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setegid(SB)
-TEXT ·libc_seteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_seteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_seteuid(SB)
-TEXT ·libc_setgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgid(SB)
-TEXT ·libc_setlogin_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setlogin_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setlogin(SB)
-TEXT ·libc_setpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpgid(SB)
-TEXT ·libc_setpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpriority(SB)
-TEXT ·libc_setregid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setregid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setregid(SB)
-TEXT ·libc_setreuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setreuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setreuid(SB)
-TEXT ·libc_setrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setrlimit(SB)
-TEXT ·libc_setsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsid(SB)
-TEXT ·libc_settimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_settimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_settimeofday(SB)
-TEXT ·libc_setuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setuid(SB)
-TEXT ·libc_stat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_stat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_stat(SB)
-TEXT ·libc_statfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_statfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_statfs(SB)
-TEXT ·libc_symlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_symlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_symlink(SB)
-TEXT ·libc_sync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sync(SB)
-TEXT ·libc_truncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_truncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_truncate(SB)
-TEXT ·libc_umask_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_umask_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_umask(SB)
-TEXT ·libc_unlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlink(SB)
-TEXT ·libc_unmount_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unmount_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unmount(SB)
-TEXT ·libc_write_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_write_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_write(SB)
-TEXT ·libc_mmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mmap(SB)
-TEXT ·libc_munmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munmap(SB)
-TEXT ·libc_utimensat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimensat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimensat(SB)
-TEXT ·libc_syscall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_syscall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_syscall(SB)
-TEXT ·libc_lseek_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lseek_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lseek(SB)
-TEXT ·libc_getcwd_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getcwd_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getcwd(SB)
-TEXT ·libc_sysctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sysctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sysctl(SB)
-TEXT ·libc_fork_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fork_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fork(SB)
-TEXT ·libc_ioctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ioctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ioctl(SB)
-TEXT ·libc_execve_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_execve_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_execve(SB)
-TEXT ·libc_exit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exit(SB)
-TEXT ·libc_ptrace_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ptrace_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ptrace(SB)
-TEXT ·libc_getentropy_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getentropy_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getentropy(SB)
-TEXT ·libc_fstatat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatat(SB)
-TEXT ·libc_unlinkat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlinkat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlinkat(SB)
-TEXT ·libc_openat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_openat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_openat(SB)

diff --git a/src/syscall/zsyscall_openbsd_arm64.s b/src/syscall/zsyscall_openbsd_arm64.s
index 37778b1db5417be5fc6cd34f5d6037dec6da0bd1..f6e0a8da94c4f9ad7e16fbf8415ae356fd8d0ff9 100644 (file)
--- a/src/syscall/zsyscall_openbsd_arm64.s
+++ b/src/syscall/zsyscall_openbsd_arm64.s
@@ -1,233 +1,233 @@
 // go run mkasm.go openbsd arm64
 // Code generated by the command above; DO NOT EDIT.
 #include "textflag.h"
-TEXT ·libc_getgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgroups(SB)
-TEXT ·libc_setgroups_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgroups_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgroups(SB)
-TEXT ·libc_wait4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_wait4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_wait4(SB)
-TEXT ·libc_accept_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept(SB)
-TEXT ·libc_bind_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_bind_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_bind(SB)
-TEXT ·libc_connect_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_connect_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_connect(SB)
-TEXT ·libc_socket_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socket_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socket(SB)
-TEXT ·libc_getsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockopt(SB)
-TEXT ·libc_setsockopt_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsockopt_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsockopt(SB)
-TEXT ·libc_getpeername_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpeername_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpeername(SB)
-TEXT ·libc_getsockname_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsockname_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsockname(SB)
-TEXT ·libc_shutdown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_shutdown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_shutdown(SB)
-TEXT ·libc_socketpair_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_socketpair_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_socketpair(SB)
-TEXT ·libc_recvfrom_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvfrom_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvfrom(SB)
-TEXT ·libc_sendto_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendto_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendto(SB)
-TEXT ·libc_recvmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_recvmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_recvmsg(SB)
-TEXT ·libc_sendmsg_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sendmsg_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sendmsg(SB)
-TEXT ·libc_kevent_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kevent_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kevent(SB)
-TEXT ·libc_utimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimes(SB)
-TEXT ·libc_futimes_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_futimes_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_futimes(SB)
-TEXT ·libc_fcntl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fcntl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fcntl(SB)
-TEXT ·libc_pipe2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pipe2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pipe2(SB)
-TEXT ·libc_accept4_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_accept4_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_accept4(SB)
-TEXT ·libc_getdents_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getdents_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getdents(SB)
-TEXT ·libc_access_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_access_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_access(SB)
-TEXT ·libc_adjtime_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_adjtime_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_adjtime(SB)
-TEXT ·libc_chdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chdir(SB)
-TEXT ·libc_chflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chflags(SB)
-TEXT ·libc_chmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chmod(SB)
-TEXT ·libc_chown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chown(SB)
-TEXT ·libc_chroot_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_chroot_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_chroot(SB)
-TEXT ·libc_close_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_close_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_close(SB)
-TEXT ·libc_dup_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup(SB)
-TEXT ·libc_dup2_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_dup2_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_dup2(SB)
-TEXT ·libc_fchdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchdir(SB)
-TEXT ·libc_fchflags_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchflags_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchflags(SB)
-TEXT ·libc_fchmod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchmod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchmod(SB)
-TEXT ·libc_fchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fchown(SB)
-TEXT ·libc_flock_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_flock_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_flock(SB)
-TEXT ·libc_fpathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fpathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fpathconf(SB)
-TEXT ·libc_fstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstat(SB)
-TEXT ·libc_fstatfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatfs(SB)
-TEXT ·libc_fsync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fsync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fsync(SB)
-TEXT ·libc_ftruncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ftruncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ftruncate(SB)
-TEXT ·libc_getegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getegid(SB)
-TEXT ·libc_geteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_geteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_geteuid(SB)
-TEXT ·libc_getgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getgid(SB)
-TEXT ·libc_getpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgid(SB)
-TEXT ·libc_getpgrp_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpgrp_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpgrp(SB)
-TEXT ·libc_getpid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpid(SB)
-TEXT ·libc_getppid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getppid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getppid(SB)
-TEXT ·libc_getpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getpriority(SB)
-TEXT ·libc_getrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrlimit(SB)
-TEXT ·libc_getrusage_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getrusage_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getrusage(SB)
-TEXT ·libc_getsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getsid(SB)
-TEXT ·libc_gettimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_gettimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_gettimeofday(SB)
-TEXT ·libc_getuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getuid(SB)
-TEXT ·libc_issetugid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_issetugid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_issetugid(SB)
-TEXT ·libc_kill_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kill_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kill(SB)
-TEXT ·libc_kqueue_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_kqueue_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_kqueue(SB)
-TEXT ·libc_lchown_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lchown_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lchown(SB)
-TEXT ·libc_link_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_link_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_link(SB)
-TEXT ·libc_listen_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_listen_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_listen(SB)
-TEXT ·libc_lstat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lstat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lstat(SB)
-TEXT ·libc_mkdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkdir(SB)
-TEXT ·libc_mkfifo_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mkfifo_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mkfifo(SB)
-TEXT ·libc_mknod_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mknod_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mknod(SB)
-TEXT ·libc_nanosleep_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_nanosleep_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_nanosleep(SB)
-TEXT ·libc_open_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_open_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_open(SB)
-TEXT ·libc_pathconf_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pathconf_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pathconf(SB)
-TEXT ·libc_pread_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pread_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pread(SB)
-TEXT ·libc_pwrite_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_pwrite_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_pwrite(SB)
-TEXT ·libc_read_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_read_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_read(SB)
-TEXT ·libc_readlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_readlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_readlink(SB)
-TEXT ·libc_rename_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rename_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rename(SB)
-TEXT ·libc_revoke_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_revoke_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_revoke(SB)
-TEXT ·libc_rmdir_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_rmdir_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_rmdir(SB)
-TEXT ·libc_select_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_select_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_select(SB)
-TEXT ·libc_setegid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setegid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setegid(SB)
-TEXT ·libc_seteuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_seteuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_seteuid(SB)
-TEXT ·libc_setgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setgid(SB)
-TEXT ·libc_setlogin_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setlogin_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setlogin(SB)
-TEXT ·libc_setpgid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpgid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpgid(SB)
-TEXT ·libc_setpriority_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setpriority_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setpriority(SB)
-TEXT ·libc_setregid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setregid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setregid(SB)
-TEXT ·libc_setreuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setreuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setreuid(SB)
-TEXT ·libc_setrlimit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setrlimit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setrlimit(SB)
-TEXT ·libc_setsid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setsid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setsid(SB)
-TEXT ·libc_settimeofday_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_settimeofday_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_settimeofday(SB)
-TEXT ·libc_setuid_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_setuid_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_setuid(SB)
-TEXT ·libc_stat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_stat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_stat(SB)
-TEXT ·libc_statfs_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_statfs_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_statfs(SB)
-TEXT ·libc_symlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_symlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_symlink(SB)
-TEXT ·libc_sync_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sync_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sync(SB)
-TEXT ·libc_truncate_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_truncate_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_truncate(SB)
-TEXT ·libc_umask_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_umask_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_umask(SB)
-TEXT ·libc_unlink_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlink_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlink(SB)
-TEXT ·libc_unmount_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unmount_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unmount(SB)
-TEXT ·libc_write_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_write_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_write(SB)
-TEXT ·libc_mmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_mmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_mmap(SB)
-TEXT ·libc_munmap_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_munmap_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_munmap(SB)
-TEXT ·libc_utimensat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_utimensat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_utimensat(SB)
-TEXT ·libc_syscall_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_syscall_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_syscall(SB)
-TEXT ·libc_lseek_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_lseek_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_lseek(SB)
-TEXT ·libc_getcwd_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getcwd_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getcwd(SB)
-TEXT ·libc_sysctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_sysctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_sysctl(SB)
-TEXT ·libc_fork_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fork_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fork(SB)
-TEXT ·libc_ioctl_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ioctl_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ioctl(SB)
-TEXT ·libc_execve_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_execve_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_execve(SB)
-TEXT ·libc_exit_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_exit_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_exit(SB)
-TEXT ·libc_ptrace_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_ptrace_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_ptrace(SB)
-TEXT ·libc_getentropy_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_getentropy_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_getentropy(SB)
-TEXT ·libc_fstatat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_fstatat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_fstatat(SB)
-TEXT ·libc_unlinkat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_unlinkat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_unlinkat(SB)
-TEXT ·libc_openat_trampoline(SB),NOSPLIT,$0-0
+TEXT ·libc_openat_trampoline<ABIInternal>(SB),NOSPLIT,$0-0
        JMP     libc_openat(SB)

diff --git a/src/testing/fstest/testfs.go b/src/testing/fstest/testfs.go
index a7f8007333e310eef526c61e667b789b2f125301..8fc8acaaf3bf1bb88fda7138002f5678a8266178 100644 (file)
--- a/src/testing/fstest/testfs.go
+++ b/src/testing/fstest/testfs.go
@@ -403,9 +403,10 @@ func (t *fsTester) checkStat(path string, entry fs.DirEntry) {
                return
        }
        fentry := formatEntry(entry)
-       finfo := formatInfoEntry(info)
-       if fentry != finfo {
-               t.errorf("%s: mismatch:\n\tentry = %s\n\tfile.Stat() = %s", path, fentry, finfo)
+       fientry := formatInfoEntry(info)
+       // Note: mismatch here is OK for symlink, because Open dereferences symlink.
+       if fentry != fientry && entry.Type()&fs.ModeSymlink == 0 {
+               t.errorf("%s: mismatch:\n\tentry = %s\n\tfile.Stat() = %s", path, fentry, fientry)
        }
 
        einfo, err := entry.Info()
@@ -413,12 +414,22 @@ func (t *fsTester) checkStat(path string, entry fs.DirEntry) {
                t.errorf("%s: entry.Info: %v", path, err)
                return
        }
-       fentry = formatInfo(einfo)
-       finfo = formatInfo(info)
-       if fentry != finfo {
-               t.errorf("%s: mismatch:\n\tentry.Info() = %s\n\tfile.Stat() = %s\n", path, fentry, finfo)
+       finfo := formatInfo(info)
+       if entry.Type()&fs.ModeSymlink != 0 {
+               // For symlink, just check that entry.Info matches entry on common fields.
+               // Open deferences symlink, so info itself may differ.
+               feentry := formatInfoEntry(einfo)
+               if fentry != feentry {
+                       t.errorf("%s: mismatch\n\tentry = %s\n\tentry.Info() = %s\n", path, fentry, feentry)
+               }
+       } else {
+               feinfo := formatInfo(einfo)
+               if feinfo != finfo {
+                       t.errorf("%s: mismatch:\n\tentry.Info() = %s\n\tfile.Stat() = %s\n", path, feinfo, finfo)
+               }
        }
 
+       // Stat should be the same as Open+Stat, even for symlinks.
        info2, err := fs.Stat(t.fsys, path)
        if err != nil {
                t.errorf("%s: fs.Stat: %v", path, err)

diff --git a/src/testing/fstest/testfs_test.go b/src/testing/fstest/testfs_test.go
new file mode 100644 (file)
index 0000000..5b8813c
--- /dev/null
+++ b/src/testing/fstest/testfs_test.go
@@ -0,0 +1,31 @@
+// Copyright 2021 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package fstest
+
+import (
+       "internal/testenv"
+       "os"
+       "path/filepath"
+       "testing"
+)
+
+func TestSymlink(t *testing.T) {
+       testenv.MustHaveSymlink(t)
+
+       tmp := t.TempDir()
+       tmpfs := os.DirFS(tmp)
+
+       if err := os.WriteFile(filepath.Join(tmp, "hello"), []byte("hello, world\n"), 0644); err != nil {
+               t.Fatal(err)
+       }
+
+       if err := os.Symlink(filepath.Join(tmp, "hello"), filepath.Join(tmp, "hello.link")); err != nil {
+               t.Fatal(err)
+       }
+
+       if err := TestFS(tmpfs, "hello", "hello.link"); err != nil {
+               t.Fatal(err)
+       }
+}

diff --git a/test/codegen/structs.go b/test/codegen/structs.go
index 9eddc5b16ec3e3ea85212cd394b0fc65fd154bd8..c4bcb55c637cdb3d98d9a38fdfdaf210f14dfa86 100644 (file)
--- a/test/codegen/structs.go
+++ b/test/codegen/structs.go
@@ -18,7 +18,7 @@ type Z1 struct {
 }
 
 func Zero1(t *Z1) { // Issue #18370
-       // amd64:`XORPS\tX., X`,`MOVUPS\tX., \(.*\)`,`MOVQ\t\$0, 16\(.*\)`
+       // amd64:`MOVUPS\tX[0-9]+, \(.*\)`,`MOVQ\t\$0, 16\(.*\)`
        *t = Z1{}
 }
 
@@ -27,7 +27,7 @@ type Z2 struct {
 }
 
 func Zero2(t *Z2) {
-       // amd64:`XORPS\tX., X`,`MOVUPS\tX., \(.*\)`,`MOVQ\t\$0, 16\(.*\)`
+       // amd64:`MOVUPS\tX[0-9]+, \(.*\)`,`MOVQ\t\$0, 16\(.*\)`
        // amd64:`.*runtime[.]gcWriteBarrier.*\(SB\)`
        *t = Z2{}
 }