cmd/internal/obj: reorg ppc64 MOV* optab entries and remove unused classes

C_LECON and C_SECON classifications are not generated on ppc64, however
there are many optab entries which match against them. Remove them to
resolve their related TODOs.

Likewise, reorder the optab entries for better readability.

Change-Id: I894a209a148014e5aa438b7303e7fbdda4727c4e
Reviewed-on: https://go-review.googlesource.com/c/go/+/307429
Run-TryBot: Paul Murphy <murp@ibm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>

diff --git a/src/cmd/internal/obj/ppc64/a.out.go b/src/cmd/internal/obj/ppc64/a.out.go
index 59777803be8a5b04c2a8f22515fef37f119a6d9f..2ae3a21e050c61fccaed7924200f1ef82f159d53 100644 (file)
--- a/src/cmd/internal/obj/ppc64/a.out.go
+++ b/src/cmd/internal/obj/ppc64/a.out.go
@@ -368,10 +368,8 @@ const (
        C_LCON   /* other 32 */
        C_DCON   /* other 64 (could subdivide further) */
        C_SACON  /* $n(REG) where n <= int16 */
-       C_SECON
-       C_LACON /* $n(REG) where int16 < n <= int32 */
-       C_LECON
-       C_DACON /* $n(REG) where int32 < n */
+       C_LACON  /* $n(REG) where int16 < n <= int32 */
+       C_DACON  /* $n(REG) where int32 < n */
        C_SBRA
        C_LBRA
        C_LBRAPIC

diff --git a/src/cmd/internal/obj/ppc64/anames9.go b/src/cmd/internal/obj/ppc64/anames9.go
index 7e93e6a15aacdc4494dc4c7b0d7a9812f8c03484..8b9b708458991e88529798fe922f3fd101b89bf0 100644 (file)
--- a/src/cmd/internal/obj/ppc64/anames9.go
+++ b/src/cmd/internal/obj/ppc64/anames9.go
@@ -20,9 +20,7 @@ var cnames9 = []string{
        "LCON",
        "DCON",
        "SACON",
-       "SECON",
        "LACON",
-       "LECON",
        "DACON",
        "SBRA",
        "LBRA",

diff --git a/src/cmd/internal/obj/ppc64/asm9.go b/src/cmd/internal/obj/ppc64/asm9.go
index f169c326d858fb96714facb7990e8c9def29202c..b83489a5a604398422b45ef81a16fc6ff7b859c1 100644 (file)
--- a/src/cmd/internal/obj/ppc64/asm9.go
+++ b/src/cmd/internal/obj/ppc64/asm9.go
@@ -205,84 +205,93 @@ var optab = []Optab{
 
        {as: AMOVB, a1: C_ADDR, a6: C_REG, type_: 76, size: 12},
        {as: AMOVB, a1: C_LOREG, a6: C_REG, type_: 37, size: 12},
+       {as: AMOVB, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
        {as: AMOVB, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
+       {as: AMOVB, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVB, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
        {as: AMOVB, a1: C_REG, a6: C_REG, type_: 12, size: 4},
-       {as: AMOVB, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
-       {as: AMOVB, a1: C_SOREG, a6: C_REG, type_: 9, size: 8},
 
        {as: AMOVBZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
        {as: AMOVBZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
+       {as: AMOVBZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
        {as: AMOVBZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
+       {as: AMOVBZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVBZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
        {as: AMOVBZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
-       {as: AMOVBZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
-       {as: AMOVBZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
 
        {as: AMOVD, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVD, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
        {as: AMOVD, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVD, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVD, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVD, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
+       {as: AMOVD, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
        {as: AMOVD, a1: C_GOTADDR, a6: C_REG, type_: 81, size: 8},
        {as: AMOVD, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
-       {as: AMOVD, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
-       {as: AMOVD, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
+       {as: AMOVD, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
        {as: AMOVD, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
+       {as: AMOVD, a1: C_TLS_LE, a6: C_REG, type_: 79, size: 4},
+       {as: AMOVD, a1: C_TLS_IE, a6: C_REG, type_: 80, size: 8},
+       {as: AMOVD, a1: C_TOCADDR, a6: C_REG, type_: 95, size: 8},
+       {as: AMOVD, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
        {as: AMOVD, a1: C_MSR, a6: C_REG, type_: 54, size: 4}, /* mfmsr */
        {as: AMOVD, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
+       {as: AMOVD, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVD, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
        {as: AMOVD, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsrd */
-       {as: AMOVD, a1: C_REG, a6: C_REG, type_: 1, size: 4},
-       {as: AMOVD, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVD, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
-       {as: AMOVD, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVD, a1: C_SECON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVD, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
-       {as: AMOVD, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
-       {as: AMOVD, a1: C_TLS_IE, a6: C_REG, type_: 80, size: 8},
-       {as: AMOVD, a1: C_TLS_LE, a6: C_REG, type_: 79, size: 4},
-       {as: AMOVD, a1: C_TOCADDR, a6: C_REG, type_: 95, size: 8},
-       {as: AMOVD, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVD, a1: C_REG, a6: C_REG, type_: 1, size: 4},
 
        {as: AMOVW, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVW, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
        {as: AMOVW, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVW, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVW, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVW, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
+       {as: AMOVW, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
        {as: AMOVW, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
        {as: AMOVW, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
-       {as: AMOVW, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
-       {as: AMOVW, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
+       {as: AMOVW, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
        {as: AMOVW, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
+       {as: AMOVW, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
        {as: AMOVW, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
        {as: AMOVW, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
-       {as: AMOVW, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
-       {as: AMOVW, a1: C_REG, a6: C_REG, type_: 12, size: 4},
        {as: AMOVW, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
+       {as: AMOVW, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
        {as: AMOVW, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
-       {as: AMOVW, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVW, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
-       {as: AMOVW, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
-       {as: AMOVW, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
-       {as: AMOVW, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVW, a1: C_REG, a6: C_REG, type_: 12, size: 4},
 
        {as: AMOVWZ, a1: C_ADDCON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVWZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
        {as: AMOVWZ, a1: C_ANDCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVWZ, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVWZ, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVWZ, a1: C_ADDR, a6: C_REG, type_: 75, size: 8},
+       {as: AMOVWZ, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
        {as: AMOVWZ, a1: C_CREG, a6: C_REG, type_: 68, size: 4},
        {as: AMOVWZ, a1: C_LACON, a6: C_REG, type_: 26, size: 8},
-       {as: AMOVWZ, a1: C_LCON, a6: C_REG, type_: 19, size: 8},
-       {as: AMOVWZ, a1: C_LECON, a6: C_REG, type_: 26, size: 8},
+       {as: AMOVWZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
        {as: AMOVWZ, a1: C_LOREG, a6: C_REG, type_: 36, size: 8},
+       {as: AMOVWZ, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
        {as: AMOVWZ, a1: C_REG, a6: C_ADDR, type_: 74, size: 8},
        {as: AMOVWZ, a1: C_REG, a6: C_CREG, type_: 69, size: 4},
+       {as: AMOVWZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVWZ, a1: C_REG, a6: C_LOREG, type_: 35, size: 8},
        {as: AMOVWZ, a1: C_REG, a6: C_MSR, type_: 54, size: 4}, /* mtmsr */
-       {as: AMOVWZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
-       {as: AMOVWZ, a1: C_REG, a6: C_SOREG, type_: 7, size: 4},
        {as: AMOVWZ, a1: C_REG, a6: C_SPR, type_: 66, size: 4},
-       {as: AMOVWZ, a1: C_SACON, a6: C_REG, type_: 3, size: 4},
-       {as: AMOVWZ, a1: C_SECON, a6: C_REG, type_: 3, size: 4}, /* TO DO: check */
-       {as: AMOVWZ, a1: C_SOREG, a6: C_REG, type_: 8, size: 4},
-       {as: AMOVWZ, a1: C_SPR, a6: C_REG, type_: 66, size: 4},
-       {as: AMOVWZ, a1: C_UCON, a6: C_REG, type_: 3, size: 4},
+       {as: AMOVWZ, a1: C_REG, a6: C_REG, type_: 13, size: 4},
+
+       {as: AFMOVD, a1: C_ADDCON, a6: C_FREG, type_: 24, size: 8},
+       {as: AFMOVD, a1: C_SOREG, a6: C_FREG, type_: 8, size: 4},
+       {as: AFMOVD, a1: C_LOREG, a6: C_FREG, type_: 36, size: 8},
+       {as: AFMOVD, a1: C_ZCON, a6: C_FREG, type_: 24, size: 4},
+       {as: AFMOVD, a1: C_ADDR, a6: C_FREG, type_: 75, size: 8},
+       {as: AFMOVD, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
+       {as: AFMOVD, a1: C_FREG, a6: C_SOREG, type_: 7, size: 4},
+       {as: AFMOVD, a1: C_FREG, a6: C_LOREG, type_: 35, size: 8},
+       {as: AFMOVD, a1: C_FREG, a6: C_ADDR, type_: 74, size: 8},
+
+       {as: AFMOVSX, a1: C_ZOREG, a6: C_FREG, type_: 45, size: 4},
+       {as: AFMOVSX, a1: C_FREG, a6: C_ZOREG, type_: 44, size: 4},
+
+       {as: AFMOVSZ, a1: C_ZOREG, a6: C_FREG, type_: 45, size: 4},
 
        {as: AMOVFL, a1: C_CREG, a6: C_CREG, type_: 67, size: 4},
        {as: AMOVFL, a1: C_FPSCR, a6: C_CREG, type_: 73, size: 4},
@@ -312,18 +321,6 @@ var optab = []Optab{
        {as: ABC, a1: C_SCON, a2: C_REG, a6: C_LR, type_: 18, size: 4},
        {as: ABC, a1: C_SCON, a2: C_REG, a6: C_CTR, type_: 18, size: 4},
        {as: ABC, a6: C_ZOREG, type_: 15, size: 8},
-       {as: AFMOVD, a1: C_FREG, a6: C_FREG, type_: 33, size: 4},
-       {as: AFMOVD, a1: C_SOREG, a6: C_FREG, type_: 8, size: 4},
-       {as: AFMOVD, a1: C_LOREG, a6: C_FREG, type_: 36, size: 8},
-       {as: AFMOVD, a1: C_ZCON, a6: C_FREG, type_: 24, size: 4},
-       {as: AFMOVD, a1: C_ADDCON, a6: C_FREG, type_: 24, size: 8},
-       {as: AFMOVD, a1: C_ADDR, a6: C_FREG, type_: 75, size: 8},
-       {as: AFMOVD, a1: C_FREG, a6: C_SOREG, type_: 7, size: 4},
-       {as: AFMOVD, a1: C_FREG, a6: C_LOREG, type_: 35, size: 8},
-       {as: AFMOVD, a1: C_FREG, a6: C_ADDR, type_: 74, size: 8},
-       {as: AFMOVSX, a1: C_ZOREG, a6: C_FREG, type_: 45, size: 4},
-       {as: AFMOVSX, a1: C_FREG, a6: C_ZOREG, type_: 44, size: 4},
-       {as: AFMOVSZ, a1: C_ZOREG, a6: C_FREG, type_: 45, size: 4},
        {as: ASYNC, type_: 46, size: 4},
        {as: AWORD, a1: C_LCON, type_: 40, size: 4},
        {as: ADWORD, a1: C_LCON, type_: 31, size: 8},
@@ -604,8 +601,6 @@ func (c *ctxt9) getimpliedreg(a *obj.Addr, p *obj.Prog) int {
        switch oclass(a) {
        case C_ADDCON, C_ANDCON, C_UCON, C_LCON, C_SCON, C_ZCON:
                return REGZERO
-       case C_SECON, C_LECON:
-               return REGSB
        case C_SACON, C_LACON:
                return REGSP
        case C_LOREG, C_SOREG, C_ZOREG: