1 // Inferno utils/5c/5.out.h
2 // http://code.google.com/p/inferno-os/source/browse/utils/5c/5.out.h
4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
6 // Portions Copyright © 1997-1999 Vita Nuova Limited
7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
8 // Portions Copyright © 2004,2006 Bruce Ellis
9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
11 // Portions Copyright © 2009 The Go Authors. All rights reserved.
13 // Permission is hereby granted, free of charge, to any person obtaining a copy
14 // of this software and associated documentation files (the "Software"), to deal
15 // in the Software without restriction, including without limitation the rights
16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
17 // copies of the Software, and to permit persons to whom the Software is
18 // furnished to do so, subject to the following conditions:
20 // The above copyright notice and this permission notice shall be included in
21 // all copies or substantial portions of the Software.
23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
33 import "cmd/internal/obj"
35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm
43 /* -1 disables use of REGARG */
49 REG_R0 = obj.RBaseARM + iota // must be 16-aligned
66 REG_F0 // must be 16-aligned
83 REG_FPSR // must be 2-aligned
86 REG_CPSR // must be 2-aligned
91 /* compiler allocates R1 up as temps */
92 /* compiler allocates register variables R3 up */
93 /* compiler allocates external registers R10 down */
95 /* these two registers are declared in runtime.h */
106 /* compiler allocates register variables F0 up */
107 /* compiler allocates external registers F7 down */
124 C_RCON /* 0xff rotated */
139 C_HAUTO /* halfword insn offset (-0xff to 0xff) */
140 C_FAUTO /* float insn offset (0 to 0x3fc, word aligned) */
141 C_HFAUTO /* both H and F */
142 C_SAUTO /* -0xfff to 0xfff */
150 C_SROREG /* both nil and R */
157 C_ADDR /* reference to relocatable address */
159 // TLS "var" in local exec mode: will become a constant offset from
160 // thread local base that is ultimately chosen by the program linker.
163 // TLS "var" in initial exec mode: will become a memory address (chosen
164 // by the program linker) that the dynamic linker will fill with the
165 // offset from the thread local base.
172 C_NCLASS /* must be the last */
176 AAND = obj.ABaseARM + obj.A_ARCHSPECIFIC + iota
194 * Do not reorder or fragment the conditional branch
195 * opcodes, or the predication code will break
302 C_SCOND = (1 << 4) - 1
306 C_FBIT = 1 << 7 /* psr flags-only */
307 C_UBIT = 1 << 7 /* up bit, unsigned bit */
309 // These constants are the ARM condition codes encodings,
310 // XORed with 14 so that C_SCOND_NONE has value 0,
311 // so that a zeroed Prog.scond means "always execute".
314 C_SCOND_EQ = 0 ^ C_SCOND_XOR
315 C_SCOND_NE = 1 ^ C_SCOND_XOR
316 C_SCOND_HS = 2 ^ C_SCOND_XOR
317 C_SCOND_LO = 3 ^ C_SCOND_XOR
318 C_SCOND_MI = 4 ^ C_SCOND_XOR
319 C_SCOND_PL = 5 ^ C_SCOND_XOR
320 C_SCOND_VS = 6 ^ C_SCOND_XOR
321 C_SCOND_VC = 7 ^ C_SCOND_XOR
322 C_SCOND_HI = 8 ^ C_SCOND_XOR
323 C_SCOND_LS = 9 ^ C_SCOND_XOR
324 C_SCOND_GE = 10 ^ C_SCOND_XOR
325 C_SCOND_LT = 11 ^ C_SCOND_XOR
326 C_SCOND_GT = 12 ^ C_SCOND_XOR
327 C_SCOND_LE = 13 ^ C_SCOND_XOR
328 C_SCOND_NONE = 14 ^ C_SCOND_XOR
329 C_SCOND_NV = 15 ^ C_SCOND_XOR