src/cmd/compile/internal/ssa/rewriteAMD64.go

   1 // autogenerated from gen/AMD64.rules: do not edit!
   2 // generated with: cd gen; go run *.go
   3 package ssa
   4
   5 import "math"
   6
   7 var _ = math.MinInt8 // in case not otherwise used
   8 func rewriteValueAMD64(v *Value, config *Config) bool {
   9         b := v.Block
  10         switch v.Op {
  11         case OpAMD64ADDB:
  12                 // match: (ADDB x (MOVBconst [c]))
  13                 // cond:
  14                 // result: (ADDBconst [c] x)
  15                 {
  16                         x := v.Args[0]
  17                         if v.Args[1].Op != OpAMD64MOVBconst {
  18                                 goto endab690db69bfd8192eea57a2f9f76bf84
  19                         }
  20                         c := v.Args[1].AuxInt
  21                         v.Op = OpAMD64ADDBconst
  22                         v.AuxInt = 0
  23                         v.Aux = nil
  24                         v.resetArgs()
  25                         v.AuxInt = c
  26                         v.AddArg(x)
  27                         return true
  28                 }
  29                 goto endab690db69bfd8192eea57a2f9f76bf84
  30         endab690db69bfd8192eea57a2f9f76bf84:
  31                 ;
  32                 // match: (ADDB (MOVBconst [c]) x)
  33                 // cond:
  34                 // result: (ADDBconst [c] x)
  35                 {
  36                         if v.Args[0].Op != OpAMD64MOVBconst {
  37                                 goto end28aa1a4abe7e1abcdd64135e9967d39d
  38                         }
  39                         c := v.Args[0].AuxInt
  40                         x := v.Args[1]
  41                         v.Op = OpAMD64ADDBconst
  42                         v.AuxInt = 0
  43                         v.Aux = nil
  44                         v.resetArgs()
  45                         v.AuxInt = c
  46                         v.AddArg(x)
  47                         return true
  48                 }
  49                 goto end28aa1a4abe7e1abcdd64135e9967d39d
  50         end28aa1a4abe7e1abcdd64135e9967d39d:
  51                 ;
  52                 // match: (ADDB x (NEGB y))
  53                 // cond:
  54                 // result: (SUBB x y)
  55                 {
  56                         x := v.Args[0]
  57                         if v.Args[1].Op != OpAMD64NEGB {
  58                                 goto end9464509b8874ffb00b43b843da01f0bc
  59                         }
  60                         y := v.Args[1].Args[0]
  61                         v.Op = OpAMD64SUBB
  62                         v.AuxInt = 0
  63                         v.Aux = nil
  64                         v.resetArgs()
  65                         v.AddArg(x)
  66                         v.AddArg(y)
  67                         return true
  68                 }
  69                 goto end9464509b8874ffb00b43b843da01f0bc
  70         end9464509b8874ffb00b43b843da01f0bc:
  71                 ;
  72         case OpAMD64ADDBconst:
  73                 // match: (ADDBconst [c] (MOVBconst [d]))
  74                 // cond:
  75                 // result: (MOVBconst [c+d])
  76                 {
  77                         c := v.AuxInt
  78                         if v.Args[0].Op != OpAMD64MOVBconst {
  79                                 goto enda9b1e9e31ccdf0af5f4fe57bf4b1343f
  80                         }
  81                         d := v.Args[0].AuxInt
  82                         v.Op = OpAMD64MOVBconst
  83                         v.AuxInt = 0
  84                         v.Aux = nil
  85                         v.resetArgs()
  86                         v.AuxInt = c + d
  87                         return true
  88                 }
  89                 goto enda9b1e9e31ccdf0af5f4fe57bf4b1343f
  90         enda9b1e9e31ccdf0af5f4fe57bf4b1343f:
  91                 ;
  92                 // match: (ADDBconst [c] (ADDBconst [d] x))
  93                 // cond:
  94                 // result: (ADDBconst [c+d] x)
  95                 {
  96                         c := v.AuxInt
  97                         if v.Args[0].Op != OpAMD64ADDBconst {
  98                                 goto end9b1e6890adbf9d9e447d591b4148cbd0
  99                         }
 100                         d := v.Args[0].AuxInt
 101                         x := v.Args[0].Args[0]
 102                         v.Op = OpAMD64ADDBconst
 103                         v.AuxInt = 0
 104                         v.Aux = nil
 105                         v.resetArgs()
 106                         v.AuxInt = c + d
 107                         v.AddArg(x)
 108                         return true
 109                 }
 110                 goto end9b1e6890adbf9d9e447d591b4148cbd0
 111         end9b1e6890adbf9d9e447d591b4148cbd0:
 112                 ;
 113         case OpAMD64ADDL:
 114                 // match: (ADDL x (MOVLconst [c]))
 115                 // cond:
 116                 // result: (ADDLconst [c] x)
 117                 {
 118                         x := v.Args[0]
 119                         if v.Args[1].Op != OpAMD64MOVLconst {
 120                                 goto end8d6d3b99a7be8da6b7a254b7e709cc95
 121                         }
 122                         c := v.Args[1].AuxInt
 123                         v.Op = OpAMD64ADDLconst
 124                         v.AuxInt = 0
 125                         v.Aux = nil
 126                         v.resetArgs()
 127                         v.AuxInt = c
 128                         v.AddArg(x)
 129                         return true
 130                 }
 131                 goto end8d6d3b99a7be8da6b7a254b7e709cc95
 132         end8d6d3b99a7be8da6b7a254b7e709cc95:
 133                 ;
 134                 // match: (ADDL (MOVLconst [c]) x)
 135                 // cond:
 136                 // result: (ADDLconst [c] x)
 137                 {
 138                         if v.Args[0].Op != OpAMD64MOVLconst {
 139                                 goto end739561e08a561e26ce3634dc0d5ec733
 140                         }
 141                         c := v.Args[0].AuxInt
 142                         x := v.Args[1]
 143                         v.Op = OpAMD64ADDLconst
 144                         v.AuxInt = 0
 145                         v.Aux = nil
 146                         v.resetArgs()
 147                         v.AuxInt = c
 148                         v.AddArg(x)
 149                         return true
 150                 }
 151                 goto end739561e08a561e26ce3634dc0d5ec733
 152         end739561e08a561e26ce3634dc0d5ec733:
 153                 ;
 154                 // match: (ADDL x (NEGL y))
 155                 // cond:
 156                 // result: (SUBL x y)
 157                 {
 158                         x := v.Args[0]
 159                         if v.Args[1].Op != OpAMD64NEGL {
 160                                 goto end9596df31f2685a49df67c6fb912a521d
 161                         }
 162                         y := v.Args[1].Args[0]
 163                         v.Op = OpAMD64SUBL
 164                         v.AuxInt = 0
 165                         v.Aux = nil
 166                         v.resetArgs()
 167                         v.AddArg(x)
 168                         v.AddArg(y)
 169                         return true
 170                 }
 171                 goto end9596df31f2685a49df67c6fb912a521d
 172         end9596df31f2685a49df67c6fb912a521d:
 173                 ;
 174         case OpAMD64ADDLconst:
 175                 // match: (ADDLconst [c] (MOVLconst [d]))
 176                 // cond:
 177                 // result: (MOVLconst [c+d])
 178                 {
 179                         c := v.AuxInt
 180                         if v.Args[0].Op != OpAMD64MOVLconst {
 181                                 goto ende04850e987890abf1d66199042a19c23
 182                         }
 183                         d := v.Args[0].AuxInt
 184                         v.Op = OpAMD64MOVLconst
 185                         v.AuxInt = 0
 186                         v.Aux = nil
 187                         v.resetArgs()
 188                         v.AuxInt = c + d
 189                         return true
 190                 }
 191                 goto ende04850e987890abf1d66199042a19c23
 192         ende04850e987890abf1d66199042a19c23:
 193                 ;
 194                 // match: (ADDLconst [c] (ADDLconst [d] x))
 195                 // cond:
 196                 // result: (ADDLconst [c+d] x)
 197                 {
 198                         c := v.AuxInt
 199                         if v.Args[0].Op != OpAMD64ADDLconst {
 200                                 goto endf1dd8673b2fef4950aec87aa7523a236
 201                         }
 202                         d := v.Args[0].AuxInt
 203                         x := v.Args[0].Args[0]
 204                         v.Op = OpAMD64ADDLconst
 205                         v.AuxInt = 0
 206                         v.Aux = nil
 207                         v.resetArgs()
 208                         v.AuxInt = c + d
 209                         v.AddArg(x)
 210                         return true
 211                 }
 212                 goto endf1dd8673b2fef4950aec87aa7523a236
 213         endf1dd8673b2fef4950aec87aa7523a236:
 214                 ;
 215         case OpAMD64ADDQ:
 216                 // match: (ADDQ x (MOVQconst [c]))
 217                 // cond: is32Bit(c)
 218                 // result: (ADDQconst [c] x)
 219                 {
 220                         x := v.Args[0]
 221                         if v.Args[1].Op != OpAMD64MOVQconst {
 222                                 goto end1de8aeb1d043e0dadcffd169a99ce5c0
 223                         }
 224                         c := v.Args[1].AuxInt
 225                         if !(is32Bit(c)) {
 226                                 goto end1de8aeb1d043e0dadcffd169a99ce5c0
 227                         }
 228                         v.Op = OpAMD64ADDQconst
 229                         v.AuxInt = 0
 230                         v.Aux = nil
 231                         v.resetArgs()
 232                         v.AuxInt = c
 233                         v.AddArg(x)
 234                         return true
 235                 }
 236                 goto end1de8aeb1d043e0dadcffd169a99ce5c0
 237         end1de8aeb1d043e0dadcffd169a99ce5c0:
 238                 ;
 239                 // match: (ADDQ (MOVQconst [c]) x)
 240                 // cond: is32Bit(c)
 241                 // result: (ADDQconst [c] x)
 242                 {
 243                         if v.Args[0].Op != OpAMD64MOVQconst {
 244                                 goto endca635e3bdecd9e3aeb892f841021dfaa
 245                         }
 246                         c := v.Args[0].AuxInt
 247                         x := v.Args[1]
 248                         if !(is32Bit(c)) {
 249                                 goto endca635e3bdecd9e3aeb892f841021dfaa
 250                         }
 251                         v.Op = OpAMD64ADDQconst
 252                         v.AuxInt = 0
 253                         v.Aux = nil
 254                         v.resetArgs()
 255                         v.AuxInt = c
 256                         v.AddArg(x)
 257                         return true
 258                 }
 259                 goto endca635e3bdecd9e3aeb892f841021dfaa
 260         endca635e3bdecd9e3aeb892f841021dfaa:
 261                 ;
 262                 // match: (ADDQ x (SHLQconst [3] y))
 263                 // cond:
 264                 // result: (LEAQ8 x y)
 265                 {
 266                         x := v.Args[0]
 267                         if v.Args[1].Op != OpAMD64SHLQconst {
 268                                 goto endc02313d35a0525d1d680cd58992e820d
 269                         }
 270                         if v.Args[1].AuxInt != 3 {
 271                                 goto endc02313d35a0525d1d680cd58992e820d
 272                         }
 273                         y := v.Args[1].Args[0]
 274                         v.Op = OpAMD64LEAQ8
 275                         v.AuxInt = 0
 276                         v.Aux = nil
 277                         v.resetArgs()
 278                         v.AddArg(x)
 279                         v.AddArg(y)
 280                         return true
 281                 }
 282                 goto endc02313d35a0525d1d680cd58992e820d
 283         endc02313d35a0525d1d680cd58992e820d:
 284                 ;
 285                 // match: (ADDQ x (NEGQ y))
 286                 // cond:
 287                 // result: (SUBQ x y)
 288                 {
 289                         x := v.Args[0]
 290                         if v.Args[1].Op != OpAMD64NEGQ {
 291                                 goto endec8f899c6e175a0147a90750f9bfe0a2
 292                         }
 293                         y := v.Args[1].Args[0]
 294                         v.Op = OpAMD64SUBQ
 295                         v.AuxInt = 0
 296                         v.Aux = nil
 297                         v.resetArgs()
 298                         v.AddArg(x)
 299                         v.AddArg(y)
 300                         return true
 301                 }
 302                 goto endec8f899c6e175a0147a90750f9bfe0a2
 303         endec8f899c6e175a0147a90750f9bfe0a2:
 304                 ;
 305         case OpAMD64ADDQconst:
 306                 // match: (ADDQconst [c] (LEAQ8 [d] x y))
 307                 // cond:
 308                 // result: (LEAQ8 [addOff(c, d)] x y)
 309                 {
 310                         c := v.AuxInt
 311                         if v.Args[0].Op != OpAMD64LEAQ8 {
 312                                 goto ende2cc681c9abf9913288803fb1b39e639
 313                         }
 314                         d := v.Args[0].AuxInt
 315                         x := v.Args[0].Args[0]
 316                         y := v.Args[0].Args[1]
 317                         v.Op = OpAMD64LEAQ8
 318                         v.AuxInt = 0
 319                         v.Aux = nil
 320                         v.resetArgs()
 321                         v.AuxInt = addOff(c, d)
 322                         v.AddArg(x)
 323                         v.AddArg(y)
 324                         return true
 325                 }
 326                 goto ende2cc681c9abf9913288803fb1b39e639
 327         ende2cc681c9abf9913288803fb1b39e639:
 328                 ;
 329                 // match: (ADDQconst [0] x)
 330                 // cond:
 331                 // result: x
 332                 {
 333                         if v.AuxInt != 0 {
 334                                 goto end03d9f5a3e153048b0afa781401e2a849
 335                         }
 336                         x := v.Args[0]
 337                         v.Op = OpCopy
 338                         v.AuxInt = 0
 339                         v.Aux = nil
 340                         v.resetArgs()
 341                         v.Type = x.Type
 342                         v.AddArg(x)
 343                         return true
 344                 }
 345                 goto end03d9f5a3e153048b0afa781401e2a849
 346         end03d9f5a3e153048b0afa781401e2a849:
 347                 ;
 348                 // match: (ADDQconst [c] (MOVQconst [d]))
 349                 // cond:
 350                 // result: (MOVQconst [c+d])
 351                 {
 352                         c := v.AuxInt
 353                         if v.Args[0].Op != OpAMD64MOVQconst {
 354                                 goto end09dc54395b4e96e8332cf8e4e7481c52
 355                         }
 356                         d := v.Args[0].AuxInt
 357                         v.Op = OpAMD64MOVQconst
 358                         v.AuxInt = 0
 359                         v.Aux = nil
 360                         v.resetArgs()
 361                         v.AuxInt = c + d
 362                         return true
 363                 }
 364                 goto end09dc54395b4e96e8332cf8e4e7481c52
 365         end09dc54395b4e96e8332cf8e4e7481c52:
 366                 ;
 367                 // match: (ADDQconst [c] (ADDQconst [d] x))
 368                 // cond:
 369                 // result: (ADDQconst [c+d] x)
 370                 {
 371                         c := v.AuxInt
 372                         if v.Args[0].Op != OpAMD64ADDQconst {
 373                                 goto endd4cb539641f0dc40bfd0cb7fbb9b0405
 374                         }
 375                         d := v.Args[0].AuxInt
 376                         x := v.Args[0].Args[0]
 377                         v.Op = OpAMD64ADDQconst
 378                         v.AuxInt = 0
 379                         v.Aux = nil
 380                         v.resetArgs()
 381                         v.AuxInt = c + d
 382                         v.AddArg(x)
 383                         return true
 384                 }
 385                 goto endd4cb539641f0dc40bfd0cb7fbb9b0405
 386         endd4cb539641f0dc40bfd0cb7fbb9b0405:
 387                 ;
 388         case OpAMD64ADDW:
 389                 // match: (ADDW x (MOVWconst [c]))
 390                 // cond:
 391                 // result: (ADDWconst [c] x)
 392                 {
 393                         x := v.Args[0]
 394                         if v.Args[1].Op != OpAMD64MOVWconst {
 395                                 goto end1aabd2317de77c7dfc4876fd7e4c5011
 396                         }
 397                         c := v.Args[1].AuxInt
 398                         v.Op = OpAMD64ADDWconst
 399                         v.AuxInt = 0
 400                         v.Aux = nil
 401                         v.resetArgs()
 402                         v.AuxInt = c
 403                         v.AddArg(x)
 404                         return true
 405                 }
 406                 goto end1aabd2317de77c7dfc4876fd7e4c5011
 407         end1aabd2317de77c7dfc4876fd7e4c5011:
 408                 ;
 409                 // match: (ADDW (MOVWconst [c]) x)
 410                 // cond:
 411                 // result: (ADDWconst [c] x)
 412                 {
 413                         if v.Args[0].Op != OpAMD64MOVWconst {
 414                                 goto ende3aede99966f388afc624f9e86676fd2
 415                         }
 416                         c := v.Args[0].AuxInt
 417                         x := v.Args[1]
 418                         v.Op = OpAMD64ADDWconst
 419                         v.AuxInt = 0
 420                         v.Aux = nil
 421                         v.resetArgs()
 422                         v.AuxInt = c
 423                         v.AddArg(x)
 424                         return true
 425                 }
 426                 goto ende3aede99966f388afc624f9e86676fd2
 427         ende3aede99966f388afc624f9e86676fd2:
 428                 ;
 429                 // match: (ADDW x (NEGW y))
 430                 // cond:
 431                 // result: (SUBW x y)
 432                 {
 433                         x := v.Args[0]
 434                         if v.Args[1].Op != OpAMD64NEGW {
 435                                 goto end55cf2af0d75f3ec413528eeb799e94d5
 436                         }
 437                         y := v.Args[1].Args[0]
 438                         v.Op = OpAMD64SUBW
 439                         v.AuxInt = 0
 440                         v.Aux = nil
 441                         v.resetArgs()
 442                         v.AddArg(x)
 443                         v.AddArg(y)
 444                         return true
 445                 }
 446                 goto end55cf2af0d75f3ec413528eeb799e94d5
 447         end55cf2af0d75f3ec413528eeb799e94d5:
 448                 ;
 449         case OpAMD64ADDWconst:
 450                 // match: (ADDWconst [c] (MOVWconst [d]))
 451                 // cond:
 452                 // result: (MOVWconst [c+d])
 453                 {
 454                         c := v.AuxInt
 455                         if v.Args[0].Op != OpAMD64MOVWconst {
 456                                 goto end32541920f2f5a920dfae41d8ebbef00f
 457                         }
 458                         d := v.Args[0].AuxInt
 459                         v.Op = OpAMD64MOVWconst
 460                         v.AuxInt = 0
 461                         v.Aux = nil
 462                         v.resetArgs()
 463                         v.AuxInt = c + d
 464                         return true
 465                 }
 466                 goto end32541920f2f5a920dfae41d8ebbef00f
 467         end32541920f2f5a920dfae41d8ebbef00f:
 468                 ;
 469                 // match: (ADDWconst [c] (ADDWconst [d] x))
 470                 // cond:
 471                 // result: (ADDWconst [c+d] x)
 472                 {
 473                         c := v.AuxInt
 474                         if v.Args[0].Op != OpAMD64ADDWconst {
 475                                 goto end73944f6ddda7e4c050f11d17484ff9a5
 476                         }
 477                         d := v.Args[0].AuxInt
 478                         x := v.Args[0].Args[0]
 479                         v.Op = OpAMD64ADDWconst
 480                         v.AuxInt = 0
 481                         v.Aux = nil
 482                         v.resetArgs()
 483                         v.AuxInt = c + d
 484                         v.AddArg(x)
 485                         return true
 486                 }
 487                 goto end73944f6ddda7e4c050f11d17484ff9a5
 488         end73944f6ddda7e4c050f11d17484ff9a5:
 489                 ;
 490         case OpAMD64ANDB:
 491                 // match: (ANDB x (MOVLconst [c]))
 492                 // cond:
 493                 // result: (ANDBconst [c] x)
 494                 {
 495                         x := v.Args[0]
 496                         if v.Args[1].Op != OpAMD64MOVLconst {
 497                                 goto end01100cd255396e29bfdb130f4fbc9bbc
 498                         }
 499                         c := v.Args[1].AuxInt
 500                         v.Op = OpAMD64ANDBconst
 501                         v.AuxInt = 0
 502                         v.Aux = nil
 503                         v.resetArgs()
 504                         v.AuxInt = c
 505                         v.AddArg(x)
 506                         return true
 507                 }
 508                 goto end01100cd255396e29bfdb130f4fbc9bbc
 509         end01100cd255396e29bfdb130f4fbc9bbc:
 510                 ;
 511                 // match: (ANDB (MOVLconst [c]) x)
 512                 // cond:
 513                 // result: (ANDBconst [c] x)
 514                 {
 515                         if v.Args[0].Op != OpAMD64MOVLconst {
 516                                 goto end70830ce2834dc5f8d786fa6789460926
 517                         }
 518                         c := v.Args[0].AuxInt
 519                         x := v.Args[1]
 520                         v.Op = OpAMD64ANDBconst
 521                         v.AuxInt = 0
 522                         v.Aux = nil
 523                         v.resetArgs()
 524                         v.AuxInt = c
 525                         v.AddArg(x)
 526                         return true
 527                 }
 528                 goto end70830ce2834dc5f8d786fa6789460926
 529         end70830ce2834dc5f8d786fa6789460926:
 530                 ;
 531                 // match: (ANDB x (MOVBconst [c]))
 532                 // cond:
 533                 // result: (ANDBconst [c] x)
 534                 {
 535                         x := v.Args[0]
 536                         if v.Args[1].Op != OpAMD64MOVBconst {
 537                                 goto endd275ec2e73768cb3d201478fc934e06c
 538                         }
 539                         c := v.Args[1].AuxInt
 540                         v.Op = OpAMD64ANDBconst
 541                         v.AuxInt = 0
 542                         v.Aux = nil
 543                         v.resetArgs()
 544                         v.AuxInt = c
 545                         v.AddArg(x)
 546                         return true
 547                 }
 548                 goto endd275ec2e73768cb3d201478fc934e06c
 549         endd275ec2e73768cb3d201478fc934e06c:
 550                 ;
 551                 // match: (ANDB (MOVBconst [c]) x)
 552                 // cond:
 553                 // result: (ANDBconst [c] x)
 554                 {
 555                         if v.Args[0].Op != OpAMD64MOVBconst {
 556                                 goto end4068edac2ae0f354cf581db210288b98
 557                         }
 558                         c := v.Args[0].AuxInt
 559                         x := v.Args[1]
 560                         v.Op = OpAMD64ANDBconst
 561                         v.AuxInt = 0
 562                         v.Aux = nil
 563                         v.resetArgs()
 564                         v.AuxInt = c
 565                         v.AddArg(x)
 566                         return true
 567                 }
 568                 goto end4068edac2ae0f354cf581db210288b98
 569         end4068edac2ae0f354cf581db210288b98:
 570                 ;
 571                 // match: (ANDB x x)
 572                 // cond:
 573                 // result: x
 574                 {
 575                         x := v.Args[0]
 576                         if v.Args[1] != x {
 577                                 goto endb8ff272a1456513da708603abe37541c
 578                         }
 579                         v.Op = OpCopy
 580                         v.AuxInt = 0
 581                         v.Aux = nil
 582                         v.resetArgs()
 583                         v.Type = x.Type
 584                         v.AddArg(x)
 585                         return true
 586                 }
 587                 goto endb8ff272a1456513da708603abe37541c
 588         endb8ff272a1456513da708603abe37541c:
 589                 ;
 590         case OpAMD64ANDBconst:
 591                 // match: (ANDBconst [c] _)
 592                 // cond: int8(c)==0
 593                 // result: (MOVBconst [0])
 594                 {
 595                         c := v.AuxInt
 596                         if !(int8(c) == 0) {
 597                                 goto end2106d410c949da14d7c00041f40eca76
 598                         }
 599                         v.Op = OpAMD64MOVBconst
 600                         v.AuxInt = 0
 601                         v.Aux = nil
 602                         v.resetArgs()
 603                         v.AuxInt = 0
 604                         return true
 605                 }
 606                 goto end2106d410c949da14d7c00041f40eca76
 607         end2106d410c949da14d7c00041f40eca76:
 608                 ;
 609                 // match: (ANDBconst [c] x)
 610                 // cond: int8(c)==-1
 611                 // result: x
 612                 {
 613                         c := v.AuxInt
 614                         x := v.Args[0]
 615                         if !(int8(c) == -1) {
 616                                 goto enda0b78503c204c8225de1433949a71fe4
 617                         }
 618                         v.Op = OpCopy
 619                         v.AuxInt = 0
 620                         v.Aux = nil
 621                         v.resetArgs()
 622                         v.Type = x.Type
 623                         v.AddArg(x)
 624                         return true
 625                 }
 626                 goto enda0b78503c204c8225de1433949a71fe4
 627         enda0b78503c204c8225de1433949a71fe4:
 628                 ;
 629                 // match: (ANDBconst [c] (MOVBconst [d]))
 630                 // cond:
 631                 // result: (MOVBconst [c&d])
 632                 {
 633                         c := v.AuxInt
 634                         if v.Args[0].Op != OpAMD64MOVBconst {
 635                                 goto end946312b1f216933da86febe293eb956f
 636                         }
 637                         d := v.Args[0].AuxInt
 638                         v.Op = OpAMD64MOVBconst
 639                         v.AuxInt = 0
 640                         v.Aux = nil
 641                         v.resetArgs()
 642                         v.AuxInt = c & d
 643                         return true
 644                 }
 645                 goto end946312b1f216933da86febe293eb956f
 646         end946312b1f216933da86febe293eb956f:
 647                 ;
 648         case OpAMD64ANDL:
 649                 // match: (ANDL x (MOVLconst [c]))
 650                 // cond:
 651                 // result: (ANDLconst [c] x)
 652                 {
 653                         x := v.Args[0]
 654                         if v.Args[1].Op != OpAMD64MOVLconst {
 655                                 goto end0a4c49d9a26759c0fd21369dafcd7abb
 656                         }
 657                         c := v.Args[1].AuxInt
 658                         v.Op = OpAMD64ANDLconst
 659                         v.AuxInt = 0
 660                         v.Aux = nil
 661                         v.resetArgs()
 662                         v.AuxInt = c
 663                         v.AddArg(x)
 664                         return true
 665                 }
 666                 goto end0a4c49d9a26759c0fd21369dafcd7abb
 667         end0a4c49d9a26759c0fd21369dafcd7abb:
 668                 ;
 669                 // match: (ANDL (MOVLconst [c]) x)
 670                 // cond:
 671                 // result: (ANDLconst [c] x)
 672                 {
 673                         if v.Args[0].Op != OpAMD64MOVLconst {
 674                                 goto end0529ba323d9b6f15c41add401ef67959
 675                         }
 676                         c := v.Args[0].AuxInt
 677                         x := v.Args[1]
 678                         v.Op = OpAMD64ANDLconst
 679                         v.AuxInt = 0
 680                         v.Aux = nil
 681                         v.resetArgs()
 682                         v.AuxInt = c
 683                         v.AddArg(x)
 684                         return true
 685                 }
 686                 goto end0529ba323d9b6f15c41add401ef67959
 687         end0529ba323d9b6f15c41add401ef67959:
 688                 ;
 689                 // match: (ANDL x x)
 690                 // cond:
 691                 // result: x
 692                 {
 693                         x := v.Args[0]
 694                         if v.Args[1] != x {
 695                                 goto enddfb08a0d0c262854db3905cb323388c7
 696                         }
 697                         v.Op = OpCopy
 698                         v.AuxInt = 0
 699                         v.Aux = nil
 700                         v.resetArgs()
 701                         v.Type = x.Type
 702                         v.AddArg(x)
 703                         return true
 704                 }
 705                 goto enddfb08a0d0c262854db3905cb323388c7
 706         enddfb08a0d0c262854db3905cb323388c7:
 707                 ;
 708         case OpAMD64ANDLconst:
 709                 // match: (ANDLconst [c] _)
 710                 // cond: int32(c)==0
 711                 // result: (MOVLconst [0])
 712                 {
 713                         c := v.AuxInt
 714                         if !(int32(c) == 0) {
 715                                 goto end5efb241208aef28c950b7bcf8d85d5de
 716                         }
 717                         v.Op = OpAMD64MOVLconst
 718                         v.AuxInt = 0
 719                         v.Aux = nil
 720                         v.resetArgs()
 721                         v.AuxInt = 0
 722                         return true
 723                 }
 724                 goto end5efb241208aef28c950b7bcf8d85d5de
 725         end5efb241208aef28c950b7bcf8d85d5de:
 726                 ;
 727                 // match: (ANDLconst [c] x)
 728                 // cond: int32(c)==-1
 729                 // result: x
 730                 {
 731                         c := v.AuxInt
 732                         x := v.Args[0]
 733                         if !(int32(c) == -1) {
 734                                 goto end0e852ae30bb8289d6ffee0c9267e3e0c
 735                         }
 736                         v.Op = OpCopy
 737                         v.AuxInt = 0
 738                         v.Aux = nil
 739                         v.resetArgs()
 740                         v.Type = x.Type
 741                         v.AddArg(x)
 742                         return true
 743                 }
 744                 goto end0e852ae30bb8289d6ffee0c9267e3e0c
 745         end0e852ae30bb8289d6ffee0c9267e3e0c:
 746                 ;
 747                 // match: (ANDLconst [c] (MOVLconst [d]))
 748                 // cond:
 749                 // result: (MOVLconst [c&d])
 750                 {
 751                         c := v.AuxInt
 752                         if v.Args[0].Op != OpAMD64MOVLconst {
 753                                 goto end7bfd24059369753eadd235f07e2dd7b8
 754                         }
 755                         d := v.Args[0].AuxInt
 756                         v.Op = OpAMD64MOVLconst
 757                         v.AuxInt = 0
 758                         v.Aux = nil
 759                         v.resetArgs()
 760                         v.AuxInt = c & d
 761                         return true
 762                 }
 763                 goto end7bfd24059369753eadd235f07e2dd7b8
 764         end7bfd24059369753eadd235f07e2dd7b8:
 765                 ;
 766         case OpAMD64ANDQ:
 767                 // match: (ANDQ x (MOVQconst [c]))
 768                 // cond: is32Bit(c)
 769                 // result: (ANDQconst [c] x)
 770                 {
 771                         x := v.Args[0]
 772                         if v.Args[1].Op != OpAMD64MOVQconst {
 773                                 goto end048fadc69e81103480015b84b9cafff7
 774                         }
 775                         c := v.Args[1].AuxInt
 776                         if !(is32Bit(c)) {
 777                                 goto end048fadc69e81103480015b84b9cafff7
 778                         }
 779                         v.Op = OpAMD64ANDQconst
 780                         v.AuxInt = 0
 781                         v.Aux = nil
 782                         v.resetArgs()
 783                         v.AuxInt = c
 784                         v.AddArg(x)
 785                         return true
 786                 }
 787                 goto end048fadc69e81103480015b84b9cafff7
 788         end048fadc69e81103480015b84b9cafff7:
 789                 ;
 790                 // match: (ANDQ (MOVQconst [c]) x)
 791                 // cond: is32Bit(c)
 792                 // result: (ANDQconst [c] x)
 793                 {
 794                         if v.Args[0].Op != OpAMD64MOVQconst {
 795                                 goto end3035a3bf650b708705fd27dd857ab0a4
 796                         }
 797                         c := v.Args[0].AuxInt
 798                         x := v.Args[1]
 799                         if !(is32Bit(c)) {
 800                                 goto end3035a3bf650b708705fd27dd857ab0a4
 801                         }
 802                         v.Op = OpAMD64ANDQconst
 803                         v.AuxInt = 0
 804                         v.Aux = nil
 805                         v.resetArgs()
 806                         v.AuxInt = c
 807                         v.AddArg(x)
 808                         return true
 809                 }
 810                 goto end3035a3bf650b708705fd27dd857ab0a4
 811         end3035a3bf650b708705fd27dd857ab0a4:
 812                 ;
 813                 // match: (ANDQ x x)
 814                 // cond:
 815                 // result: x
 816                 {
 817                         x := v.Args[0]
 818                         if v.Args[1] != x {
 819                                 goto end06b5ec19efdd4e79f03a5e4a2c3c3427
 820                         }
 821                         v.Op = OpCopy
 822                         v.AuxInt = 0
 823                         v.Aux = nil
 824                         v.resetArgs()
 825                         v.Type = x.Type
 826                         v.AddArg(x)
 827                         return true
 828                 }
 829                 goto end06b5ec19efdd4e79f03a5e4a2c3c3427
 830         end06b5ec19efdd4e79f03a5e4a2c3c3427:
 831                 ;
 832         case OpAMD64ANDQconst:
 833                 // match: (ANDQconst [0] _)
 834                 // cond:
 835                 // result: (MOVQconst [0])
 836                 {
 837                         if v.AuxInt != 0 {
 838                                 goto end57018c1d0f54fd721521095b4832bab2
 839                         }
 840                         v.Op = OpAMD64MOVQconst
 841                         v.AuxInt = 0
 842                         v.Aux = nil
 843                         v.resetArgs()
 844                         v.AuxInt = 0
 845                         return true
 846                 }
 847                 goto end57018c1d0f54fd721521095b4832bab2
 848         end57018c1d0f54fd721521095b4832bab2:
 849                 ;
 850                 // match: (ANDQconst [-1] x)
 851                 // cond:
 852                 // result: x
 853                 {
 854                         if v.AuxInt != -1 {
 855                                 goto endb542c4b42ab94a7bedb32dec8f610d67
 856                         }
 857                         x := v.Args[0]
 858                         v.Op = OpCopy
 859                         v.AuxInt = 0
 860                         v.Aux = nil
 861                         v.resetArgs()
 862                         v.Type = x.Type
 863                         v.AddArg(x)
 864                         return true
 865                 }
 866                 goto endb542c4b42ab94a7bedb32dec8f610d67
 867         endb542c4b42ab94a7bedb32dec8f610d67:
 868                 ;
 869                 // match: (ANDQconst [c] (MOVQconst [d]))
 870                 // cond:
 871                 // result: (MOVQconst [c&d])
 872                 {
 873                         c := v.AuxInt
 874                         if v.Args[0].Op != OpAMD64MOVQconst {
 875                                 goto end67ca66494705b0345a5f22c710225292
 876                         }
 877                         d := v.Args[0].AuxInt
 878                         v.Op = OpAMD64MOVQconst
 879                         v.AuxInt = 0
 880                         v.Aux = nil
 881                         v.resetArgs()
 882                         v.AuxInt = c & d
 883                         return true
 884                 }
 885                 goto end67ca66494705b0345a5f22c710225292
 886         end67ca66494705b0345a5f22c710225292:
 887                 ;
 888         case OpAMD64ANDW:
 889                 // match: (ANDW x (MOVLconst [c]))
 890                 // cond:
 891                 // result: (ANDWconst [c] x)
 892                 {
 893                         x := v.Args[0]
 894                         if v.Args[1].Op != OpAMD64MOVLconst {
 895                                 goto endce6f557823ee2fdd7a8f47b6f925fc7c
 896                         }
 897                         c := v.Args[1].AuxInt
 898                         v.Op = OpAMD64ANDWconst
 899                         v.AuxInt = 0
 900                         v.Aux = nil
 901                         v.resetArgs()
 902                         v.AuxInt = c
 903                         v.AddArg(x)
 904                         return true
 905                 }
 906                 goto endce6f557823ee2fdd7a8f47b6f925fc7c
 907         endce6f557823ee2fdd7a8f47b6f925fc7c:
 908                 ;
 909                 // match: (ANDW (MOVLconst [c]) x)
 910                 // cond:
 911                 // result: (ANDWconst [c] x)
 912                 {
 913                         if v.Args[0].Op != OpAMD64MOVLconst {
 914                                 goto endc46af0d9265c08b09f1f1fba24feda80
 915                         }
 916                         c := v.Args[0].AuxInt
 917                         x := v.Args[1]
 918                         v.Op = OpAMD64ANDWconst
 919                         v.AuxInt = 0
 920                         v.Aux = nil
 921                         v.resetArgs()
 922                         v.AuxInt = c
 923                         v.AddArg(x)
 924                         return true
 925                 }
 926                 goto endc46af0d9265c08b09f1f1fba24feda80
 927         endc46af0d9265c08b09f1f1fba24feda80:
 928                 ;
 929                 // match: (ANDW x (MOVWconst [c]))
 930                 // cond:
 931                 // result: (ANDWconst [c] x)
 932                 {
 933                         x := v.Args[0]
 934                         if v.Args[1].Op != OpAMD64MOVWconst {
 935                                 goto enda77a39f65a5eb3436a5842eab69a3103
 936                         }
 937                         c := v.Args[1].AuxInt
 938                         v.Op = OpAMD64ANDWconst
 939                         v.AuxInt = 0
 940                         v.Aux = nil
 941                         v.resetArgs()
 942                         v.AuxInt = c
 943                         v.AddArg(x)
 944                         return true
 945                 }
 946                 goto enda77a39f65a5eb3436a5842eab69a3103
 947         enda77a39f65a5eb3436a5842eab69a3103:
 948                 ;
 949                 // match: (ANDW (MOVWconst [c]) x)
 950                 // cond:
 951                 // result: (ANDWconst [c] x)
 952                 {
 953                         if v.Args[0].Op != OpAMD64MOVWconst {
 954                                 goto endea2a25eb525a5dbf6d5132d84ea4e7a5
 955                         }
 956                         c := v.Args[0].AuxInt
 957                         x := v.Args[1]
 958                         v.Op = OpAMD64ANDWconst
 959                         v.AuxInt = 0
 960                         v.Aux = nil
 961                         v.resetArgs()
 962                         v.AuxInt = c
 963                         v.AddArg(x)
 964                         return true
 965                 }
 966                 goto endea2a25eb525a5dbf6d5132d84ea4e7a5
 967         endea2a25eb525a5dbf6d5132d84ea4e7a5:
 968                 ;
 969                 // match: (ANDW x x)
 970                 // cond:
 971                 // result: x
 972                 {
 973                         x := v.Args[0]
 974                         if v.Args[1] != x {
 975                                 goto end3a26cf52dd1b77f07cc9e005760dbb11
 976                         }
 977                         v.Op = OpCopy
 978                         v.AuxInt = 0
 979                         v.Aux = nil
 980                         v.resetArgs()
 981                         v.Type = x.Type
 982                         v.AddArg(x)
 983                         return true
 984                 }
 985                 goto end3a26cf52dd1b77f07cc9e005760dbb11
 986         end3a26cf52dd1b77f07cc9e005760dbb11:
 987                 ;
 988         case OpAMD64ANDWconst:
 989                 // match: (ANDWconst [c] _)
 990                 // cond: int16(c)==0
 991                 // result: (MOVWconst [0])
 992                 {
 993                         c := v.AuxInt
 994                         if !(int16(c) == 0) {
 995                                 goto end336ece33b4f0fb44dfe1f24981df7b74
 996                         }
 997                         v.Op = OpAMD64MOVWconst
 998                         v.AuxInt = 0
 999                         v.Aux = nil
1000                         v.resetArgs()
1001                         v.AuxInt = 0
1002                         return true
1003                 }
1004                 goto end336ece33b4f0fb44dfe1f24981df7b74
1005         end336ece33b4f0fb44dfe1f24981df7b74:
1006                 ;
1007                 // match: (ANDWconst [c] x)
1008                 // cond: int16(c)==-1
1009                 // result: x
1010                 {
1011                         c := v.AuxInt
1012                         x := v.Args[0]
1013                         if !(int16(c) == -1) {
1014                                 goto endfb111c3afa8c5c4040fa6000fadee810
1015                         }
1016                         v.Op = OpCopy
1017                         v.AuxInt = 0
1018                         v.Aux = nil
1019                         v.resetArgs()
1020                         v.Type = x.Type
1021                         v.AddArg(x)
1022                         return true
1023                 }
1024                 goto endfb111c3afa8c5c4040fa6000fadee810
1025         endfb111c3afa8c5c4040fa6000fadee810:
1026                 ;
1027                 // match: (ANDWconst [c] (MOVWconst [d]))
1028                 // cond:
1029                 // result: (MOVWconst [c&d])
1030                 {
1031                         c := v.AuxInt
1032                         if v.Args[0].Op != OpAMD64MOVWconst {
1033                                 goto end250eb27fcac10bf6c0d96ce66a21726e
1034                         }
1035                         d := v.Args[0].AuxInt
1036                         v.Op = OpAMD64MOVWconst
1037                         v.AuxInt = 0
1038                         v.Aux = nil
1039                         v.resetArgs()
1040                         v.AuxInt = c & d
1041                         return true
1042                 }
1043                 goto end250eb27fcac10bf6c0d96ce66a21726e
1044         end250eb27fcac10bf6c0d96ce66a21726e:
1045                 ;
1046         case OpAdd16:
1047                 // match: (Add16 x y)
1048                 // cond:
1049                 // result: (ADDW x y)
1050                 {
1051                         x := v.Args[0]
1052                         y := v.Args[1]
1053                         v.Op = OpAMD64ADDW
1054                         v.AuxInt = 0
1055                         v.Aux = nil
1056                         v.resetArgs()
1057                         v.AddArg(x)
1058                         v.AddArg(y)
1059                         return true
1060                 }
1061                 goto ende604481c6de9fe4574cb2954ba2ddc67
1062         ende604481c6de9fe4574cb2954ba2ddc67:
1063                 ;
1064         case OpAdd32:
1065                 // match: (Add32 x y)
1066                 // cond:
1067                 // result: (ADDL x y)
1068                 {
1069                         x := v.Args[0]
1070                         y := v.Args[1]
1071                         v.Op = OpAMD64ADDL
1072                         v.AuxInt = 0
1073                         v.Aux = nil
1074                         v.resetArgs()
1075                         v.AddArg(x)
1076                         v.AddArg(y)
1077                         return true
1078                 }
1079                 goto endc445ea2a65385445676cd684ae9a42b5
1080         endc445ea2a65385445676cd684ae9a42b5:
1081                 ;
1082         case OpAdd32F:
1083                 // match: (Add32F x y)
1084                 // cond:
1085                 // result: (ADDSS x y)
1086                 {
1087                         x := v.Args[0]
1088                         y := v.Args[1]
1089                         v.Op = OpAMD64ADDSS
1090                         v.AuxInt = 0
1091                         v.Aux = nil
1092                         v.resetArgs()
1093                         v.AddArg(x)
1094                         v.AddArg(y)
1095                         return true
1096                 }
1097                 goto end5d82e1c10823774894c036b7c5b8fed4
1098         end5d82e1c10823774894c036b7c5b8fed4:
1099                 ;
1100         case OpAdd64:
1101                 // match: (Add64 x y)
1102                 // cond:
1103                 // result: (ADDQ x y)
1104                 {
1105                         x := v.Args[0]
1106                         y := v.Args[1]
1107                         v.Op = OpAMD64ADDQ
1108                         v.AuxInt = 0
1109                         v.Aux = nil
1110                         v.resetArgs()
1111                         v.AddArg(x)
1112                         v.AddArg(y)
1113                         return true
1114                 }
1115                 goto endd88f18b3f39e3ccc201477a616f0abc0
1116         endd88f18b3f39e3ccc201477a616f0abc0:
1117                 ;
1118         case OpAdd64F:
1119                 // match: (Add64F x y)
1120                 // cond:
1121                 // result: (ADDSD x y)
1122                 {
1123                         x := v.Args[0]
1124                         y := v.Args[1]
1125                         v.Op = OpAMD64ADDSD
1126                         v.AuxInt = 0
1127                         v.Aux = nil
1128                         v.resetArgs()
1129                         v.AddArg(x)
1130                         v.AddArg(y)
1131                         return true
1132                 }
1133                 goto end62f2de6c70abd214e6987ee37976653a
1134         end62f2de6c70abd214e6987ee37976653a:
1135                 ;
1136         case OpAdd8:
1137                 // match: (Add8 x y)
1138                 // cond:
1139                 // result: (ADDB x y)
1140                 {
1141                         x := v.Args[0]
1142                         y := v.Args[1]
1143                         v.Op = OpAMD64ADDB
1144                         v.AuxInt = 0
1145                         v.Aux = nil
1146                         v.resetArgs()
1147                         v.AddArg(x)
1148                         v.AddArg(y)
1149                         return true
1150                 }
1151                 goto end6117c84a6b75c1b816b3fb095bc5f656
1152         end6117c84a6b75c1b816b3fb095bc5f656:
1153                 ;
1154         case OpAddPtr:
1155                 // match: (AddPtr x y)
1156                 // cond:
1157                 // result: (ADDQ x y)
1158                 {
1159                         x := v.Args[0]
1160                         y := v.Args[1]
1161                         v.Op = OpAMD64ADDQ
1162                         v.AuxInt = 0
1163                         v.Aux = nil
1164                         v.resetArgs()
1165                         v.AddArg(x)
1166                         v.AddArg(y)
1167                         return true
1168                 }
1169                 goto enda1d5640788c7157996f9d4af602dec1c
1170         enda1d5640788c7157996f9d4af602dec1c:
1171                 ;
1172         case OpAddr:
1173                 // match: (Addr {sym} base)
1174                 // cond:
1175                 // result: (LEAQ {sym} base)
1176                 {
1177                         sym := v.Aux
1178                         base := v.Args[0]
1179                         v.Op = OpAMD64LEAQ
1180                         v.AuxInt = 0
1181                         v.Aux = nil
1182                         v.resetArgs()
1183                         v.Aux = sym
1184                         v.AddArg(base)
1185                         return true
1186                 }
1187                 goto end53cad0c3c9daa5575680e77c14e05e72
1188         end53cad0c3c9daa5575680e77c14e05e72:
1189                 ;
1190         case OpAnd16:
1191                 // match: (And16 x y)
1192                 // cond:
1193                 // result: (ANDW x y)
1194                 {
1195                         x := v.Args[0]
1196                         y := v.Args[1]
1197                         v.Op = OpAMD64ANDW
1198                         v.AuxInt = 0
1199                         v.Aux = nil
1200                         v.resetArgs()
1201                         v.AddArg(x)
1202                         v.AddArg(y)
1203                         return true
1204                 }
1205                 goto end1c01f04a173d86ce1a6d1ef59e753014
1206         end1c01f04a173d86ce1a6d1ef59e753014:
1207                 ;
1208         case OpAnd32:
1209                 // match: (And32 x y)
1210                 // cond:
1211                 // result: (ANDL x y)
1212                 {
1213                         x := v.Args[0]
1214                         y := v.Args[1]
1215                         v.Op = OpAMD64ANDL
1216                         v.AuxInt = 0
1217                         v.Aux = nil
1218                         v.resetArgs()
1219                         v.AddArg(x)
1220                         v.AddArg(y)
1221                         return true
1222                 }
1223                 goto end6b9eb9375b3a859028a6ba6bf6b8ec88
1224         end6b9eb9375b3a859028a6ba6bf6b8ec88:
1225                 ;
1226         case OpAnd64:
1227                 // match: (And64 x y)
1228                 // cond:
1229                 // result: (ANDQ x y)
1230                 {
1231                         x := v.Args[0]
1232                         y := v.Args[1]
1233                         v.Op = OpAMD64ANDQ
1234                         v.AuxInt = 0
1235                         v.Aux = nil
1236                         v.resetArgs()
1237                         v.AddArg(x)
1238                         v.AddArg(y)
1239                         return true
1240                 }
1241                 goto enda0bde5853819d05fa2b7d3b723629552
1242         enda0bde5853819d05fa2b7d3b723629552:
1243                 ;
1244         case OpAnd8:
1245                 // match: (And8 x y)
1246                 // cond:
1247                 // result: (ANDB x y)
1248                 {
1249                         x := v.Args[0]
1250                         y := v.Args[1]
1251                         v.Op = OpAMD64ANDB
1252                         v.AuxInt = 0
1253                         v.Aux = nil
1254                         v.resetArgs()
1255                         v.AddArg(x)
1256                         v.AddArg(y)
1257                         return true
1258                 }
1259                 goto end0f53bee6291f1229b43aa1b5f977b4f2
1260         end0f53bee6291f1229b43aa1b5f977b4f2:
1261                 ;
1262         case OpAMD64CMPB:
1263                 // match: (CMPB x (MOVBconst [c]))
1264                 // cond:
1265                 // result: (CMPBconst x [c])
1266                 {
1267                         x := v.Args[0]
1268                         if v.Args[1].Op != OpAMD64MOVBconst {
1269                                 goto end52190c0b8759133aa6c540944965c4c0
1270                         }
1271                         c := v.Args[1].AuxInt
1272                         v.Op = OpAMD64CMPBconst
1273                         v.AuxInt = 0
1274                         v.Aux = nil
1275                         v.resetArgs()
1276                         v.AddArg(x)
1277                         v.AuxInt = c
1278                         return true
1279                 }
1280                 goto end52190c0b8759133aa6c540944965c4c0
1281         end52190c0b8759133aa6c540944965c4c0:
1282                 ;
1283                 // match: (CMPB (MOVBconst [c]) x)
1284                 // cond:
1285                 // result: (InvertFlags (CMPBconst x [c]))
1286                 {
1287                         if v.Args[0].Op != OpAMD64MOVBconst {
1288                                 goto end25ab646f9eb8749ea58c8fbbb4bf6bcd
1289                         }
1290                         c := v.Args[0].AuxInt
1291                         x := v.Args[1]
1292                         v.Op = OpAMD64InvertFlags
1293                         v.AuxInt = 0
1294                         v.Aux = nil
1295                         v.resetArgs()
1296                         v0 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
1297                         v0.AddArg(x)
1298                         v0.AuxInt = c
1299                         v0.Type = TypeFlags
1300                         v.AddArg(v0)
1301                         return true
1302                 }
1303                 goto end25ab646f9eb8749ea58c8fbbb4bf6bcd
1304         end25ab646f9eb8749ea58c8fbbb4bf6bcd:
1305                 ;
1306         case OpAMD64CMPL:
1307                 // match: (CMPL x (MOVLconst [c]))
1308                 // cond:
1309                 // result: (CMPLconst x [c])
1310                 {
1311                         x := v.Args[0]
1312                         if v.Args[1].Op != OpAMD64MOVLconst {
1313                                 goto end49ff4559c4bdecb2aef0c905e2d9a6cf
1314                         }
1315                         c := v.Args[1].AuxInt
1316                         v.Op = OpAMD64CMPLconst
1317                         v.AuxInt = 0
1318                         v.Aux = nil
1319                         v.resetArgs()
1320                         v.AddArg(x)
1321                         v.AuxInt = c
1322                         return true
1323                 }
1324                 goto end49ff4559c4bdecb2aef0c905e2d9a6cf
1325         end49ff4559c4bdecb2aef0c905e2d9a6cf:
1326                 ;
1327                 // match: (CMPL (MOVLconst [c]) x)
1328                 // cond:
1329                 // result: (InvertFlags (CMPLconst x [c]))
1330                 {
1331                         if v.Args[0].Op != OpAMD64MOVLconst {
1332                                 goto end7d89230086678ab4ed5cc96a3ae358d6
1333                         }
1334                         c := v.Args[0].AuxInt
1335                         x := v.Args[1]
1336                         v.Op = OpAMD64InvertFlags
1337                         v.AuxInt = 0
1338                         v.Aux = nil
1339                         v.resetArgs()
1340                         v0 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
1341                         v0.AddArg(x)
1342                         v0.AuxInt = c
1343                         v0.Type = TypeFlags
1344                         v.AddArg(v0)
1345                         return true
1346                 }
1347                 goto end7d89230086678ab4ed5cc96a3ae358d6
1348         end7d89230086678ab4ed5cc96a3ae358d6:
1349                 ;
1350         case OpAMD64CMPQ:
1351                 // match: (CMPQ x (MOVQconst [c]))
1352                 // cond: is32Bit(c)
1353                 // result: (CMPQconst x [c])
1354                 {
1355                         x := v.Args[0]
1356                         if v.Args[1].Op != OpAMD64MOVQconst {
1357                                 goto end3bbb2c6caa57853a7561738ce3c0c630
1358                         }
1359                         c := v.Args[1].AuxInt
1360                         if !(is32Bit(c)) {
1361                                 goto end3bbb2c6caa57853a7561738ce3c0c630
1362                         }
1363                         v.Op = OpAMD64CMPQconst
1364                         v.AuxInt = 0
1365                         v.Aux = nil
1366                         v.resetArgs()
1367                         v.AddArg(x)
1368                         v.AuxInt = c
1369                         return true
1370                 }
1371                 goto end3bbb2c6caa57853a7561738ce3c0c630
1372         end3bbb2c6caa57853a7561738ce3c0c630:
1373                 ;
1374                 // match: (CMPQ (MOVQconst [c]) x)
1375                 // cond: is32Bit(c)
1376                 // result: (InvertFlags (CMPQconst x [c]))
1377                 {
1378                         if v.Args[0].Op != OpAMD64MOVQconst {
1379                                 goto end153e951c4d9890ee40bf6f189ff6280e
1380                         }
1381                         c := v.Args[0].AuxInt
1382                         x := v.Args[1]
1383                         if !(is32Bit(c)) {
1384                                 goto end153e951c4d9890ee40bf6f189ff6280e
1385                         }
1386                         v.Op = OpAMD64InvertFlags
1387                         v.AuxInt = 0
1388                         v.Aux = nil
1389                         v.resetArgs()
1390                         v0 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
1391                         v0.AddArg(x)
1392                         v0.AuxInt = c
1393                         v0.Type = TypeFlags
1394                         v.AddArg(v0)
1395                         return true
1396                 }
1397                 goto end153e951c4d9890ee40bf6f189ff6280e
1398         end153e951c4d9890ee40bf6f189ff6280e:
1399                 ;
1400         case OpAMD64CMPW:
1401                 // match: (CMPW x (MOVWconst [c]))
1402                 // cond:
1403                 // result: (CMPWconst x [c])
1404                 {
1405                         x := v.Args[0]
1406                         if v.Args[1].Op != OpAMD64MOVWconst {
1407                                 goto end310a9ba58ac35c97587e08c63fe8a46c
1408                         }
1409                         c := v.Args[1].AuxInt
1410                         v.Op = OpAMD64CMPWconst
1411                         v.AuxInt = 0
1412                         v.Aux = nil
1413                         v.resetArgs()
1414                         v.AddArg(x)
1415                         v.AuxInt = c
1416                         return true
1417                 }
1418                 goto end310a9ba58ac35c97587e08c63fe8a46c
1419         end310a9ba58ac35c97587e08c63fe8a46c:
1420                 ;
1421                 // match: (CMPW (MOVWconst [c]) x)
1422                 // cond:
1423                 // result: (InvertFlags (CMPWconst x [c]))
1424                 {
1425                         if v.Args[0].Op != OpAMD64MOVWconst {
1426                                 goto end3c52d0ae6e3d186bf131b41276c21889
1427                         }
1428                         c := v.Args[0].AuxInt
1429                         x := v.Args[1]
1430                         v.Op = OpAMD64InvertFlags
1431                         v.AuxInt = 0
1432                         v.Aux = nil
1433                         v.resetArgs()
1434                         v0 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
1435                         v0.AddArg(x)
1436                         v0.AuxInt = c
1437                         v0.Type = TypeFlags
1438                         v.AddArg(v0)
1439                         return true
1440                 }
1441                 goto end3c52d0ae6e3d186bf131b41276c21889
1442         end3c52d0ae6e3d186bf131b41276c21889:
1443                 ;
1444         case OpClosureCall:
1445                 // match: (ClosureCall [argwid] entry closure mem)
1446                 // cond:
1447                 // result: (CALLclosure [argwid] entry closure mem)
1448                 {
1449                         argwid := v.AuxInt
1450                         entry := v.Args[0]
1451                         closure := v.Args[1]
1452                         mem := v.Args[2]
1453                         v.Op = OpAMD64CALLclosure
1454                         v.AuxInt = 0
1455                         v.Aux = nil
1456                         v.resetArgs()
1457                         v.AuxInt = argwid
1458                         v.AddArg(entry)
1459                         v.AddArg(closure)
1460                         v.AddArg(mem)
1461                         return true
1462                 }
1463                 goto endfd75d26316012d86cb71d0dd1214259b
1464         endfd75d26316012d86cb71d0dd1214259b:
1465                 ;
1466         case OpCom16:
1467                 // match: (Com16 x)
1468                 // cond:
1469                 // result: (NOTW x)
1470                 {
1471                         x := v.Args[0]
1472                         v.Op = OpAMD64NOTW
1473                         v.AuxInt = 0
1474                         v.Aux = nil
1475                         v.resetArgs()
1476                         v.AddArg(x)
1477                         return true
1478                 }
1479                 goto end1b14ba8d7d7aa585ec0a211827f280ae
1480         end1b14ba8d7d7aa585ec0a211827f280ae:
1481                 ;
1482         case OpCom32:
1483                 // match: (Com32 x)
1484                 // cond:
1485                 // result: (NOTL x)
1486                 {
1487                         x := v.Args[0]
1488                         v.Op = OpAMD64NOTL
1489                         v.AuxInt = 0
1490                         v.Aux = nil
1491                         v.resetArgs()
1492                         v.AddArg(x)
1493                         return true
1494                 }
1495                 goto end6eb124ba3bdb3fd6031414370852feb6
1496         end6eb124ba3bdb3fd6031414370852feb6:
1497                 ;
1498         case OpCom64:
1499                 // match: (Com64 x)
1500                 // cond:
1501                 // result: (NOTQ x)
1502                 {
1503                         x := v.Args[0]
1504                         v.Op = OpAMD64NOTQ
1505                         v.AuxInt = 0
1506                         v.Aux = nil
1507                         v.resetArgs()
1508                         v.AddArg(x)
1509                         return true
1510                 }
1511                 goto endf5f3b355a87779c347e305719dddda05
1512         endf5f3b355a87779c347e305719dddda05:
1513                 ;
1514         case OpCom8:
1515                 // match: (Com8 x)
1516                 // cond:
1517                 // result: (NOTB x)
1518                 {
1519                         x := v.Args[0]
1520                         v.Op = OpAMD64NOTB
1521                         v.AuxInt = 0
1522                         v.Aux = nil
1523                         v.resetArgs()
1524                         v.AddArg(x)
1525                         return true
1526                 }
1527                 goto end1c7c5c055d663ccf1f05fbc4883030c6
1528         end1c7c5c055d663ccf1f05fbc4883030c6:
1529                 ;
1530         case OpConst16:
1531                 // match: (Const16 [val])
1532                 // cond:
1533                 // result: (MOVWconst [val])
1534                 {
1535                         val := v.AuxInt
1536                         v.Op = OpAMD64MOVWconst
1537                         v.AuxInt = 0
1538                         v.Aux = nil
1539                         v.resetArgs()
1540                         v.AuxInt = val
1541                         return true
1542                 }
1543                 goto end2c6c92f297873b8ac12bd035d56d001e
1544         end2c6c92f297873b8ac12bd035d56d001e:
1545                 ;
1546         case OpConst32:
1547                 // match: (Const32 [val])
1548                 // cond:
1549                 // result: (MOVLconst [val])
1550                 {
1551                         val := v.AuxInt
1552                         v.Op = OpAMD64MOVLconst
1553                         v.AuxInt = 0
1554                         v.Aux = nil
1555                         v.resetArgs()
1556                         v.AuxInt = val
1557                         return true
1558                 }
1559                 goto enddae5807662af67143a3ac3ad9c63bae5
1560         enddae5807662af67143a3ac3ad9c63bae5:
1561                 ;
1562         case OpConst32F:
1563                 // match: (Const32F [val])
1564                 // cond:
1565                 // result: (MOVSSconst [val])
1566                 {
1567                         val := v.AuxInt
1568                         v.Op = OpAMD64MOVSSconst
1569                         v.AuxInt = 0
1570                         v.Aux = nil
1571                         v.resetArgs()
1572                         v.AuxInt = val
1573                         return true
1574                 }
1575                 goto endfabcef2d57a8f36eaa6041de6f112b89
1576         endfabcef2d57a8f36eaa6041de6f112b89:
1577                 ;
1578         case OpConst64:
1579                 // match: (Const64 [val])
1580                 // cond:
1581                 // result: (MOVQconst [val])
1582                 {
1583                         val := v.AuxInt
1584                         v.Op = OpAMD64MOVQconst
1585                         v.AuxInt = 0
1586                         v.Aux = nil
1587                         v.resetArgs()
1588                         v.AuxInt = val
1589                         return true
1590                 }
1591                 goto endc630434ae7f143ab69d5f482a9b52b5f
1592         endc630434ae7f143ab69d5f482a9b52b5f:
1593                 ;
1594         case OpConst64F:
1595                 // match: (Const64F [val])
1596                 // cond:
1597                 // result: (MOVSDconst [val])
1598                 {
1599                         val := v.AuxInt
1600                         v.Op = OpAMD64MOVSDconst
1601                         v.AuxInt = 0
1602                         v.Aux = nil
1603                         v.resetArgs()
1604                         v.AuxInt = val
1605                         return true
1606                 }
1607                 goto endae6cf7189e464bbde17b98635a20f0ff
1608         endae6cf7189e464bbde17b98635a20f0ff:
1609                 ;
1610         case OpConst8:
1611                 // match: (Const8 [val])
1612                 // cond:
1613                 // result: (MOVBconst [val])
1614                 {
1615                         val := v.AuxInt
1616                         v.Op = OpAMD64MOVBconst
1617                         v.AuxInt = 0
1618                         v.Aux = nil
1619                         v.resetArgs()
1620                         v.AuxInt = val
1621                         return true
1622                 }
1623                 goto end200524c722ed14ca935ba47f8f30327d
1624         end200524c722ed14ca935ba47f8f30327d:
1625                 ;
1626         case OpConstBool:
1627                 // match: (ConstBool [b])
1628                 // cond:
1629                 // result: (MOVBconst [b])
1630                 {
1631                         b := v.AuxInt
1632                         v.Op = OpAMD64MOVBconst
1633                         v.AuxInt = 0
1634                         v.Aux = nil
1635                         v.resetArgs()
1636                         v.AuxInt = b
1637                         return true
1638                 }
1639                 goto end6d919011283330dcbcb3826f0adc6793
1640         end6d919011283330dcbcb3826f0adc6793:
1641                 ;
1642         case OpConstNil:
1643                 // match: (ConstNil)
1644                 // cond:
1645                 // result: (MOVQconst [0])
1646                 {
1647                         v.Op = OpAMD64MOVQconst
1648                         v.AuxInt = 0
1649                         v.Aux = nil
1650                         v.resetArgs()
1651                         v.AuxInt = 0
1652                         return true
1653                 }
1654                 goto endea557d921056c25b945a49649e4b9b91
1655         endea557d921056c25b945a49649e4b9b91:
1656                 ;
1657         case OpConstPtr:
1658                 // match: (ConstPtr [val])
1659                 // cond:
1660                 // result: (MOVQconst [val])
1661                 {
1662                         val := v.AuxInt
1663                         v.Op = OpAMD64MOVQconst
1664                         v.AuxInt = 0
1665                         v.Aux = nil
1666                         v.resetArgs()
1667                         v.AuxInt = val
1668                         return true
1669                 }
1670                 goto endc395c0a53eeccf597e225a07b53047d1
1671         endc395c0a53eeccf597e225a07b53047d1:
1672                 ;
1673         case OpCvt32Fto32:
1674                 // match: (Cvt32Fto32 x)
1675                 // cond:
1676                 // result: (CVTTSS2SL x)
1677                 {
1678                         x := v.Args[0]
1679                         v.Op = OpAMD64CVTTSS2SL
1680                         v.AuxInt = 0
1681                         v.Aux = nil
1682                         v.resetArgs()
1683                         v.AddArg(x)
1684                         return true
1685                 }
1686                 goto enda410209d31804e1bce7bdc235fc62342
1687         enda410209d31804e1bce7bdc235fc62342:
1688                 ;
1689         case OpCvt32Fto64:
1690                 // match: (Cvt32Fto64 x)
1691                 // cond:
1692                 // result: (CVTTSS2SQ x)
1693                 {
1694                         x := v.Args[0]
1695                         v.Op = OpAMD64CVTTSS2SQ
1696                         v.AuxInt = 0
1697                         v.Aux = nil
1698                         v.resetArgs()
1699                         v.AddArg(x)
1700                         return true
1701                 }
1702                 goto enddb02fa4f3230a14d557d6c90cdadd523
1703         enddb02fa4f3230a14d557d6c90cdadd523:
1704                 ;
1705         case OpCvt32Fto64F:
1706                 // match: (Cvt32Fto64F x)
1707                 // cond:
1708                 // result: (CVTSS2SD x)
1709                 {
1710                         x := v.Args[0]
1711                         v.Op = OpAMD64CVTSS2SD
1712                         v.AuxInt = 0
1713                         v.Aux = nil
1714                         v.resetArgs()
1715                         v.AddArg(x)
1716                         return true
1717                 }
1718                 goto end0bf5d6f8d182ee2b3ab7d7c2f8ff7790
1719         end0bf5d6f8d182ee2b3ab7d7c2f8ff7790:
1720                 ;
1721         case OpCvt32to32F:
1722                 // match: (Cvt32to32F x)
1723                 // cond:
1724                 // result: (CVTSL2SS x)
1725                 {
1726                         x := v.Args[0]
1727                         v.Op = OpAMD64CVTSL2SS
1728                         v.AuxInt = 0
1729                         v.Aux = nil
1730                         v.resetArgs()
1731                         v.AddArg(x)
1732                         return true
1733                 }
1734                 goto ende0bdea2b21aecdb8399d6fd80ddc97d6
1735         ende0bdea2b21aecdb8399d6fd80ddc97d6:
1736                 ;
1737         case OpCvt32to64F:
1738                 // match: (Cvt32to64F x)
1739                 // cond:
1740                 // result: (CVTSL2SD x)
1741                 {
1742                         x := v.Args[0]
1743                         v.Op = OpAMD64CVTSL2SD
1744                         v.AuxInt = 0
1745                         v.Aux = nil
1746                         v.resetArgs()
1747                         v.AddArg(x)
1748                         return true
1749                 }
1750                 goto ende06cbe745112bcf0e6612788ef71c958
1751         ende06cbe745112bcf0e6612788ef71c958:
1752                 ;
1753         case OpCvt64Fto32:
1754                 // match: (Cvt64Fto32 x)
1755                 // cond:
1756                 // result: (CVTTSD2SL x)
1757                 {
1758                         x := v.Args[0]
1759                         v.Op = OpAMD64CVTTSD2SL
1760                         v.AuxInt = 0
1761                         v.Aux = nil
1762                         v.resetArgs()
1763                         v.AddArg(x)
1764                         return true
1765                 }
1766                 goto endc213dd690dfe568607dec717b2c385b7
1767         endc213dd690dfe568607dec717b2c385b7:
1768                 ;
1769         case OpCvt64Fto32F:
1770                 // match: (Cvt64Fto32F x)
1771                 // cond:
1772                 // result: (CVTSD2SS x)
1773                 {
1774                         x := v.Args[0]
1775                         v.Op = OpAMD64CVTSD2SS
1776                         v.AuxInt = 0
1777                         v.Aux = nil
1778                         v.resetArgs()
1779                         v.AddArg(x)
1780                         return true
1781                 }
1782                 goto endfd70158a96824ced99712d606c607d94
1783         endfd70158a96824ced99712d606c607d94:
1784                 ;
1785         case OpCvt64Fto64:
1786                 // match: (Cvt64Fto64 x)
1787                 // cond:
1788                 // result: (CVTTSD2SQ x)
1789                 {
1790                         x := v.Args[0]
1791                         v.Op = OpAMD64CVTTSD2SQ
1792                         v.AuxInt = 0
1793                         v.Aux = nil
1794                         v.resetArgs()
1795                         v.AddArg(x)
1796                         return true
1797                 }
1798                 goto end0bf3e4468047fd20714266ff05797454
1799         end0bf3e4468047fd20714266ff05797454:
1800                 ;
1801         case OpCvt64to32F:
1802                 // match: (Cvt64to32F x)
1803                 // cond:
1804                 // result: (CVTSQ2SS x)
1805                 {
1806                         x := v.Args[0]
1807                         v.Op = OpAMD64CVTSQ2SS
1808                         v.AuxInt = 0
1809                         v.Aux = nil
1810                         v.resetArgs()
1811                         v.AddArg(x)
1812                         return true
1813                 }
1814                 goto endfecc08b8a8cbd2bf3be21a077c4d0d40
1815         endfecc08b8a8cbd2bf3be21a077c4d0d40:
1816                 ;
1817         case OpCvt64to64F:
1818                 // match: (Cvt64to64F x)
1819                 // cond:
1820                 // result: (CVTSQ2SD x)
1821                 {
1822                         x := v.Args[0]
1823                         v.Op = OpAMD64CVTSQ2SD
1824                         v.AuxInt = 0
1825                         v.Aux = nil
1826                         v.resetArgs()
1827                         v.AddArg(x)
1828                         return true
1829                 }
1830                 goto endf74ce5df659f385f75c61187b515a5d0
1831         endf74ce5df659f385f75c61187b515a5d0:
1832                 ;
1833         case OpDeferCall:
1834                 // match: (DeferCall [argwid] mem)
1835                 // cond:
1836                 // result: (CALLdefer [argwid] mem)
1837                 {
1838                         argwid := v.AuxInt
1839                         mem := v.Args[0]
1840                         v.Op = OpAMD64CALLdefer
1841                         v.AuxInt = 0
1842                         v.Aux = nil
1843                         v.resetArgs()
1844                         v.AuxInt = argwid
1845                         v.AddArg(mem)
1846                         return true
1847                 }
1848                 goto end1c408581037450df959dd1fb7554a022
1849         end1c408581037450df959dd1fb7554a022:
1850                 ;
1851         case OpDiv16:
1852                 // match: (Div16 x y)
1853                 // cond:
1854                 // result: (DIVW x y)
1855                 {
1856                         x := v.Args[0]
1857                         y := v.Args[1]
1858                         v.Op = OpAMD64DIVW
1859                         v.AuxInt = 0
1860                         v.Aux = nil
1861                         v.resetArgs()
1862                         v.AddArg(x)
1863                         v.AddArg(y)
1864                         return true
1865                 }
1866                 goto endb60a86e606726640c84d3e1e5a5ce890
1867         endb60a86e606726640c84d3e1e5a5ce890:
1868                 ;
1869         case OpDiv16u:
1870                 // match: (Div16u x y)
1871                 // cond:
1872                 // result: (DIVWU x y)
1873                 {
1874                         x := v.Args[0]
1875                         y := v.Args[1]
1876                         v.Op = OpAMD64DIVWU
1877                         v.AuxInt = 0
1878                         v.Aux = nil
1879                         v.resetArgs()
1880                         v.AddArg(x)
1881                         v.AddArg(y)
1882                         return true
1883                 }
1884                 goto end6af9e212a865593e506bfdf7db67c9ec
1885         end6af9e212a865593e506bfdf7db67c9ec:
1886                 ;
1887         case OpDiv32:
1888                 // match: (Div32 x y)
1889                 // cond:
1890                 // result: (DIVL x y)
1891                 {
1892                         x := v.Args[0]
1893                         y := v.Args[1]
1894                         v.Op = OpAMD64DIVL
1895                         v.AuxInt = 0
1896                         v.Aux = nil
1897                         v.resetArgs()
1898                         v.AddArg(x)
1899                         v.AddArg(y)
1900                         return true
1901                 }
1902                 goto endf20ac71407e57c2904684d3cc33cf697
1903         endf20ac71407e57c2904684d3cc33cf697:
1904                 ;
1905         case OpDiv32F:
1906                 // match: (Div32F x y)
1907                 // cond:
1908                 // result: (DIVSS x y)
1909                 {
1910                         x := v.Args[0]
1911                         y := v.Args[1]
1912                         v.Op = OpAMD64DIVSS
1913                         v.AuxInt = 0
1914                         v.Aux = nil
1915                         v.resetArgs()
1916                         v.AddArg(x)
1917                         v.AddArg(y)
1918                         return true
1919                 }
1920                 goto enddca0462c7b176c4138854d7d5627ab5b
1921         enddca0462c7b176c4138854d7d5627ab5b:
1922                 ;
1923         case OpDiv32u:
1924                 // match: (Div32u x y)
1925                 // cond:
1926                 // result: (DIVLU x y)
1927                 {
1928                         x := v.Args[0]
1929                         y := v.Args[1]
1930                         v.Op = OpAMD64DIVLU
1931                         v.AuxInt = 0
1932                         v.Aux = nil
1933                         v.resetArgs()
1934                         v.AddArg(x)
1935                         v.AddArg(y)
1936                         return true
1937                 }
1938                 goto enda22604d23eeb1298008c97b817f60bbd
1939         enda22604d23eeb1298008c97b817f60bbd:
1940                 ;
1941         case OpDiv64:
1942                 // match: (Div64 x y)
1943                 // cond:
1944                 // result: (DIVQ x y)
1945                 {
1946                         x := v.Args[0]
1947                         y := v.Args[1]
1948                         v.Op = OpAMD64DIVQ
1949                         v.AuxInt = 0
1950                         v.Aux = nil
1951                         v.resetArgs()
1952                         v.AddArg(x)
1953                         v.AddArg(y)
1954                         return true
1955                 }
1956                 goto end86490d9b337333dfc09a413e1e0120a9
1957         end86490d9b337333dfc09a413e1e0120a9:
1958                 ;
1959         case OpDiv64F:
1960                 // match: (Div64F x y)
1961                 // cond:
1962                 // result: (DIVSD x y)
1963                 {
1964                         x := v.Args[0]
1965                         y := v.Args[1]
1966                         v.Op = OpAMD64DIVSD
1967                         v.AuxInt = 0
1968                         v.Aux = nil
1969                         v.resetArgs()
1970                         v.AddArg(x)
1971                         v.AddArg(y)
1972                         return true
1973                 }
1974                 goto end12299d76db5144a60f564d34ba97eb43
1975         end12299d76db5144a60f564d34ba97eb43:
1976                 ;
1977         case OpDiv64u:
1978                 // match: (Div64u x y)
1979                 // cond:
1980                 // result: (DIVQU x y)
1981                 {
1982                         x := v.Args[0]
1983                         y := v.Args[1]
1984                         v.Op = OpAMD64DIVQU
1985                         v.AuxInt = 0
1986                         v.Aux = nil
1987                         v.resetArgs()
1988                         v.AddArg(x)
1989                         v.AddArg(y)
1990                         return true
1991                 }
1992                 goto endf871d8b397e5fad6a5b500cc0c759a8d
1993         endf871d8b397e5fad6a5b500cc0c759a8d:
1994                 ;
1995         case OpDiv8:
1996                 // match: (Div8 x y)
1997                 // cond:
1998                 // result: (DIVW (SignExt8to16 x) (SignExt8to16 y))
1999                 {
2000                         x := v.Args[0]
2001                         y := v.Args[1]
2002                         v.Op = OpAMD64DIVW
2003                         v.AuxInt = 0
2004                         v.Aux = nil
2005                         v.resetArgs()
2006                         v0 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
2007                         v0.AddArg(x)
2008                         v0.Type = config.fe.TypeInt16()
2009                         v.AddArg(v0)
2010                         v1 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
2011                         v1.AddArg(y)
2012                         v1.Type = config.fe.TypeInt16()
2013                         v.AddArg(v1)
2014                         return true
2015                 }
2016                 goto endeee2bc780a73ec2ccb1a66c527816ee0
2017         endeee2bc780a73ec2ccb1a66c527816ee0:
2018                 ;
2019         case OpDiv8u:
2020                 // match: (Div8u x y)
2021                 // cond:
2022                 // result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y))
2023                 {
2024                         x := v.Args[0]
2025                         y := v.Args[1]
2026                         v.Op = OpAMD64DIVWU
2027                         v.AuxInt = 0
2028                         v.Aux = nil
2029                         v.resetArgs()
2030                         v0 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
2031                         v0.AddArg(x)
2032                         v0.Type = config.fe.TypeUInt16()
2033                         v.AddArg(v0)
2034                         v1 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
2035                         v1.AddArg(y)
2036                         v1.Type = config.fe.TypeUInt16()
2037                         v.AddArg(v1)
2038                         return true
2039                 }
2040                 goto end39da6664d6434d844303f6924cc875dd
2041         end39da6664d6434d844303f6924cc875dd:
2042                 ;
2043         case OpEq16:
2044                 // match: (Eq16 x y)
2045                 // cond:
2046                 // result: (SETEQ (CMPW x y))
2047                 {
2048                         x := v.Args[0]
2049                         y := v.Args[1]
2050                         v.Op = OpAMD64SETEQ
2051                         v.AuxInt = 0
2052                         v.Aux = nil
2053                         v.resetArgs()
2054                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2055                         v0.AddArg(x)
2056                         v0.AddArg(y)
2057                         v0.Type = TypeFlags
2058                         v.AddArg(v0)
2059                         return true
2060                 }
2061                 goto endd7f668b1d23603b0949953ee8dec8107
2062         endd7f668b1d23603b0949953ee8dec8107:
2063                 ;
2064         case OpEq32:
2065                 // match: (Eq32 x y)
2066                 // cond:
2067                 // result: (SETEQ (CMPL x y))
2068                 {
2069                         x := v.Args[0]
2070                         y := v.Args[1]
2071                         v.Op = OpAMD64SETEQ
2072                         v.AuxInt = 0
2073                         v.Aux = nil
2074                         v.resetArgs()
2075                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2076                         v0.AddArg(x)
2077                         v0.AddArg(y)
2078                         v0.Type = TypeFlags
2079                         v.AddArg(v0)
2080                         return true
2081                 }
2082                 goto endf28041ae0c73fb341cc0d2f4903fb2fb
2083         endf28041ae0c73fb341cc0d2f4903fb2fb:
2084                 ;
2085         case OpEq32F:
2086                 // match: (Eq32F x y)
2087                 // cond:
2088                 // result: (SETEQF (UCOMISS x y))
2089                 {
2090                         x := v.Args[0]
2091                         y := v.Args[1]
2092                         v.Op = OpAMD64SETEQF
2093                         v.AuxInt = 0
2094                         v.Aux = nil
2095                         v.resetArgs()
2096                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
2097                         v0.AddArg(x)
2098                         v0.AddArg(y)
2099                         v0.Type = TypeFlags
2100                         v.AddArg(v0)
2101                         return true
2102                 }
2103                 goto endb2c12933769e5faa8fc238048e113dee
2104         endb2c12933769e5faa8fc238048e113dee:
2105                 ;
2106         case OpEq64:
2107                 // match: (Eq64 x y)
2108                 // cond:
2109                 // result: (SETEQ (CMPQ x y))
2110                 {
2111                         x := v.Args[0]
2112                         y := v.Args[1]
2113                         v.Op = OpAMD64SETEQ
2114                         v.AuxInt = 0
2115                         v.Aux = nil
2116                         v.resetArgs()
2117                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2118                         v0.AddArg(x)
2119                         v0.AddArg(y)
2120                         v0.Type = TypeFlags
2121                         v.AddArg(v0)
2122                         return true
2123                 }
2124                 goto ende07a380487b710b51bcd5aa6d3144b8c
2125         ende07a380487b710b51bcd5aa6d3144b8c:
2126                 ;
2127         case OpEq64F:
2128                 // match: (Eq64F x y)
2129                 // cond:
2130                 // result: (SETEQF (UCOMISD x y))
2131                 {
2132                         x := v.Args[0]
2133                         y := v.Args[1]
2134                         v.Op = OpAMD64SETEQF
2135                         v.AuxInt = 0
2136                         v.Aux = nil
2137                         v.resetArgs()
2138                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
2139                         v0.AddArg(x)
2140                         v0.AddArg(y)
2141                         v0.Type = TypeFlags
2142                         v.AddArg(v0)
2143                         return true
2144                 }
2145                 goto end68e20c0c1b3ee62fbd17af07ac100704
2146         end68e20c0c1b3ee62fbd17af07ac100704:
2147                 ;
2148         case OpEq8:
2149                 // match: (Eq8 x y)
2150                 // cond:
2151                 // result: (SETEQ (CMPB x y))
2152                 {
2153                         x := v.Args[0]
2154                         y := v.Args[1]
2155                         v.Op = OpAMD64SETEQ
2156                         v.AuxInt = 0
2157                         v.Aux = nil
2158                         v.resetArgs()
2159                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
2160                         v0.AddArg(x)
2161                         v0.AddArg(y)
2162                         v0.Type = TypeFlags
2163                         v.AddArg(v0)
2164                         return true
2165                 }
2166                 goto end359e5a51d2ab928a455f0ae5adb42ab0
2167         end359e5a51d2ab928a455f0ae5adb42ab0:
2168                 ;
2169         case OpEqPtr:
2170                 // match: (EqPtr x y)
2171                 // cond:
2172                 // result: (SETEQ (CMPQ x y))
2173                 {
2174                         x := v.Args[0]
2175                         y := v.Args[1]
2176                         v.Op = OpAMD64SETEQ
2177                         v.AuxInt = 0
2178                         v.Aux = nil
2179                         v.resetArgs()
2180                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2181                         v0.AddArg(x)
2182                         v0.AddArg(y)
2183                         v0.Type = TypeFlags
2184                         v.AddArg(v0)
2185                         return true
2186                 }
2187                 goto endf19bd3c0eb99d15718bef4066d62560c
2188         endf19bd3c0eb99d15718bef4066d62560c:
2189                 ;
2190         case OpGeq16:
2191                 // match: (Geq16 x y)
2192                 // cond:
2193                 // result: (SETGE (CMPW x y))
2194                 {
2195                         x := v.Args[0]
2196                         y := v.Args[1]
2197                         v.Op = OpAMD64SETGE
2198                         v.AuxInt = 0
2199                         v.Aux = nil
2200                         v.resetArgs()
2201                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2202                         v0.AddArg(x)
2203                         v0.AddArg(y)
2204                         v0.Type = TypeFlags
2205                         v.AddArg(v0)
2206                         return true
2207                 }
2208                 goto end0a3f723d5c0b877c473b0043d814867b
2209         end0a3f723d5c0b877c473b0043d814867b:
2210                 ;
2211         case OpGeq16U:
2212                 // match: (Geq16U x y)
2213                 // cond:
2214                 // result: (SETAE (CMPW x y))
2215                 {
2216                         x := v.Args[0]
2217                         y := v.Args[1]
2218                         v.Op = OpAMD64SETAE
2219                         v.AuxInt = 0
2220                         v.Aux = nil
2221                         v.resetArgs()
2222                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2223                         v0.AddArg(x)
2224                         v0.AddArg(y)
2225                         v0.Type = TypeFlags
2226                         v.AddArg(v0)
2227                         return true
2228                 }
2229                 goto end79d754a28ee34eff95140635b26f0248
2230         end79d754a28ee34eff95140635b26f0248:
2231                 ;
2232         case OpGeq32:
2233                 // match: (Geq32 x y)
2234                 // cond:
2235                 // result: (SETGE (CMPL x y))
2236                 {
2237                         x := v.Args[0]
2238                         y := v.Args[1]
2239                         v.Op = OpAMD64SETGE
2240                         v.AuxInt = 0
2241                         v.Aux = nil
2242                         v.resetArgs()
2243                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2244                         v0.AddArg(x)
2245                         v0.AddArg(y)
2246                         v0.Type = TypeFlags
2247                         v.AddArg(v0)
2248                         return true
2249                 }
2250                 goto endfb1f6286a1b153b2a3f5b8548a782c8c
2251         endfb1f6286a1b153b2a3f5b8548a782c8c:
2252                 ;
2253         case OpGeq32F:
2254                 // match: (Geq32F x y)
2255                 // cond:
2256                 // result: (SETGEF (UCOMISS x y))
2257                 {
2258                         x := v.Args[0]
2259                         y := v.Args[1]
2260                         v.Op = OpAMD64SETGEF
2261                         v.AuxInt = 0
2262                         v.Aux = nil
2263                         v.resetArgs()
2264                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
2265                         v0.AddArg(x)
2266                         v0.AddArg(y)
2267                         v0.Type = TypeFlags
2268                         v.AddArg(v0)
2269                         return true
2270                 }
2271                 goto end7a8d6107a945410e64db06669a61da97
2272         end7a8d6107a945410e64db06669a61da97:
2273                 ;
2274         case OpGeq32U:
2275                 // match: (Geq32U x y)
2276                 // cond:
2277                 // result: (SETAE (CMPL x y))
2278                 {
2279                         x := v.Args[0]
2280                         y := v.Args[1]
2281                         v.Op = OpAMD64SETAE
2282                         v.AuxInt = 0
2283                         v.Aux = nil
2284                         v.resetArgs()
2285                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2286                         v0.AddArg(x)
2287                         v0.AddArg(y)
2288                         v0.Type = TypeFlags
2289                         v.AddArg(v0)
2290                         return true
2291                 }
2292                 goto endc5d3478a626df01ede063564f4cb80d0
2293         endc5d3478a626df01ede063564f4cb80d0:
2294                 ;
2295         case OpGeq64:
2296                 // match: (Geq64 x y)
2297                 // cond:
2298                 // result: (SETGE (CMPQ x y))
2299                 {
2300                         x := v.Args[0]
2301                         y := v.Args[1]
2302                         v.Op = OpAMD64SETGE
2303                         v.AuxInt = 0
2304                         v.Aux = nil
2305                         v.resetArgs()
2306                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2307                         v0.AddArg(x)
2308                         v0.AddArg(y)
2309                         v0.Type = TypeFlags
2310                         v.AddArg(v0)
2311                         return true
2312                 }
2313                 goto end74bddb7905ab865de5b041e7e4789911
2314         end74bddb7905ab865de5b041e7e4789911:
2315                 ;
2316         case OpGeq64F:
2317                 // match: (Geq64F x y)
2318                 // cond:
2319                 // result: (SETGEF (UCOMISD x y))
2320                 {
2321                         x := v.Args[0]
2322                         y := v.Args[1]
2323                         v.Op = OpAMD64SETGEF
2324                         v.AuxInt = 0
2325                         v.Aux = nil
2326                         v.resetArgs()
2327                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
2328                         v0.AddArg(x)
2329                         v0.AddArg(y)
2330                         v0.Type = TypeFlags
2331                         v.AddArg(v0)
2332                         return true
2333                 }
2334                 goto end9fac9bd98ef58b7fbbe1a31f84bdcccf
2335         end9fac9bd98ef58b7fbbe1a31f84bdcccf:
2336                 ;
2337         case OpGeq64U:
2338                 // match: (Geq64U x y)
2339                 // cond:
2340                 // result: (SETAE (CMPQ x y))
2341                 {
2342                         x := v.Args[0]
2343                         y := v.Args[1]
2344                         v.Op = OpAMD64SETAE
2345                         v.AuxInt = 0
2346                         v.Aux = nil
2347                         v.resetArgs()
2348                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2349                         v0.AddArg(x)
2350                         v0.AddArg(y)
2351                         v0.Type = TypeFlags
2352                         v.AddArg(v0)
2353                         return true
2354                 }
2355                 goto end95101721fc8f5be9969e50e364143e7f
2356         end95101721fc8f5be9969e50e364143e7f:
2357                 ;
2358         case OpGeq8:
2359                 // match: (Geq8  x y)
2360                 // cond:
2361                 // result: (SETGE (CMPB x y))
2362                 {
2363                         x := v.Args[0]
2364                         y := v.Args[1]
2365                         v.Op = OpAMD64SETGE
2366                         v.AuxInt = 0
2367                         v.Aux = nil
2368                         v.resetArgs()
2369                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
2370                         v0.AddArg(x)
2371                         v0.AddArg(y)
2372                         v0.Type = TypeFlags
2373                         v.AddArg(v0)
2374                         return true
2375                 }
2376                 goto end983070a3db317bdb64b5a0fb104d267c
2377         end983070a3db317bdb64b5a0fb104d267c:
2378                 ;
2379         case OpGeq8U:
2380                 // match: (Geq8U  x y)
2381                 // cond:
2382                 // result: (SETAE (CMPB x y))
2383                 {
2384                         x := v.Args[0]
2385                         y := v.Args[1]
2386                         v.Op = OpAMD64SETAE
2387                         v.AuxInt = 0
2388                         v.Aux = nil
2389                         v.resetArgs()
2390                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
2391                         v0.AddArg(x)
2392                         v0.AddArg(y)
2393                         v0.Type = TypeFlags
2394                         v.AddArg(v0)
2395                         return true
2396                 }
2397                 goto enda617119faaccc0f0c2d23548116cf331
2398         enda617119faaccc0f0c2d23548116cf331:
2399                 ;
2400         case OpGetClosurePtr:
2401                 // match: (GetClosurePtr)
2402                 // cond:
2403                 // result: (LoweredGetClosurePtr)
2404                 {
2405                         v.Op = OpAMD64LoweredGetClosurePtr
2406                         v.AuxInt = 0
2407                         v.Aux = nil
2408                         v.resetArgs()
2409                         return true
2410                 }
2411                 goto end6fd0b53f0acb4d35e7d7fa78d2ca1392
2412         end6fd0b53f0acb4d35e7d7fa78d2ca1392:
2413                 ;
2414         case OpGetG:
2415                 // match: (GetG mem)
2416                 // cond:
2417                 // result: (LoweredGetG mem)
2418                 {
2419                         mem := v.Args[0]
2420                         v.Op = OpAMD64LoweredGetG
2421                         v.AuxInt = 0
2422                         v.Aux = nil
2423                         v.resetArgs()
2424                         v.AddArg(mem)
2425                         return true
2426                 }
2427                 goto endf543eaaf68c4bef1d4cdc8ba19683723
2428         endf543eaaf68c4bef1d4cdc8ba19683723:
2429                 ;
2430         case OpGoCall:
2431                 // match: (GoCall [argwid] mem)
2432                 // cond:
2433                 // result: (CALLgo [argwid] mem)
2434                 {
2435                         argwid := v.AuxInt
2436                         mem := v.Args[0]
2437                         v.Op = OpAMD64CALLgo
2438                         v.AuxInt = 0
2439                         v.Aux = nil
2440                         v.resetArgs()
2441                         v.AuxInt = argwid
2442                         v.AddArg(mem)
2443                         return true
2444                 }
2445                 goto end1cef0f92c46e6aaa2c7abdf5f2794baf
2446         end1cef0f92c46e6aaa2c7abdf5f2794baf:
2447                 ;
2448         case OpGreater16:
2449                 // match: (Greater16 x y)
2450                 // cond:
2451                 // result: (SETG (CMPW x y))
2452                 {
2453                         x := v.Args[0]
2454                         y := v.Args[1]
2455                         v.Op = OpAMD64SETG
2456                         v.AuxInt = 0
2457                         v.Aux = nil
2458                         v.resetArgs()
2459                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2460                         v0.AddArg(x)
2461                         v0.AddArg(y)
2462                         v0.Type = TypeFlags
2463                         v.AddArg(v0)
2464                         return true
2465                 }
2466                 goto end4e4a1307c61240af9a86d8fe4f834ee8
2467         end4e4a1307c61240af9a86d8fe4f834ee8:
2468                 ;
2469         case OpGreater16U:
2470                 // match: (Greater16U x y)
2471                 // cond:
2472                 // result: (SETA (CMPW x y))
2473                 {
2474                         x := v.Args[0]
2475                         y := v.Args[1]
2476                         v.Op = OpAMD64SETA
2477                         v.AuxInt = 0
2478                         v.Aux = nil
2479                         v.resetArgs()
2480                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2481                         v0.AddArg(x)
2482                         v0.AddArg(y)
2483                         v0.Type = TypeFlags
2484                         v.AddArg(v0)
2485                         return true
2486                 }
2487                 goto end7c66c75f4b8ec1db593f3e60cfba9592
2488         end7c66c75f4b8ec1db593f3e60cfba9592:
2489                 ;
2490         case OpGreater32:
2491                 // match: (Greater32 x y)
2492                 // cond:
2493                 // result: (SETG (CMPL x y))
2494                 {
2495                         x := v.Args[0]
2496                         y := v.Args[1]
2497                         v.Op = OpAMD64SETG
2498                         v.AuxInt = 0
2499                         v.Aux = nil
2500                         v.resetArgs()
2501                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2502                         v0.AddArg(x)
2503                         v0.AddArg(y)
2504                         v0.Type = TypeFlags
2505                         v.AddArg(v0)
2506                         return true
2507                 }
2508                 goto end6fb0eae4a0e0e81b4afb085d398d873b
2509         end6fb0eae4a0e0e81b4afb085d398d873b:
2510                 ;
2511         case OpGreater32F:
2512                 // match: (Greater32F x y)
2513                 // cond:
2514                 // result: (SETGF (UCOMISS x y))
2515                 {
2516                         x := v.Args[0]
2517                         y := v.Args[1]
2518                         v.Op = OpAMD64SETGF
2519                         v.AuxInt = 0
2520                         v.Aux = nil
2521                         v.resetArgs()
2522                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
2523                         v0.AddArg(x)
2524                         v0.AddArg(y)
2525                         v0.Type = TypeFlags
2526                         v.AddArg(v0)
2527                         return true
2528                 }
2529                 goto end94df0bd5cedad8ce8021df1b24da40c6
2530         end94df0bd5cedad8ce8021df1b24da40c6:
2531                 ;
2532         case OpGreater32U:
2533                 // match: (Greater32U x y)
2534                 // cond:
2535                 // result: (SETA (CMPL x y))
2536                 {
2537                         x := v.Args[0]
2538                         y := v.Args[1]
2539                         v.Op = OpAMD64SETA
2540                         v.AuxInt = 0
2541                         v.Aux = nil
2542                         v.resetArgs()
2543                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2544                         v0.AddArg(x)
2545                         v0.AddArg(y)
2546                         v0.Type = TypeFlags
2547                         v.AddArg(v0)
2548                         return true
2549                 }
2550                 goto end18da022a28eae8bd0771e0c948aadaf8
2551         end18da022a28eae8bd0771e0c948aadaf8:
2552                 ;
2553         case OpGreater64:
2554                 // match: (Greater64 x y)
2555                 // cond:
2556                 // result: (SETG (CMPQ x y))
2557                 {
2558                         x := v.Args[0]
2559                         y := v.Args[1]
2560                         v.Op = OpAMD64SETG
2561                         v.AuxInt = 0
2562                         v.Aux = nil
2563                         v.resetArgs()
2564                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2565                         v0.AddArg(x)
2566                         v0.AddArg(y)
2567                         v0.Type = TypeFlags
2568                         v.AddArg(v0)
2569                         return true
2570                 }
2571                 goto endc025c908708f939780fba0da0c1148b4
2572         endc025c908708f939780fba0da0c1148b4:
2573                 ;
2574         case OpGreater64F:
2575                 // match: (Greater64F x y)
2576                 // cond:
2577                 // result: (SETGF (UCOMISD x y))
2578                 {
2579                         x := v.Args[0]
2580                         y := v.Args[1]
2581                         v.Op = OpAMD64SETGF
2582                         v.AuxInt = 0
2583                         v.Aux = nil
2584                         v.resetArgs()
2585                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
2586                         v0.AddArg(x)
2587                         v0.AddArg(y)
2588                         v0.Type = TypeFlags
2589                         v.AddArg(v0)
2590                         return true
2591                 }
2592                 goto end033ca5181b18376e7215c02812ef5a6b
2593         end033ca5181b18376e7215c02812ef5a6b:
2594                 ;
2595         case OpGreater64U:
2596                 // match: (Greater64U x y)
2597                 // cond:
2598                 // result: (SETA (CMPQ x y))
2599                 {
2600                         x := v.Args[0]
2601                         y := v.Args[1]
2602                         v.Op = OpAMD64SETA
2603                         v.AuxInt = 0
2604                         v.Aux = nil
2605                         v.resetArgs()
2606                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2607                         v0.AddArg(x)
2608                         v0.AddArg(y)
2609                         v0.Type = TypeFlags
2610                         v.AddArg(v0)
2611                         return true
2612                 }
2613                 goto endb3e25347041760a04d3fc8321c3f3d00
2614         endb3e25347041760a04d3fc8321c3f3d00:
2615                 ;
2616         case OpGreater8:
2617                 // match: (Greater8  x y)
2618                 // cond:
2619                 // result: (SETG (CMPB x y))
2620                 {
2621                         x := v.Args[0]
2622                         y := v.Args[1]
2623                         v.Op = OpAMD64SETG
2624                         v.AuxInt = 0
2625                         v.Aux = nil
2626                         v.resetArgs()
2627                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
2628                         v0.AddArg(x)
2629                         v0.AddArg(y)
2630                         v0.Type = TypeFlags
2631                         v.AddArg(v0)
2632                         return true
2633                 }
2634                 goto enda3eeb5da2e69cb54a1515601d4b360d4
2635         enda3eeb5da2e69cb54a1515601d4b360d4:
2636                 ;
2637         case OpGreater8U:
2638                 // match: (Greater8U  x y)
2639                 // cond:
2640                 // result: (SETA (CMPB x y))
2641                 {
2642                         x := v.Args[0]
2643                         y := v.Args[1]
2644                         v.Op = OpAMD64SETA
2645                         v.AuxInt = 0
2646                         v.Aux = nil
2647                         v.resetArgs()
2648                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
2649                         v0.AddArg(x)
2650                         v0.AddArg(y)
2651                         v0.Type = TypeFlags
2652                         v.AddArg(v0)
2653                         return true
2654                 }
2655                 goto endd2027f3b6471262f42b90c8cc0413667
2656         endd2027f3b6471262f42b90c8cc0413667:
2657                 ;
2658         case OpHmul16:
2659                 // match: (Hmul16 x y)
2660                 // cond:
2661                 // result: (HMULW x y)
2662                 {
2663                         x := v.Args[0]
2664                         y := v.Args[1]
2665                         v.Op = OpAMD64HMULW
2666                         v.AuxInt = 0
2667                         v.Aux = nil
2668                         v.resetArgs()
2669                         v.AddArg(x)
2670                         v.AddArg(y)
2671                         return true
2672                 }
2673                 goto end1b9ff394bb3b06fc109637656b6875f5
2674         end1b9ff394bb3b06fc109637656b6875f5:
2675                 ;
2676         case OpHmul16u:
2677                 // match: (Hmul16u x y)
2678                 // cond:
2679                 // result: (HMULWU x y)
2680                 {
2681                         x := v.Args[0]
2682                         y := v.Args[1]
2683                         v.Op = OpAMD64HMULWU
2684                         v.AuxInt = 0
2685                         v.Aux = nil
2686                         v.resetArgs()
2687                         v.AddArg(x)
2688                         v.AddArg(y)
2689                         return true
2690                 }
2691                 goto endee9089e794a43f2ce1619a6ef61670f4
2692         endee9089e794a43f2ce1619a6ef61670f4:
2693                 ;
2694         case OpHmul32:
2695                 // match: (Hmul32 x y)
2696                 // cond:
2697                 // result: (HMULL x y)
2698                 {
2699                         x := v.Args[0]
2700                         y := v.Args[1]
2701                         v.Op = OpAMD64HMULL
2702                         v.AuxInt = 0
2703                         v.Aux = nil
2704                         v.resetArgs()
2705                         v.AddArg(x)
2706                         v.AddArg(y)
2707                         return true
2708                 }
2709                 goto end7c83c91ef2634f0b1da4f49350b437b1
2710         end7c83c91ef2634f0b1da4f49350b437b1:
2711                 ;
2712         case OpHmul32u:
2713                 // match: (Hmul32u x y)
2714                 // cond:
2715                 // result: (HMULLU x y)
2716                 {
2717                         x := v.Args[0]
2718                         y := v.Args[1]
2719                         v.Op = OpAMD64HMULLU
2720                         v.AuxInt = 0
2721                         v.Aux = nil
2722                         v.resetArgs()
2723                         v.AddArg(x)
2724                         v.AddArg(y)
2725                         return true
2726                 }
2727                 goto end3c4f36611dc8815aa2a63d4ec0eaa06d
2728         end3c4f36611dc8815aa2a63d4ec0eaa06d:
2729                 ;
2730         case OpHmul8:
2731                 // match: (Hmul8 x y)
2732                 // cond:
2733                 // result: (HMULB x y)
2734                 {
2735                         x := v.Args[0]
2736                         y := v.Args[1]
2737                         v.Op = OpAMD64HMULB
2738                         v.AuxInt = 0
2739                         v.Aux = nil
2740                         v.resetArgs()
2741                         v.AddArg(x)
2742                         v.AddArg(y)
2743                         return true
2744                 }
2745                 goto end51b2cc9f1ed15314e68fc81024f281a7
2746         end51b2cc9f1ed15314e68fc81024f281a7:
2747                 ;
2748         case OpHmul8u:
2749                 // match: (Hmul8u x y)
2750                 // cond:
2751                 // result: (HMULBU x y)
2752                 {
2753                         x := v.Args[0]
2754                         y := v.Args[1]
2755                         v.Op = OpAMD64HMULBU
2756                         v.AuxInt = 0
2757                         v.Aux = nil
2758                         v.resetArgs()
2759                         v.AddArg(x)
2760                         v.AddArg(y)
2761                         return true
2762                 }
2763                 goto ende68d7b3a3c774cedc3522af9d635c39d
2764         ende68d7b3a3c774cedc3522af9d635c39d:
2765                 ;
2766         case OpITab:
2767                 // match: (ITab (Load ptr mem))
2768                 // cond:
2769                 // result: (MOVQload ptr mem)
2770                 {
2771                         if v.Args[0].Op != OpLoad {
2772                                 goto enda49fcae3630a097c78aa58189c90a97a
2773                         }
2774                         ptr := v.Args[0].Args[0]
2775                         mem := v.Args[0].Args[1]
2776                         v.Op = OpAMD64MOVQload
2777                         v.AuxInt = 0
2778                         v.Aux = nil
2779                         v.resetArgs()
2780                         v.AddArg(ptr)
2781                         v.AddArg(mem)
2782                         return true
2783                 }
2784                 goto enda49fcae3630a097c78aa58189c90a97a
2785         enda49fcae3630a097c78aa58189c90a97a:
2786                 ;
2787         case OpInterCall:
2788                 // match: (InterCall [argwid] entry mem)
2789                 // cond:
2790                 // result: (CALLinter [argwid] entry mem)
2791                 {
2792                         argwid := v.AuxInt
2793                         entry := v.Args[0]
2794                         mem := v.Args[1]
2795                         v.Op = OpAMD64CALLinter
2796                         v.AuxInt = 0
2797                         v.Aux = nil
2798                         v.resetArgs()
2799                         v.AuxInt = argwid
2800                         v.AddArg(entry)
2801                         v.AddArg(mem)
2802                         return true
2803                 }
2804                 goto endc04351e492ed362efc6aa75121bca305
2805         endc04351e492ed362efc6aa75121bca305:
2806                 ;
2807         case OpIsInBounds:
2808                 // match: (IsInBounds idx len)
2809                 // cond:
2810                 // result: (SETB (CMPQ idx len))
2811                 {
2812                         idx := v.Args[0]
2813                         len := v.Args[1]
2814                         v.Op = OpAMD64SETB
2815                         v.AuxInt = 0
2816                         v.Aux = nil
2817                         v.resetArgs()
2818                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2819                         v0.AddArg(idx)
2820                         v0.AddArg(len)
2821                         v0.Type = TypeFlags
2822                         v.AddArg(v0)
2823                         return true
2824                 }
2825                 goto endfff988d5f1912886d73be3bb563c37d9
2826         endfff988d5f1912886d73be3bb563c37d9:
2827                 ;
2828         case OpIsNonNil:
2829                 // match: (IsNonNil p)
2830                 // cond:
2831                 // result: (SETNE (TESTQ p p))
2832                 {
2833                         p := v.Args[0]
2834                         v.Op = OpAMD64SETNE
2835                         v.AuxInt = 0
2836                         v.Aux = nil
2837                         v.resetArgs()
2838                         v0 := b.NewValue0(v.Line, OpAMD64TESTQ, TypeInvalid)
2839                         v0.AddArg(p)
2840                         v0.AddArg(p)
2841                         v0.Type = TypeFlags
2842                         v.AddArg(v0)
2843                         return true
2844                 }
2845                 goto end0af5ec868ede9ea73fb0602d54b863e9
2846         end0af5ec868ede9ea73fb0602d54b863e9:
2847                 ;
2848         case OpIsSliceInBounds:
2849                 // match: (IsSliceInBounds idx len)
2850                 // cond:
2851                 // result: (SETBE (CMPQ idx len))
2852                 {
2853                         idx := v.Args[0]
2854                         len := v.Args[1]
2855                         v.Op = OpAMD64SETBE
2856                         v.AuxInt = 0
2857                         v.Aux = nil
2858                         v.resetArgs()
2859                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2860                         v0.AddArg(idx)
2861                         v0.AddArg(len)
2862                         v0.Type = TypeFlags
2863                         v.AddArg(v0)
2864                         return true
2865                 }
2866                 goto end02799ad95fe7fb5ce3c2c8ab313b737c
2867         end02799ad95fe7fb5ce3c2c8ab313b737c:
2868                 ;
2869         case OpLeq16:
2870                 // match: (Leq16 x y)
2871                 // cond:
2872                 // result: (SETLE (CMPW x y))
2873                 {
2874                         x := v.Args[0]
2875                         y := v.Args[1]
2876                         v.Op = OpAMD64SETLE
2877                         v.AuxInt = 0
2878                         v.Aux = nil
2879                         v.resetArgs()
2880                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2881                         v0.AddArg(x)
2882                         v0.AddArg(y)
2883                         v0.Type = TypeFlags
2884                         v.AddArg(v0)
2885                         return true
2886                 }
2887                 goto end586c647ca6bb8ec725eea917c743d1ea
2888         end586c647ca6bb8ec725eea917c743d1ea:
2889                 ;
2890         case OpLeq16U:
2891                 // match: (Leq16U x y)
2892                 // cond:
2893                 // result: (SETBE (CMPW x y))
2894                 {
2895                         x := v.Args[0]
2896                         y := v.Args[1]
2897                         v.Op = OpAMD64SETBE
2898                         v.AuxInt = 0
2899                         v.Aux = nil
2900                         v.resetArgs()
2901                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
2902                         v0.AddArg(x)
2903                         v0.AddArg(y)
2904                         v0.Type = TypeFlags
2905                         v.AddArg(v0)
2906                         return true
2907                 }
2908                 goto end9c24a81bc6a4a92267bd6638362dfbfc
2909         end9c24a81bc6a4a92267bd6638362dfbfc:
2910                 ;
2911         case OpLeq32:
2912                 // match: (Leq32 x y)
2913                 // cond:
2914                 // result: (SETLE (CMPL x y))
2915                 {
2916                         x := v.Args[0]
2917                         y := v.Args[1]
2918                         v.Op = OpAMD64SETLE
2919                         v.AuxInt = 0
2920                         v.Aux = nil
2921                         v.resetArgs()
2922                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2923                         v0.AddArg(x)
2924                         v0.AddArg(y)
2925                         v0.Type = TypeFlags
2926                         v.AddArg(v0)
2927                         return true
2928                 }
2929                 goto end595ee99a9fc3460b2748b9129b139f88
2930         end595ee99a9fc3460b2748b9129b139f88:
2931                 ;
2932         case OpLeq32F:
2933                 // match: (Leq32F x y)
2934                 // cond:
2935                 // result: (SETGEF (UCOMISS y x))
2936                 {
2937                         x := v.Args[0]
2938                         y := v.Args[1]
2939                         v.Op = OpAMD64SETGEF
2940                         v.AuxInt = 0
2941                         v.Aux = nil
2942                         v.resetArgs()
2943                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
2944                         v0.AddArg(y)
2945                         v0.AddArg(x)
2946                         v0.Type = TypeFlags
2947                         v.AddArg(v0)
2948                         return true
2949                 }
2950                 goto endfee4b989a80cc43328b24f7017e80a17
2951         endfee4b989a80cc43328b24f7017e80a17:
2952                 ;
2953         case OpLeq32U:
2954                 // match: (Leq32U x y)
2955                 // cond:
2956                 // result: (SETBE (CMPL x y))
2957                 {
2958                         x := v.Args[0]
2959                         y := v.Args[1]
2960                         v.Op = OpAMD64SETBE
2961                         v.AuxInt = 0
2962                         v.Aux = nil
2963                         v.resetArgs()
2964                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
2965                         v0.AddArg(x)
2966                         v0.AddArg(y)
2967                         v0.Type = TypeFlags
2968                         v.AddArg(v0)
2969                         return true
2970                 }
2971                 goto end1a59850aad6cb17c295d0dc359013420
2972         end1a59850aad6cb17c295d0dc359013420:
2973                 ;
2974         case OpLeq64:
2975                 // match: (Leq64 x y)
2976                 // cond:
2977                 // result: (SETLE (CMPQ x y))
2978                 {
2979                         x := v.Args[0]
2980                         y := v.Args[1]
2981                         v.Op = OpAMD64SETLE
2982                         v.AuxInt = 0
2983                         v.Aux = nil
2984                         v.resetArgs()
2985                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
2986                         v0.AddArg(x)
2987                         v0.AddArg(y)
2988                         v0.Type = TypeFlags
2989                         v.AddArg(v0)
2990                         return true
2991                 }
2992                 goto end406def83fcbf29cd8fa306170b512de2
2993         end406def83fcbf29cd8fa306170b512de2:
2994                 ;
2995         case OpLeq64F:
2996                 // match: (Leq64F x y)
2997                 // cond:
2998                 // result: (SETGEF (UCOMISD y x))
2999                 {
3000                         x := v.Args[0]
3001                         y := v.Args[1]
3002                         v.Op = OpAMD64SETGEF
3003                         v.AuxInt = 0
3004                         v.Aux = nil
3005                         v.resetArgs()
3006                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
3007                         v0.AddArg(y)
3008                         v0.AddArg(x)
3009                         v0.Type = TypeFlags
3010                         v.AddArg(v0)
3011                         return true
3012                 }
3013                 goto end6e3de6d4b5668f673e3822d5947edbd0
3014         end6e3de6d4b5668f673e3822d5947edbd0:
3015                 ;
3016         case OpLeq64U:
3017                 // match: (Leq64U x y)
3018                 // cond:
3019                 // result: (SETBE (CMPQ x y))
3020                 {
3021                         x := v.Args[0]
3022                         y := v.Args[1]
3023                         v.Op = OpAMD64SETBE
3024                         v.AuxInt = 0
3025                         v.Aux = nil
3026                         v.resetArgs()
3027                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
3028                         v0.AddArg(x)
3029                         v0.AddArg(y)
3030                         v0.Type = TypeFlags
3031                         v.AddArg(v0)
3032                         return true
3033                 }
3034                 goto end52f23c145b80639c8d60420ad4057bc7
3035         end52f23c145b80639c8d60420ad4057bc7:
3036                 ;
3037         case OpLeq8:
3038                 // match: (Leq8  x y)
3039                 // cond:
3040                 // result: (SETLE (CMPB x y))
3041                 {
3042                         x := v.Args[0]
3043                         y := v.Args[1]
3044                         v.Op = OpAMD64SETLE
3045                         v.AuxInt = 0
3046                         v.Aux = nil
3047                         v.resetArgs()
3048                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
3049                         v0.AddArg(x)
3050                         v0.AddArg(y)
3051                         v0.Type = TypeFlags
3052                         v.AddArg(v0)
3053                         return true
3054                 }
3055                 goto end72ecba6f2a7062cb266923dfec811f79
3056         end72ecba6f2a7062cb266923dfec811f79:
3057                 ;
3058         case OpLeq8U:
3059                 // match: (Leq8U  x y)
3060                 // cond:
3061                 // result: (SETBE (CMPB x y))
3062                 {
3063                         x := v.Args[0]
3064                         y := v.Args[1]
3065                         v.Op = OpAMD64SETBE
3066                         v.AuxInt = 0
3067                         v.Aux = nil
3068                         v.resetArgs()
3069                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
3070                         v0.AddArg(x)
3071                         v0.AddArg(y)
3072                         v0.Type = TypeFlags
3073                         v.AddArg(v0)
3074                         return true
3075                 }
3076                 goto endb043b338cced4f15400d8d6e584ebea7
3077         endb043b338cced4f15400d8d6e584ebea7:
3078                 ;
3079         case OpLess16:
3080                 // match: (Less16 x y)
3081                 // cond:
3082                 // result: (SETL (CMPW x y))
3083                 {
3084                         x := v.Args[0]
3085                         y := v.Args[1]
3086                         v.Op = OpAMD64SETL
3087                         v.AuxInt = 0
3088                         v.Aux = nil
3089                         v.resetArgs()
3090                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
3091                         v0.AddArg(x)
3092                         v0.AddArg(y)
3093                         v0.Type = TypeFlags
3094                         v.AddArg(v0)
3095                         return true
3096                 }
3097                 goto end2f6c6ba80eda8d68e77a58cba13d3f16
3098         end2f6c6ba80eda8d68e77a58cba13d3f16:
3099                 ;
3100         case OpLess16U:
3101                 // match: (Less16U x y)
3102                 // cond:
3103                 // result: (SETB (CMPW x y))
3104                 {
3105                         x := v.Args[0]
3106                         y := v.Args[1]
3107                         v.Op = OpAMD64SETB
3108                         v.AuxInt = 0
3109                         v.Aux = nil
3110                         v.resetArgs()
3111                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
3112                         v0.AddArg(x)
3113                         v0.AddArg(y)
3114                         v0.Type = TypeFlags
3115                         v.AddArg(v0)
3116                         return true
3117                 }
3118                 goto end9f65eefe7b83a3c436b5c16664c93703
3119         end9f65eefe7b83a3c436b5c16664c93703:
3120                 ;
3121         case OpLess32:
3122                 // match: (Less32 x y)
3123                 // cond:
3124                 // result: (SETL (CMPL x y))
3125                 {
3126                         x := v.Args[0]
3127                         y := v.Args[1]
3128                         v.Op = OpAMD64SETL
3129                         v.AuxInt = 0
3130                         v.Aux = nil
3131                         v.resetArgs()
3132                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
3133                         v0.AddArg(x)
3134                         v0.AddArg(y)
3135                         v0.Type = TypeFlags
3136                         v.AddArg(v0)
3137                         return true
3138                 }
3139                 goto end6632ff4ee994eb5b14cdf60c99ac3798
3140         end6632ff4ee994eb5b14cdf60c99ac3798:
3141                 ;
3142         case OpLess32F:
3143                 // match: (Less32F x y)
3144                 // cond:
3145                 // result: (SETGF (UCOMISS y x))
3146                 {
3147                         x := v.Args[0]
3148                         y := v.Args[1]
3149                         v.Op = OpAMD64SETGF
3150                         v.AuxInt = 0
3151                         v.Aux = nil
3152                         v.resetArgs()
3153                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
3154                         v0.AddArg(y)
3155                         v0.AddArg(x)
3156                         v0.Type = TypeFlags
3157                         v.AddArg(v0)
3158                         return true
3159                 }
3160                 goto end5b3b0c96a7fc2ede81bc89c9abaac9d0
3161         end5b3b0c96a7fc2ede81bc89c9abaac9d0:
3162                 ;
3163         case OpLess32U:
3164                 // match: (Less32U x y)
3165                 // cond:
3166                 // result: (SETB (CMPL x y))
3167                 {
3168                         x := v.Args[0]
3169                         y := v.Args[1]
3170                         v.Op = OpAMD64SETB
3171                         v.AuxInt = 0
3172                         v.Aux = nil
3173                         v.resetArgs()
3174                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
3175                         v0.AddArg(x)
3176                         v0.AddArg(y)
3177                         v0.Type = TypeFlags
3178                         v.AddArg(v0)
3179                         return true
3180                 }
3181                 goto end39e5a513c7fb0a42817a6cf9c6143b60
3182         end39e5a513c7fb0a42817a6cf9c6143b60:
3183                 ;
3184         case OpLess64:
3185                 // match: (Less64 x y)
3186                 // cond:
3187                 // result: (SETL (CMPQ x y))
3188                 {
3189                         x := v.Args[0]
3190                         y := v.Args[1]
3191                         v.Op = OpAMD64SETL
3192                         v.AuxInt = 0
3193                         v.Aux = nil
3194                         v.resetArgs()
3195                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
3196                         v0.AddArg(x)
3197                         v0.AddArg(y)
3198                         v0.Type = TypeFlags
3199                         v.AddArg(v0)
3200                         return true
3201                 }
3202                 goto enddce827d3e922e8487b61a88c2b1510f2
3203         enddce827d3e922e8487b61a88c2b1510f2:
3204                 ;
3205         case OpLess64F:
3206                 // match: (Less64F x y)
3207                 // cond:
3208                 // result: (SETGF (UCOMISD y x))
3209                 {
3210                         x := v.Args[0]
3211                         y := v.Args[1]
3212                         v.Op = OpAMD64SETGF
3213                         v.AuxInt = 0
3214                         v.Aux = nil
3215                         v.resetArgs()
3216                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
3217                         v0.AddArg(y)
3218                         v0.AddArg(x)
3219                         v0.Type = TypeFlags
3220                         v.AddArg(v0)
3221                         return true
3222                 }
3223                 goto endf2be3d2dcb6543d2159e7fff5ccbbb55
3224         endf2be3d2dcb6543d2159e7fff5ccbbb55:
3225                 ;
3226         case OpLess64U:
3227                 // match: (Less64U x y)
3228                 // cond:
3229                 // result: (SETB (CMPQ x y))
3230                 {
3231                         x := v.Args[0]
3232                         y := v.Args[1]
3233                         v.Op = OpAMD64SETB
3234                         v.AuxInt = 0
3235                         v.Aux = nil
3236                         v.resetArgs()
3237                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
3238                         v0.AddArg(x)
3239                         v0.AddArg(y)
3240                         v0.Type = TypeFlags
3241                         v.AddArg(v0)
3242                         return true
3243                 }
3244                 goto endb76d7768f175a44baf6d63d12ab6e81d
3245         endb76d7768f175a44baf6d63d12ab6e81d:
3246                 ;
3247         case OpLess8:
3248                 // match: (Less8  x y)
3249                 // cond:
3250                 // result: (SETL (CMPB x y))
3251                 {
3252                         x := v.Args[0]
3253                         y := v.Args[1]
3254                         v.Op = OpAMD64SETL
3255                         v.AuxInt = 0
3256                         v.Aux = nil
3257                         v.resetArgs()
3258                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
3259                         v0.AddArg(x)
3260                         v0.AddArg(y)
3261                         v0.Type = TypeFlags
3262                         v.AddArg(v0)
3263                         return true
3264                 }
3265                 goto end314fbffe99f3bd4b07857a80c0b914cd
3266         end314fbffe99f3bd4b07857a80c0b914cd:
3267                 ;
3268         case OpLess8U:
3269                 // match: (Less8U  x y)
3270                 // cond:
3271                 // result: (SETB (CMPB x y))
3272                 {
3273                         x := v.Args[0]
3274                         y := v.Args[1]
3275                         v.Op = OpAMD64SETB
3276                         v.AuxInt = 0
3277                         v.Aux = nil
3278                         v.resetArgs()
3279                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
3280                         v0.AddArg(x)
3281                         v0.AddArg(y)
3282                         v0.Type = TypeFlags
3283                         v.AddArg(v0)
3284                         return true
3285                 }
3286                 goto endadccc5d80fd053a33004ed0759f64d93
3287         endadccc5d80fd053a33004ed0759f64d93:
3288                 ;
3289         case OpLoad:
3290                 // match: (Load <t> ptr mem)
3291                 // cond: (is64BitInt(t) || isPtr(t))
3292                 // result: (MOVQload ptr mem)
3293                 {
3294                         t := v.Type
3295                         ptr := v.Args[0]
3296                         mem := v.Args[1]
3297                         if !(is64BitInt(t) || isPtr(t)) {
3298                                 goto end7c4c53acf57ebc5f03273652ba1d5934
3299                         }
3300                         v.Op = OpAMD64MOVQload
3301                         v.AuxInt = 0
3302                         v.Aux = nil
3303                         v.resetArgs()
3304                         v.AddArg(ptr)
3305                         v.AddArg(mem)
3306                         return true
3307                 }
3308                 goto end7c4c53acf57ebc5f03273652ba1d5934
3309         end7c4c53acf57ebc5f03273652ba1d5934:
3310                 ;
3311                 // match: (Load <t> ptr mem)
3312                 // cond: is32BitInt(t)
3313                 // result: (MOVLload ptr mem)
3314                 {
3315                         t := v.Type
3316                         ptr := v.Args[0]
3317                         mem := v.Args[1]
3318                         if !(is32BitInt(t)) {
3319                                 goto ende1cfcb15bfbcfd448ce303d0882a4057
3320                         }
3321                         v.Op = OpAMD64MOVLload
3322                         v.AuxInt = 0
3323                         v.Aux = nil
3324                         v.resetArgs()
3325                         v.AddArg(ptr)
3326                         v.AddArg(mem)
3327                         return true
3328                 }
3329                 goto ende1cfcb15bfbcfd448ce303d0882a4057
3330         ende1cfcb15bfbcfd448ce303d0882a4057:
3331                 ;
3332                 // match: (Load <t> ptr mem)
3333                 // cond: is16BitInt(t)
3334                 // result: (MOVWload ptr mem)
3335                 {
3336                         t := v.Type
3337                         ptr := v.Args[0]
3338                         mem := v.Args[1]
3339                         if !(is16BitInt(t)) {
3340                                 goto end2d0a1304501ed9f4e9e2d288505a9c7c
3341                         }
3342                         v.Op = OpAMD64MOVWload
3343                         v.AuxInt = 0
3344                         v.Aux = nil
3345                         v.resetArgs()
3346                         v.AddArg(ptr)
3347                         v.AddArg(mem)
3348                         return true
3349                 }
3350                 goto end2d0a1304501ed9f4e9e2d288505a9c7c
3351         end2d0a1304501ed9f4e9e2d288505a9c7c:
3352                 ;
3353                 // match: (Load <t> ptr mem)
3354                 // cond: (t.IsBoolean() || is8BitInt(t))
3355                 // result: (MOVBload ptr mem)
3356                 {
3357                         t := v.Type
3358                         ptr := v.Args[0]
3359                         mem := v.Args[1]
3360                         if !(t.IsBoolean() || is8BitInt(t)) {
3361                                 goto end8f83bf72293670e75b22d6627bd13f0b
3362                         }
3363                         v.Op = OpAMD64MOVBload
3364                         v.AuxInt = 0
3365                         v.Aux = nil
3366                         v.resetArgs()
3367                         v.AddArg(ptr)
3368                         v.AddArg(mem)
3369                         return true
3370                 }
3371                 goto end8f83bf72293670e75b22d6627bd13f0b
3372         end8f83bf72293670e75b22d6627bd13f0b:
3373                 ;
3374                 // match: (Load <t> ptr mem)
3375                 // cond: is32BitFloat(t)
3376                 // result: (MOVSSload ptr mem)
3377                 {
3378                         t := v.Type
3379                         ptr := v.Args[0]
3380                         mem := v.Args[1]
3381                         if !(is32BitFloat(t)) {
3382                                 goto end63383c4895805881aabceebea3c4c533
3383                         }
3384                         v.Op = OpAMD64MOVSSload
3385                         v.AuxInt = 0
3386                         v.Aux = nil
3387                         v.resetArgs()
3388                         v.AddArg(ptr)
3389                         v.AddArg(mem)
3390                         return true
3391                 }
3392                 goto end63383c4895805881aabceebea3c4c533
3393         end63383c4895805881aabceebea3c4c533:
3394                 ;
3395                 // match: (Load <t> ptr mem)
3396                 // cond: is64BitFloat(t)
3397                 // result: (MOVSDload ptr mem)
3398                 {
3399                         t := v.Type
3400                         ptr := v.Args[0]
3401                         mem := v.Args[1]
3402                         if !(is64BitFloat(t)) {
3403                                 goto end99d0858c0a5bb72f0fe4decc748da812
3404                         }
3405                         v.Op = OpAMD64MOVSDload
3406                         v.AuxInt = 0
3407                         v.Aux = nil
3408                         v.resetArgs()
3409                         v.AddArg(ptr)
3410                         v.AddArg(mem)
3411                         return true
3412                 }
3413                 goto end99d0858c0a5bb72f0fe4decc748da812
3414         end99d0858c0a5bb72f0fe4decc748da812:
3415                 ;
3416         case OpLrot16:
3417                 // match: (Lrot16 <t> x [c])
3418                 // cond:
3419                 // result: (ROLWconst <t> [c&15] x)
3420                 {
3421                         t := v.Type
3422                         x := v.Args[0]
3423                         c := v.AuxInt
3424                         v.Op = OpAMD64ROLWconst
3425                         v.AuxInt = 0
3426                         v.Aux = nil
3427                         v.resetArgs()
3428                         v.Type = t
3429                         v.AuxInt = c & 15
3430                         v.AddArg(x)
3431                         return true
3432                 }
3433                 goto endb23dfa24c619d0068f925899d53ee7fd
3434         endb23dfa24c619d0068f925899d53ee7fd:
3435                 ;
3436         case OpLrot32:
3437                 // match: (Lrot32 <t> x [c])
3438                 // cond:
3439                 // result: (ROLLconst <t> [c&31] x)
3440                 {
3441                         t := v.Type
3442                         x := v.Args[0]
3443                         c := v.AuxInt
3444                         v.Op = OpAMD64ROLLconst
3445                         v.AuxInt = 0
3446                         v.Aux = nil
3447                         v.resetArgs()
3448                         v.Type = t
3449                         v.AuxInt = c & 31
3450                         v.AddArg(x)
3451                         return true
3452                 }
3453                 goto end38b2215c011896c36845f72ecb72b1b0
3454         end38b2215c011896c36845f72ecb72b1b0:
3455                 ;
3456         case OpLrot64:
3457                 // match: (Lrot64 <t> x [c])
3458                 // cond:
3459                 // result: (ROLQconst <t> [c&63] x)
3460                 {
3461                         t := v.Type
3462                         x := v.Args[0]
3463                         c := v.AuxInt
3464                         v.Op = OpAMD64ROLQconst
3465                         v.AuxInt = 0
3466                         v.Aux = nil
3467                         v.resetArgs()
3468                         v.Type = t
3469                         v.AuxInt = c & 63
3470                         v.AddArg(x)
3471                         return true
3472                 }
3473                 goto end5cb355e4f3ca387f252ef4f6a55f9f68
3474         end5cb355e4f3ca387f252ef4f6a55f9f68:
3475                 ;
3476         case OpLrot8:
3477                 // match: (Lrot8 <t> x [c])
3478                 // cond:
3479                 // result: (ROLBconst <t> [c&7] x)
3480                 {
3481                         t := v.Type
3482                         x := v.Args[0]
3483                         c := v.AuxInt
3484                         v.Op = OpAMD64ROLBconst
3485                         v.AuxInt = 0
3486                         v.Aux = nil
3487                         v.resetArgs()
3488                         v.Type = t
3489                         v.AuxInt = c & 7
3490                         v.AddArg(x)
3491                         return true
3492                 }
3493                 goto end26bfb3dd5b537cf13ac9f2978d94ed71
3494         end26bfb3dd5b537cf13ac9f2978d94ed71:
3495                 ;
3496         case OpLsh16x16:
3497                 // match: (Lsh16x16 <t> x y)
3498                 // cond:
3499                 // result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPWconst [16] y)))
3500                 {
3501                         t := v.Type
3502                         x := v.Args[0]
3503                         y := v.Args[1]
3504                         v.Op = OpAMD64ANDW
3505                         v.AuxInt = 0
3506                         v.Aux = nil
3507                         v.resetArgs()
3508                         v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
3509                         v0.Type = t
3510                         v0.AddArg(x)
3511                         v0.AddArg(y)
3512                         v.AddArg(v0)
3513                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3514                         v1.Type = t
3515                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
3516                         v2.AuxInt = 16
3517                         v2.AddArg(y)
3518                         v2.Type = TypeFlags
3519                         v1.AddArg(v2)
3520                         v.AddArg(v1)
3521                         return true
3522                 }
3523                 goto end7ffc4f31c526f7fcb2283215b458f589
3524         end7ffc4f31c526f7fcb2283215b458f589:
3525                 ;
3526         case OpLsh16x32:
3527                 // match: (Lsh16x32 <t> x y)
3528                 // cond:
3529                 // result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPLconst [16] y)))
3530                 {
3531                         t := v.Type
3532                         x := v.Args[0]
3533                         y := v.Args[1]
3534                         v.Op = OpAMD64ANDW
3535                         v.AuxInt = 0
3536                         v.Aux = nil
3537                         v.resetArgs()
3538                         v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
3539                         v0.Type = t
3540                         v0.AddArg(x)
3541                         v0.AddArg(y)
3542                         v.AddArg(v0)
3543                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3544                         v1.Type = t
3545                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
3546                         v2.AuxInt = 16
3547                         v2.AddArg(y)
3548                         v2.Type = TypeFlags
3549                         v1.AddArg(v2)
3550                         v.AddArg(v1)
3551                         return true
3552                 }
3553                 goto enddcc0e751d315967423c99518c0cc065e
3554         enddcc0e751d315967423c99518c0cc065e:
3555                 ;
3556         case OpLsh16x64:
3557                 // match: (Lsh16x64 <t> x y)
3558                 // cond:
3559                 // result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPQconst [16] y)))
3560                 {
3561                         t := v.Type
3562                         x := v.Args[0]
3563                         y := v.Args[1]
3564                         v.Op = OpAMD64ANDW
3565                         v.AuxInt = 0
3566                         v.Aux = nil
3567                         v.resetArgs()
3568                         v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
3569                         v0.Type = t
3570                         v0.AddArg(x)
3571                         v0.AddArg(y)
3572                         v.AddArg(v0)
3573                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3574                         v1.Type = t
3575                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
3576                         v2.AuxInt = 16
3577                         v2.AddArg(y)
3578                         v2.Type = TypeFlags
3579                         v1.AddArg(v2)
3580                         v.AddArg(v1)
3581                         return true
3582                 }
3583                 goto endf6368b59d046ca83050cd75fbe8715d2
3584         endf6368b59d046ca83050cd75fbe8715d2:
3585                 ;
3586         case OpLsh16x8:
3587                 // match: (Lsh16x8 <t> x y)
3588                 // cond:
3589                 // result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPBconst [16] y)))
3590                 {
3591                         t := v.Type
3592                         x := v.Args[0]
3593                         y := v.Args[1]
3594                         v.Op = OpAMD64ANDW
3595                         v.AuxInt = 0
3596                         v.Aux = nil
3597                         v.resetArgs()
3598                         v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
3599                         v0.Type = t
3600                         v0.AddArg(x)
3601                         v0.AddArg(y)
3602                         v.AddArg(v0)
3603                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3604                         v1.Type = t
3605                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
3606                         v2.AuxInt = 16
3607                         v2.AddArg(y)
3608                         v2.Type = TypeFlags
3609                         v1.AddArg(v2)
3610                         v.AddArg(v1)
3611                         return true
3612                 }
3613                 goto end8730d944c8fb358001ba2d165755bdc4
3614         end8730d944c8fb358001ba2d165755bdc4:
3615                 ;
3616         case OpLsh32x16:
3617                 // match: (Lsh32x16 <t> x y)
3618                 // cond:
3619                 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst [32] y)))
3620                 {
3621                         t := v.Type
3622                         x := v.Args[0]
3623                         y := v.Args[1]
3624                         v.Op = OpAMD64ANDL
3625                         v.AuxInt = 0
3626                         v.Aux = nil
3627                         v.resetArgs()
3628                         v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
3629                         v0.Type = t
3630                         v0.AddArg(x)
3631                         v0.AddArg(y)
3632                         v.AddArg(v0)
3633                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3634                         v1.Type = t
3635                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
3636                         v2.AuxInt = 32
3637                         v2.AddArg(y)
3638                         v2.Type = TypeFlags
3639                         v1.AddArg(v2)
3640                         v.AddArg(v1)
3641                         return true
3642                 }
3643                 goto end5a43b7e9b0780e62f622bac0a68524d2
3644         end5a43b7e9b0780e62f622bac0a68524d2:
3645                 ;
3646         case OpLsh32x32:
3647                 // match: (Lsh32x32 <t> x y)
3648                 // cond:
3649                 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst [32] y)))
3650                 {
3651                         t := v.Type
3652                         x := v.Args[0]
3653                         y := v.Args[1]
3654                         v.Op = OpAMD64ANDL
3655                         v.AuxInt = 0
3656                         v.Aux = nil
3657                         v.resetArgs()
3658                         v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
3659                         v0.Type = t
3660                         v0.AddArg(x)
3661                         v0.AddArg(y)
3662                         v.AddArg(v0)
3663                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3664                         v1.Type = t
3665                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
3666                         v2.AuxInt = 32
3667                         v2.AddArg(y)
3668                         v2.Type = TypeFlags
3669                         v1.AddArg(v2)
3670                         v.AddArg(v1)
3671                         return true
3672                 }
3673                 goto end9ce0ab6f9095c24ea46ca8fe2d7e5507
3674         end9ce0ab6f9095c24ea46ca8fe2d7e5507:
3675                 ;
3676         case OpLsh32x64:
3677                 // match: (Lsh32x64 <t> x y)
3678                 // cond:
3679                 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPQconst [32] y)))
3680                 {
3681                         t := v.Type
3682                         x := v.Args[0]
3683                         y := v.Args[1]
3684                         v.Op = OpAMD64ANDL
3685                         v.AuxInt = 0
3686                         v.Aux = nil
3687                         v.resetArgs()
3688                         v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
3689                         v0.Type = t
3690                         v0.AddArg(x)
3691                         v0.AddArg(y)
3692                         v.AddArg(v0)
3693                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3694                         v1.Type = t
3695                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
3696                         v2.AuxInt = 32
3697                         v2.AddArg(y)
3698                         v2.Type = TypeFlags
3699                         v1.AddArg(v2)
3700                         v.AddArg(v1)
3701                         return true
3702                 }
3703                 goto end646b5471b709d5ea6c21f49a2815236f
3704         end646b5471b709d5ea6c21f49a2815236f:
3705                 ;
3706         case OpLsh32x8:
3707                 // match: (Lsh32x8 <t> x y)
3708                 // cond:
3709                 // result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst [32] y)))
3710                 {
3711                         t := v.Type
3712                         x := v.Args[0]
3713                         y := v.Args[1]
3714                         v.Op = OpAMD64ANDL
3715                         v.AuxInt = 0
3716                         v.Aux = nil
3717                         v.resetArgs()
3718                         v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
3719                         v0.Type = t
3720                         v0.AddArg(x)
3721                         v0.AddArg(y)
3722                         v.AddArg(v0)
3723                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3724                         v1.Type = t
3725                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
3726                         v2.AuxInt = 32
3727                         v2.AddArg(y)
3728                         v2.Type = TypeFlags
3729                         v1.AddArg(v2)
3730                         v.AddArg(v1)
3731                         return true
3732                 }
3733                 goto end96a677c71370e7c9179125f92cbdfda8
3734         end96a677c71370e7c9179125f92cbdfda8:
3735                 ;
3736         case OpLsh64x16:
3737                 // match: (Lsh64x16 <t> x y)
3738                 // cond:
3739                 // result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPWconst [64] y)))
3740                 {
3741                         t := v.Type
3742                         x := v.Args[0]
3743                         y := v.Args[1]
3744                         v.Op = OpAMD64ANDQ
3745                         v.AuxInt = 0
3746                         v.Aux = nil
3747                         v.resetArgs()
3748                         v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
3749                         v0.Type = t
3750                         v0.AddArg(x)
3751                         v0.AddArg(y)
3752                         v.AddArg(v0)
3753                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
3754                         v1.Type = t
3755                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
3756                         v2.AuxInt = 64
3757                         v2.AddArg(y)
3758                         v2.Type = TypeFlags
3759                         v1.AddArg(v2)
3760                         v.AddArg(v1)
3761                         return true
3762                 }
3763                 goto end5f88f241d68d38954222d81559cd7f9f
3764         end5f88f241d68d38954222d81559cd7f9f:
3765                 ;
3766         case OpLsh64x32:
3767                 // match: (Lsh64x32 <t> x y)
3768                 // cond:
3769                 // result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPLconst [64] y)))
3770                 {
3771                         t := v.Type
3772                         x := v.Args[0]
3773                         y := v.Args[1]
3774                         v.Op = OpAMD64ANDQ
3775                         v.AuxInt = 0
3776                         v.Aux = nil
3777                         v.resetArgs()
3778                         v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
3779                         v0.Type = t
3780                         v0.AddArg(x)
3781                         v0.AddArg(y)
3782                         v.AddArg(v0)
3783                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
3784                         v1.Type = t
3785                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
3786                         v2.AuxInt = 64
3787                         v2.AddArg(y)
3788                         v2.Type = TypeFlags
3789                         v1.AddArg(v2)
3790                         v.AddArg(v1)
3791                         return true
3792                 }
3793                 goto endae1705f03ed3d6f43cd63b53496a910a
3794         endae1705f03ed3d6f43cd63b53496a910a:
3795                 ;
3796         case OpLsh64x64:
3797                 // match: (Lsh64x64 <t> x y)
3798                 // cond:
3799                 // result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPQconst [64] y)))
3800                 {
3801                         t := v.Type
3802                         x := v.Args[0]
3803                         y := v.Args[1]
3804                         v.Op = OpAMD64ANDQ
3805                         v.AuxInt = 0
3806                         v.Aux = nil
3807                         v.resetArgs()
3808                         v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
3809                         v0.Type = t
3810                         v0.AddArg(x)
3811                         v0.AddArg(y)
3812                         v.AddArg(v0)
3813                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
3814                         v1.Type = t
3815                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
3816                         v2.AuxInt = 64
3817                         v2.AddArg(y)
3818                         v2.Type = TypeFlags
3819                         v1.AddArg(v2)
3820                         v.AddArg(v1)
3821                         return true
3822                 }
3823                 goto end1f6f5f510c5c68e4ce4a78643e6d85a1
3824         end1f6f5f510c5c68e4ce4a78643e6d85a1:
3825                 ;
3826         case OpLsh64x8:
3827                 // match: (Lsh64x8 <t> x y)
3828                 // cond:
3829                 // result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPBconst [64] y)))
3830                 {
3831                         t := v.Type
3832                         x := v.Args[0]
3833                         y := v.Args[1]
3834                         v.Op = OpAMD64ANDQ
3835                         v.AuxInt = 0
3836                         v.Aux = nil
3837                         v.resetArgs()
3838                         v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
3839                         v0.Type = t
3840                         v0.AddArg(x)
3841                         v0.AddArg(y)
3842                         v.AddArg(v0)
3843                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
3844                         v1.Type = t
3845                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
3846                         v2.AuxInt = 64
3847                         v2.AddArg(y)
3848                         v2.Type = TypeFlags
3849                         v1.AddArg(v2)
3850                         v.AddArg(v1)
3851                         return true
3852                 }
3853                 goto endd14f5c89e3496b0e425aa1ae366f4b53
3854         endd14f5c89e3496b0e425aa1ae366f4b53:
3855                 ;
3856         case OpLsh8x16:
3857                 // match: (Lsh8x16 <t> x y)
3858                 // cond:
3859                 // result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPWconst [8] y)))
3860                 {
3861                         t := v.Type
3862                         x := v.Args[0]
3863                         y := v.Args[1]
3864                         v.Op = OpAMD64ANDB
3865                         v.AuxInt = 0
3866                         v.Aux = nil
3867                         v.resetArgs()
3868                         v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
3869                         v0.Type = t
3870                         v0.AddArg(x)
3871                         v0.AddArg(y)
3872                         v.AddArg(v0)
3873                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3874                         v1.Type = t
3875                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
3876                         v2.AuxInt = 8
3877                         v2.AddArg(y)
3878                         v2.Type = TypeFlags
3879                         v1.AddArg(v2)
3880                         v.AddArg(v1)
3881                         return true
3882                 }
3883                 goto end0926c3d8b9a0776ba5058946f6e1a4b7
3884         end0926c3d8b9a0776ba5058946f6e1a4b7:
3885                 ;
3886         case OpLsh8x32:
3887                 // match: (Lsh8x32 <t> x y)
3888                 // cond:
3889                 // result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPLconst [8] y)))
3890                 {
3891                         t := v.Type
3892                         x := v.Args[0]
3893                         y := v.Args[1]
3894                         v.Op = OpAMD64ANDB
3895                         v.AuxInt = 0
3896                         v.Aux = nil
3897                         v.resetArgs()
3898                         v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
3899                         v0.Type = t
3900                         v0.AddArg(x)
3901                         v0.AddArg(y)
3902                         v.AddArg(v0)
3903                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3904                         v1.Type = t
3905                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
3906                         v2.AuxInt = 8
3907                         v2.AddArg(y)
3908                         v2.Type = TypeFlags
3909                         v1.AddArg(v2)
3910                         v.AddArg(v1)
3911                         return true
3912                 }
3913                 goto end5987682d77f197ef0fd95251f413535a
3914         end5987682d77f197ef0fd95251f413535a:
3915                 ;
3916         case OpLsh8x64:
3917                 // match: (Lsh8x64 <t> x y)
3918                 // cond:
3919                 // result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPQconst [8] y)))
3920                 {
3921                         t := v.Type
3922                         x := v.Args[0]
3923                         y := v.Args[1]
3924                         v.Op = OpAMD64ANDB
3925                         v.AuxInt = 0
3926                         v.Aux = nil
3927                         v.resetArgs()
3928                         v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
3929                         v0.Type = t
3930                         v0.AddArg(x)
3931                         v0.AddArg(y)
3932                         v.AddArg(v0)
3933                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3934                         v1.Type = t
3935                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
3936                         v2.AuxInt = 8
3937                         v2.AddArg(y)
3938                         v2.Type = TypeFlags
3939                         v1.AddArg(v2)
3940                         v.AddArg(v1)
3941                         return true
3942                 }
3943                 goto end9ffe6731d7d6514b8c0482f1645eee18
3944         end9ffe6731d7d6514b8c0482f1645eee18:
3945                 ;
3946         case OpLsh8x8:
3947                 // match: (Lsh8x8 <t> x y)
3948                 // cond:
3949                 // result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPBconst [8] y)))
3950                 {
3951                         t := v.Type
3952                         x := v.Args[0]
3953                         y := v.Args[1]
3954                         v.Op = OpAMD64ANDB
3955                         v.AuxInt = 0
3956                         v.Aux = nil
3957                         v.resetArgs()
3958                         v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
3959                         v0.Type = t
3960                         v0.AddArg(x)
3961                         v0.AddArg(y)
3962                         v.AddArg(v0)
3963                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
3964                         v1.Type = t
3965                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
3966                         v2.AuxInt = 8
3967                         v2.AddArg(y)
3968                         v2.Type = TypeFlags
3969                         v1.AddArg(v2)
3970                         v.AddArg(v1)
3971                         return true
3972                 }
3973                 goto end2b75242a31c3713ffbfdd8f0288b1c12
3974         end2b75242a31c3713ffbfdd8f0288b1c12:
3975                 ;
3976         case OpAMD64MOVBQSX:
3977                 // match: (MOVBQSX (MOVBload [off] {sym} ptr mem))
3978                 // cond:
3979                 // result: @v.Args[0].Block (MOVBQSXload <v.Type> [off] {sym} ptr mem)
3980                 {
3981                         if v.Args[0].Op != OpAMD64MOVBload {
3982                                 goto end19c38f3a1a37dca50637c917fa26e4f7
3983                         }
3984                         off := v.Args[0].AuxInt
3985                         sym := v.Args[0].Aux
3986                         ptr := v.Args[0].Args[0]
3987                         mem := v.Args[0].Args[1]
3988                         v0 := v.Args[0].Block.NewValue0(v.Line, OpAMD64MOVBQSXload, TypeInvalid)
3989                         v.Op = OpCopy
3990                         v.AuxInt = 0
3991                         v.Aux = nil
3992                         v.resetArgs()
3993                         v.AddArg(v0)
3994                         v0.Type = v.Type
3995                         v0.AuxInt = off
3996                         v0.Aux = sym
3997                         v0.AddArg(ptr)
3998                         v0.AddArg(mem)
3999                         return true
4000                 }
4001                 goto end19c38f3a1a37dca50637c917fa26e4f7
4002         end19c38f3a1a37dca50637c917fa26e4f7:
4003                 ;
4004         case OpAMD64MOVBQZX:
4005                 // match: (MOVBQZX (MOVBload [off] {sym} ptr mem))
4006                 // cond:
4007                 // result: @v.Args[0].Block (MOVBQZXload <v.Type> [off] {sym} ptr mem)
4008                 {
4009                         if v.Args[0].Op != OpAMD64MOVBload {
4010                                 goto end1169bcf3d56fa24321b002eaebd5a62d
4011                         }
4012                         off := v.Args[0].AuxInt
4013                         sym := v.Args[0].Aux
4014                         ptr := v.Args[0].Args[0]
4015                         mem := v.Args[0].Args[1]
4016                         v0 := v.Args[0].Block.NewValue0(v.Line, OpAMD64MOVBQZXload, TypeInvalid)
4017                         v.Op = OpCopy
4018                         v.AuxInt = 0
4019                         v.Aux = nil
4020                         v.resetArgs()
4021                         v.AddArg(v0)
4022                         v0.Type = v.Type
4023                         v0.AuxInt = off
4024                         v0.Aux = sym
4025                         v0.AddArg(ptr)
4026                         v0.AddArg(mem)
4027                         return true
4028                 }
4029                 goto end1169bcf3d56fa24321b002eaebd5a62d
4030         end1169bcf3d56fa24321b002eaebd5a62d:
4031                 ;
4032         case OpAMD64MOVBload:
4033                 // match: (MOVBload  [off1] {sym} (ADDQconst [off2] ptr) mem)
4034                 // cond:
4035                 // result: (MOVBload  [addOff(off1, off2)] {sym} ptr mem)
4036                 {
4037                         off1 := v.AuxInt
4038                         sym := v.Aux
4039                         if v.Args[0].Op != OpAMD64ADDQconst {
4040                                 goto end7ec9147ab863c1bd59190fed81f894b6
4041                         }
4042                         off2 := v.Args[0].AuxInt
4043                         ptr := v.Args[0].Args[0]
4044                         mem := v.Args[1]
4045                         v.Op = OpAMD64MOVBload
4046                         v.AuxInt = 0
4047                         v.Aux = nil
4048                         v.resetArgs()
4049                         v.AuxInt = addOff(off1, off2)
4050                         v.Aux = sym
4051                         v.AddArg(ptr)
4052                         v.AddArg(mem)
4053                         return true
4054                 }
4055                 goto end7ec9147ab863c1bd59190fed81f894b6
4056         end7ec9147ab863c1bd59190fed81f894b6:
4057                 ;
4058                 // match: (MOVBload  [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
4059                 // cond: canMergeSym(sym1, sym2)
4060                 // result: (MOVBload  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
4061                 {
4062                         off1 := v.AuxInt
4063                         sym1 := v.Aux
4064                         if v.Args[0].Op != OpAMD64LEAQ {
4065                                 goto end3771a59cf66b0df99120d76f4c358fab
4066                         }
4067                         off2 := v.Args[0].AuxInt
4068                         sym2 := v.Args[0].Aux
4069                         base := v.Args[0].Args[0]
4070                         mem := v.Args[1]
4071                         if !(canMergeSym(sym1, sym2)) {
4072                                 goto end3771a59cf66b0df99120d76f4c358fab
4073                         }
4074                         v.Op = OpAMD64MOVBload
4075                         v.AuxInt = 0
4076                         v.Aux = nil
4077                         v.resetArgs()
4078                         v.AuxInt = addOff(off1, off2)
4079                         v.Aux = mergeSym(sym1, sym2)
4080                         v.AddArg(base)
4081                         v.AddArg(mem)
4082                         return true
4083                 }
4084                 goto end3771a59cf66b0df99120d76f4c358fab
4085         end3771a59cf66b0df99120d76f4c358fab:
4086                 ;
4087         case OpAMD64MOVBstore:
4088                 // match: (MOVBstore [off] {sym} ptr (MOVBQSX x) mem)
4089                 // cond:
4090                 // result: (MOVBstore [off] {sym} ptr x mem)
4091                 {
4092                         off := v.AuxInt
4093                         sym := v.Aux
4094                         ptr := v.Args[0]
4095                         if v.Args[1].Op != OpAMD64MOVBQSX {
4096                                 goto end5b3f41f0770d566ff1647dea1d4a40e8
4097                         }
4098                         x := v.Args[1].Args[0]
4099                         mem := v.Args[2]
4100                         v.Op = OpAMD64MOVBstore
4101                         v.AuxInt = 0
4102                         v.Aux = nil
4103                         v.resetArgs()
4104                         v.AuxInt = off
4105                         v.Aux = sym
4106                         v.AddArg(ptr)
4107                         v.AddArg(x)
4108                         v.AddArg(mem)
4109                         return true
4110                 }
4111                 goto end5b3f41f0770d566ff1647dea1d4a40e8
4112         end5b3f41f0770d566ff1647dea1d4a40e8:
4113                 ;
4114                 // match: (MOVBstore [off] {sym} ptr (MOVBQZX x) mem)
4115                 // cond:
4116                 // result: (MOVBstore [off] {sym} ptr x mem)
4117                 {
4118                         off := v.AuxInt
4119                         sym := v.Aux
4120                         ptr := v.Args[0]
4121                         if v.Args[1].Op != OpAMD64MOVBQZX {
4122                                 goto end3a2e55db7e03920700c4875f6a55de3b
4123                         }
4124                         x := v.Args[1].Args[0]
4125                         mem := v.Args[2]
4126                         v.Op = OpAMD64MOVBstore
4127                         v.AuxInt = 0
4128                         v.Aux = nil
4129                         v.resetArgs()
4130                         v.AuxInt = off
4131                         v.Aux = sym
4132                         v.AddArg(ptr)
4133                         v.AddArg(x)
4134                         v.AddArg(mem)
4135                         return true
4136                 }
4137                 goto end3a2e55db7e03920700c4875f6a55de3b
4138         end3a2e55db7e03920700c4875f6a55de3b:
4139                 ;
4140                 // match: (MOVBstore  [off1] {sym} (ADDQconst [off2] ptr) val mem)
4141                 // cond:
4142                 // result: (MOVBstore  [addOff(off1, off2)] {sym} ptr val mem)
4143                 {
4144                         off1 := v.AuxInt
4145                         sym := v.Aux
4146                         if v.Args[0].Op != OpAMD64ADDQconst {
4147                                 goto ende6347ac19d0469ee59d2e7f2e18d1070
4148                         }
4149                         off2 := v.Args[0].AuxInt
4150                         ptr := v.Args[0].Args[0]
4151                         val := v.Args[1]
4152                         mem := v.Args[2]
4153                         v.Op = OpAMD64MOVBstore
4154                         v.AuxInt = 0
4155                         v.Aux = nil
4156                         v.resetArgs()
4157                         v.AuxInt = addOff(off1, off2)
4158                         v.Aux = sym
4159                         v.AddArg(ptr)
4160                         v.AddArg(val)
4161                         v.AddArg(mem)
4162                         return true
4163                 }
4164                 goto ende6347ac19d0469ee59d2e7f2e18d1070
4165         ende6347ac19d0469ee59d2e7f2e18d1070:
4166                 ;
4167                 // match: (MOVBstore  [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
4168                 // cond: canMergeSym(sym1, sym2)
4169                 // result: (MOVBstore  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
4170                 {
4171                         off1 := v.AuxInt
4172                         sym1 := v.Aux
4173                         if v.Args[0].Op != OpAMD64LEAQ {
4174                                 goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
4175                         }
4176                         off2 := v.Args[0].AuxInt
4177                         sym2 := v.Args[0].Aux
4178                         base := v.Args[0].Args[0]
4179                         val := v.Args[1]
4180                         mem := v.Args[2]
4181                         if !(canMergeSym(sym1, sym2)) {
4182                                 goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
4183                         }
4184                         v.Op = OpAMD64MOVBstore
4185                         v.AuxInt = 0
4186                         v.Aux = nil
4187                         v.resetArgs()
4188                         v.AuxInt = addOff(off1, off2)
4189                         v.Aux = mergeSym(sym1, sym2)
4190                         v.AddArg(base)
4191                         v.AddArg(val)
4192                         v.AddArg(mem)
4193                         return true
4194                 }
4195                 goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
4196         enda7086cf7f6b8cf81972e2c3d4b12f3fc:
4197                 ;
4198         case OpAMD64MOVLload:
4199                 // match: (MOVLload  [off1] {sym} (ADDQconst [off2] ptr) mem)
4200                 // cond:
4201                 // result: (MOVLload  [addOff(off1, off2)] {sym} ptr mem)
4202                 {
4203                         off1 := v.AuxInt
4204                         sym := v.Aux
4205                         if v.Args[0].Op != OpAMD64ADDQconst {
4206                                 goto end0c8b8a40360c5c581d92723eca04d340
4207                         }
4208                         off2 := v.Args[0].AuxInt
4209                         ptr := v.Args[0].Args[0]
4210                         mem := v.Args[1]
4211                         v.Op = OpAMD64MOVLload
4212                         v.AuxInt = 0
4213                         v.Aux = nil
4214                         v.resetArgs()
4215                         v.AuxInt = addOff(off1, off2)
4216                         v.Aux = sym
4217                         v.AddArg(ptr)
4218                         v.AddArg(mem)
4219                         return true
4220                 }
4221                 goto end0c8b8a40360c5c581d92723eca04d340
4222         end0c8b8a40360c5c581d92723eca04d340:
4223                 ;
4224                 // match: (MOVLload  [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
4225                 // cond: canMergeSym(sym1, sym2)
4226                 // result: (MOVLload  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
4227                 {
4228                         off1 := v.AuxInt
4229                         sym1 := v.Aux
4230                         if v.Args[0].Op != OpAMD64LEAQ {
4231                                 goto enddb9e59335876d8a565c425731438a1b3
4232                         }
4233                         off2 := v.Args[0].AuxInt
4234                         sym2 := v.Args[0].Aux
4235                         base := v.Args[0].Args[0]
4236                         mem := v.Args[1]
4237                         if !(canMergeSym(sym1, sym2)) {
4238                                 goto enddb9e59335876d8a565c425731438a1b3
4239                         }
4240                         v.Op = OpAMD64MOVLload
4241                         v.AuxInt = 0
4242                         v.Aux = nil
4243                         v.resetArgs()
4244                         v.AuxInt = addOff(off1, off2)
4245                         v.Aux = mergeSym(sym1, sym2)
4246                         v.AddArg(base)
4247                         v.AddArg(mem)
4248                         return true
4249                 }
4250                 goto enddb9e59335876d8a565c425731438a1b3
4251         enddb9e59335876d8a565c425731438a1b3:
4252                 ;
4253         case OpAMD64MOVLstore:
4254                 // match: (MOVLstore [off] {sym} ptr (MOVLQSX x) mem)
4255                 // cond:
4256                 // result: (MOVLstore [off] {sym} ptr x mem)
4257                 {
4258                         off := v.AuxInt
4259                         sym := v.Aux
4260                         ptr := v.Args[0]
4261                         if v.Args[1].Op != OpAMD64MOVLQSX {
4262                                 goto end1fb7b2ae707c76d30927c21f85d77472
4263                         }
4264                         x := v.Args[1].Args[0]
4265                         mem := v.Args[2]
4266                         v.Op = OpAMD64MOVLstore
4267                         v.AuxInt = 0
4268                         v.Aux = nil
4269                         v.resetArgs()
4270                         v.AuxInt = off
4271                         v.Aux = sym
4272                         v.AddArg(ptr)
4273                         v.AddArg(x)
4274                         v.AddArg(mem)
4275                         return true
4276                 }
4277                 goto end1fb7b2ae707c76d30927c21f85d77472
4278         end1fb7b2ae707c76d30927c21f85d77472:
4279                 ;
4280                 // match: (MOVLstore [off] {sym} ptr (MOVLQZX x) mem)
4281                 // cond:
4282                 // result: (MOVLstore [off] {sym} ptr x mem)
4283                 {
4284                         off := v.AuxInt
4285                         sym := v.Aux
4286                         ptr := v.Args[0]
4287                         if v.Args[1].Op != OpAMD64MOVLQZX {
4288                                 goto end199e8c23a5e7e99728a43d6a83b2c2cf
4289                         }
4290                         x := v.Args[1].Args[0]
4291                         mem := v.Args[2]
4292                         v.Op = OpAMD64MOVLstore
4293                         v.AuxInt = 0
4294                         v.Aux = nil
4295                         v.resetArgs()
4296                         v.AuxInt = off
4297                         v.Aux = sym
4298                         v.AddArg(ptr)
4299                         v.AddArg(x)
4300                         v.AddArg(mem)
4301                         return true
4302                 }
4303                 goto end199e8c23a5e7e99728a43d6a83b2c2cf
4304         end199e8c23a5e7e99728a43d6a83b2c2cf:
4305                 ;
4306                 // match: (MOVLstore  [off1] {sym} (ADDQconst [off2] ptr) val mem)
4307                 // cond:
4308                 // result: (MOVLstore  [addOff(off1, off2)] {sym} ptr val mem)
4309                 {
4310                         off1 := v.AuxInt
4311                         sym := v.Aux
4312                         if v.Args[0].Op != OpAMD64ADDQconst {
4313                                 goto end43bffdb8d9c1fc85a95778d4911955f1
4314                         }
4315                         off2 := v.Args[0].AuxInt
4316                         ptr := v.Args[0].Args[0]
4317                         val := v.Args[1]
4318                         mem := v.Args[2]
4319                         v.Op = OpAMD64MOVLstore
4320                         v.AuxInt = 0
4321                         v.Aux = nil
4322                         v.resetArgs()
4323                         v.AuxInt = addOff(off1, off2)
4324                         v.Aux = sym
4325                         v.AddArg(ptr)
4326                         v.AddArg(val)
4327                         v.AddArg(mem)
4328                         return true
4329                 }
4330                 goto end43bffdb8d9c1fc85a95778d4911955f1
4331         end43bffdb8d9c1fc85a95778d4911955f1:
4332                 ;
4333                 // match: (MOVLstore  [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
4334                 // cond: canMergeSym(sym1, sym2)
4335                 // result: (MOVLstore  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
4336                 {
4337                         off1 := v.AuxInt
4338                         sym1 := v.Aux
4339                         if v.Args[0].Op != OpAMD64LEAQ {
4340                                 goto endd57b1e4313fc7a3331340a9af00ba116
4341                         }
4342                         off2 := v.Args[0].AuxInt
4343                         sym2 := v.Args[0].Aux
4344                         base := v.Args[0].Args[0]
4345                         val := v.Args[1]
4346                         mem := v.Args[2]
4347                         if !(canMergeSym(sym1, sym2)) {
4348                                 goto endd57b1e4313fc7a3331340a9af00ba116
4349                         }
4350                         v.Op = OpAMD64MOVLstore
4351                         v.AuxInt = 0
4352                         v.Aux = nil
4353                         v.resetArgs()
4354                         v.AuxInt = addOff(off1, off2)
4355                         v.Aux = mergeSym(sym1, sym2)
4356                         v.AddArg(base)
4357                         v.AddArg(val)
4358                         v.AddArg(mem)
4359                         return true
4360                 }
4361                 goto endd57b1e4313fc7a3331340a9af00ba116
4362         endd57b1e4313fc7a3331340a9af00ba116:
4363                 ;
4364         case OpAMD64MOVQload:
4365                 // match: (MOVQload  [off1] {sym} (ADDQconst [off2] ptr) mem)
4366                 // cond:
4367                 // result: (MOVQload  [addOff(off1, off2)] {sym} ptr mem)
4368                 {
4369                         off1 := v.AuxInt
4370                         sym := v.Aux
4371                         if v.Args[0].Op != OpAMD64ADDQconst {
4372                                 goto end0b8c50dd7faefb7d046f9a27e054df77
4373                         }
4374                         off2 := v.Args[0].AuxInt
4375                         ptr := v.Args[0].Args[0]
4376                         mem := v.Args[1]
4377                         v.Op = OpAMD64MOVQload
4378                         v.AuxInt = 0
4379                         v.Aux = nil
4380                         v.resetArgs()
4381                         v.AuxInt = addOff(off1, off2)
4382                         v.Aux = sym
4383                         v.AddArg(ptr)
4384                         v.AddArg(mem)
4385                         return true
4386                 }
4387                 goto end0b8c50dd7faefb7d046f9a27e054df77
4388         end0b8c50dd7faefb7d046f9a27e054df77:
4389                 ;
4390                 // match: (MOVQload  [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
4391                 // cond: canMergeSym(sym1, sym2)
4392                 // result: (MOVQload  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
4393                 {
4394                         off1 := v.AuxInt
4395                         sym1 := v.Aux
4396                         if v.Args[0].Op != OpAMD64LEAQ {
4397                                 goto endd0c093adc4f05f2037005734c77d3cc4
4398                         }
4399                         off2 := v.Args[0].AuxInt
4400                         sym2 := v.Args[0].Aux
4401                         base := v.Args[0].Args[0]
4402                         mem := v.Args[1]
4403                         if !(canMergeSym(sym1, sym2)) {
4404                                 goto endd0c093adc4f05f2037005734c77d3cc4
4405                         }
4406                         v.Op = OpAMD64MOVQload
4407                         v.AuxInt = 0
4408                         v.Aux = nil
4409                         v.resetArgs()
4410                         v.AuxInt = addOff(off1, off2)
4411                         v.Aux = mergeSym(sym1, sym2)
4412                         v.AddArg(base)
4413                         v.AddArg(mem)
4414                         return true
4415                 }
4416                 goto endd0c093adc4f05f2037005734c77d3cc4
4417         endd0c093adc4f05f2037005734c77d3cc4:
4418                 ;
4419                 // match: (MOVQload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)
4420                 // cond: canMergeSym(sym1, sym2)
4421                 // result: (MOVQloadidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
4422                 {
4423                         off1 := v.AuxInt
4424                         sym1 := v.Aux
4425                         if v.Args[0].Op != OpAMD64LEAQ8 {
4426                                 goto end74a50d810fb3945e809f608cd094a59c
4427                         }
4428                         off2 := v.Args[0].AuxInt
4429                         sym2 := v.Args[0].Aux
4430                         ptr := v.Args[0].Args[0]
4431                         idx := v.Args[0].Args[1]
4432                         mem := v.Args[1]
4433                         if !(canMergeSym(sym1, sym2)) {
4434                                 goto end74a50d810fb3945e809f608cd094a59c
4435                         }
4436                         v.Op = OpAMD64MOVQloadidx8
4437                         v.AuxInt = 0
4438                         v.Aux = nil
4439                         v.resetArgs()
4440                         v.AuxInt = addOff(off1, off2)
4441                         v.Aux = mergeSym(sym1, sym2)
4442                         v.AddArg(ptr)
4443                         v.AddArg(idx)
4444                         v.AddArg(mem)
4445                         return true
4446                 }
4447                 goto end74a50d810fb3945e809f608cd094a59c
4448         end74a50d810fb3945e809f608cd094a59c:
4449                 ;
4450         case OpAMD64MOVQloadidx8:
4451                 // match: (MOVQloadidx8 [off1] {sym} (ADDQconst [off2] ptr) idx mem)
4452                 // cond:
4453                 // result: (MOVQloadidx8 [addOff(off1, off2)] {sym} ptr idx mem)
4454                 {
4455                         off1 := v.AuxInt
4456                         sym := v.Aux
4457                         if v.Args[0].Op != OpAMD64ADDQconst {
4458                                 goto endb138bf9b0b33ec824bf0aff619f8bafa
4459                         }
4460                         off2 := v.Args[0].AuxInt
4461                         ptr := v.Args[0].Args[0]
4462                         idx := v.Args[1]
4463                         mem := v.Args[2]
4464                         v.Op = OpAMD64MOVQloadidx8
4465                         v.AuxInt = 0
4466                         v.Aux = nil
4467                         v.resetArgs()
4468                         v.AuxInt = addOff(off1, off2)
4469                         v.Aux = sym
4470                         v.AddArg(ptr)
4471                         v.AddArg(idx)
4472                         v.AddArg(mem)
4473                         return true
4474                 }
4475                 goto endb138bf9b0b33ec824bf0aff619f8bafa
4476         endb138bf9b0b33ec824bf0aff619f8bafa:
4477                 ;
4478         case OpAMD64MOVQstore:
4479                 // match: (MOVQstore  [off1] {sym} (ADDQconst [off2] ptr) val mem)
4480                 // cond:
4481                 // result: (MOVQstore  [addOff(off1, off2)] {sym} ptr val mem)
4482                 {
4483                         off1 := v.AuxInt
4484                         sym := v.Aux
4485                         if v.Args[0].Op != OpAMD64ADDQconst {
4486                                 goto end0a110b5e42a4576c32fda50590092848
4487                         }
4488                         off2 := v.Args[0].AuxInt
4489                         ptr := v.Args[0].Args[0]
4490                         val := v.Args[1]
4491                         mem := v.Args[2]
4492                         v.Op = OpAMD64MOVQstore
4493                         v.AuxInt = 0
4494                         v.Aux = nil
4495                         v.resetArgs()
4496                         v.AuxInt = addOff(off1, off2)
4497                         v.Aux = sym
4498                         v.AddArg(ptr)
4499                         v.AddArg(val)
4500                         v.AddArg(mem)
4501                         return true
4502                 }
4503                 goto end0a110b5e42a4576c32fda50590092848
4504         end0a110b5e42a4576c32fda50590092848:
4505                 ;
4506                 // match: (MOVQstore  [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
4507                 // cond: canMergeSym(sym1, sym2)
4508                 // result: (MOVQstore  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
4509                 {
4510                         off1 := v.AuxInt
4511                         sym1 := v.Aux
4512                         if v.Args[0].Op != OpAMD64LEAQ {
4513                                 goto end9a0cfe20b3b0f587e252760907c1b5c0
4514                         }
4515                         off2 := v.Args[0].AuxInt
4516                         sym2 := v.Args[0].Aux
4517                         base := v.Args[0].Args[0]
4518                         val := v.Args[1]
4519                         mem := v.Args[2]
4520                         if !(canMergeSym(sym1, sym2)) {
4521                                 goto end9a0cfe20b3b0f587e252760907c1b5c0
4522                         }
4523                         v.Op = OpAMD64MOVQstore
4524                         v.AuxInt = 0
4525                         v.Aux = nil
4526                         v.resetArgs()
4527                         v.AuxInt = addOff(off1, off2)
4528                         v.Aux = mergeSym(sym1, sym2)
4529                         v.AddArg(base)
4530                         v.AddArg(val)
4531                         v.AddArg(mem)
4532                         return true
4533                 }
4534                 goto end9a0cfe20b3b0f587e252760907c1b5c0
4535         end9a0cfe20b3b0f587e252760907c1b5c0:
4536                 ;
4537                 // match: (MOVQstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)
4538                 // cond: canMergeSym(sym1, sym2)
4539                 // result: (MOVQstoreidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
4540                 {
4541                         off1 := v.AuxInt
4542                         sym1 := v.Aux
4543                         if v.Args[0].Op != OpAMD64LEAQ8 {
4544                                 goto end442c322e6719e280b6be1c12858e49d7
4545                         }
4546                         off2 := v.Args[0].AuxInt
4547                         sym2 := v.Args[0].Aux
4548                         ptr := v.Args[0].Args[0]
4549                         idx := v.Args[0].Args[1]
4550                         val := v.Args[1]
4551                         mem := v.Args[2]
4552                         if !(canMergeSym(sym1, sym2)) {
4553                                 goto end442c322e6719e280b6be1c12858e49d7
4554                         }
4555                         v.Op = OpAMD64MOVQstoreidx8
4556                         v.AuxInt = 0
4557                         v.Aux = nil
4558                         v.resetArgs()
4559                         v.AuxInt = addOff(off1, off2)
4560                         v.Aux = mergeSym(sym1, sym2)
4561                         v.AddArg(ptr)
4562                         v.AddArg(idx)
4563                         v.AddArg(val)
4564                         v.AddArg(mem)
4565                         return true
4566                 }
4567                 goto end442c322e6719e280b6be1c12858e49d7
4568         end442c322e6719e280b6be1c12858e49d7:
4569                 ;
4570         case OpAMD64MOVQstoreidx8:
4571                 // match: (MOVQstoreidx8 [off1] {sym} (ADDQconst [off2] ptr) idx val mem)
4572                 // cond:
4573                 // result: (MOVQstoreidx8 [addOff(off1, off2)] {sym} ptr idx val mem)
4574                 {
4575                         off1 := v.AuxInt
4576                         sym := v.Aux
4577                         if v.Args[0].Op != OpAMD64ADDQconst {
4578                                 goto end50671766fdab364c1edbd2072fb8e525
4579                         }
4580                         off2 := v.Args[0].AuxInt
4581                         ptr := v.Args[0].Args[0]
4582                         idx := v.Args[1]
4583                         val := v.Args[2]
4584                         mem := v.Args[3]
4585                         v.Op = OpAMD64MOVQstoreidx8
4586                         v.AuxInt = 0
4587                         v.Aux = nil
4588                         v.resetArgs()
4589                         v.AuxInt = addOff(off1, off2)
4590                         v.Aux = sym
4591                         v.AddArg(ptr)
4592                         v.AddArg(idx)
4593                         v.AddArg(val)
4594                         v.AddArg(mem)
4595                         return true
4596                 }
4597                 goto end50671766fdab364c1edbd2072fb8e525
4598         end50671766fdab364c1edbd2072fb8e525:
4599                 ;
4600         case OpAMD64MOVSDload:
4601                 // match: (MOVSDload [off1] {sym} (ADDQconst [off2] ptr) mem)
4602                 // cond:
4603                 // result: (MOVSDload [addOff(off1, off2)] {sym} ptr mem)
4604                 {
4605                         off1 := v.AuxInt
4606                         sym := v.Aux
4607                         if v.Args[0].Op != OpAMD64ADDQconst {
4608                                 goto end6dad9bf78e7368bb095eb2dfba7e244a
4609                         }
4610                         off2 := v.Args[0].AuxInt
4611                         ptr := v.Args[0].Args[0]
4612                         mem := v.Args[1]
4613                         v.Op = OpAMD64MOVSDload
4614                         v.AuxInt = 0
4615                         v.Aux = nil
4616                         v.resetArgs()
4617                         v.AuxInt = addOff(off1, off2)
4618                         v.Aux = sym
4619                         v.AddArg(ptr)
4620                         v.AddArg(mem)
4621                         return true
4622                 }
4623                 goto end6dad9bf78e7368bb095eb2dfba7e244a
4624         end6dad9bf78e7368bb095eb2dfba7e244a:
4625                 ;
4626                 // match: (MOVSDload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
4627                 // cond: canMergeSym(sym1, sym2)
4628                 // result: (MOVSDload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
4629                 {
4630                         off1 := v.AuxInt
4631                         sym1 := v.Aux
4632                         if v.Args[0].Op != OpAMD64LEAQ {
4633                                 goto end96fa9c439e31050aa91582bc2a9f2c20
4634                         }
4635                         off2 := v.Args[0].AuxInt
4636                         sym2 := v.Args[0].Aux
4637                         base := v.Args[0].Args[0]
4638                         mem := v.Args[1]
4639                         if !(canMergeSym(sym1, sym2)) {
4640                                 goto end96fa9c439e31050aa91582bc2a9f2c20
4641                         }
4642                         v.Op = OpAMD64MOVSDload
4643                         v.AuxInt = 0
4644                         v.Aux = nil
4645                         v.resetArgs()
4646                         v.AuxInt = addOff(off1, off2)
4647                         v.Aux = mergeSym(sym1, sym2)
4648                         v.AddArg(base)
4649                         v.AddArg(mem)
4650                         return true
4651                 }
4652                 goto end96fa9c439e31050aa91582bc2a9f2c20
4653         end96fa9c439e31050aa91582bc2a9f2c20:
4654                 ;
4655                 // match: (MOVSDload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)
4656                 // cond: canMergeSym(sym1, sym2)
4657                 // result: (MOVSDloadidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
4658                 {
4659                         off1 := v.AuxInt
4660                         sym1 := v.Aux
4661                         if v.Args[0].Op != OpAMD64LEAQ8 {
4662                                 goto endbcb2ce441824d0e3a4b501018cfa7f60
4663                         }
4664                         off2 := v.Args[0].AuxInt
4665                         sym2 := v.Args[0].Aux
4666                         ptr := v.Args[0].Args[0]
4667                         idx := v.Args[0].Args[1]
4668                         mem := v.Args[1]
4669                         if !(canMergeSym(sym1, sym2)) {
4670                                 goto endbcb2ce441824d0e3a4b501018cfa7f60
4671                         }
4672                         v.Op = OpAMD64MOVSDloadidx8
4673                         v.AuxInt = 0
4674                         v.Aux = nil
4675                         v.resetArgs()
4676                         v.AuxInt = addOff(off1, off2)
4677                         v.Aux = mergeSym(sym1, sym2)
4678                         v.AddArg(ptr)
4679                         v.AddArg(idx)
4680                         v.AddArg(mem)
4681                         return true
4682                 }
4683                 goto endbcb2ce441824d0e3a4b501018cfa7f60
4684         endbcb2ce441824d0e3a4b501018cfa7f60:
4685                 ;
4686         case OpAMD64MOVSDloadidx8:
4687                 // match: (MOVSDloadidx8 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx mem)
4688                 // cond:
4689                 // result: (MOVSDloadidx8 [addOff(off1, off2)] {sym} ptr idx mem)
4690                 {
4691                         off1 := v.AuxInt
4692                         sym := v.Aux
4693                         if v.Args[0].Op != OpAMD64ADDQconst {
4694                                 goto end84f0f457e271104a92343e3b1d2804c6
4695                         }
4696                         off2 := v.Args[0].AuxInt
4697                         if v.Args[0].Aux != v.Aux {
4698                                 goto end84f0f457e271104a92343e3b1d2804c6
4699                         }
4700                         ptr := v.Args[0].Args[0]
4701                         idx := v.Args[1]
4702                         mem := v.Args[2]
4703                         v.Op = OpAMD64MOVSDloadidx8
4704                         v.AuxInt = 0
4705                         v.Aux = nil
4706                         v.resetArgs()
4707                         v.AuxInt = addOff(off1, off2)
4708                         v.Aux = sym
4709                         v.AddArg(ptr)
4710                         v.AddArg(idx)
4711                         v.AddArg(mem)
4712                         return true
4713                 }
4714                 goto end84f0f457e271104a92343e3b1d2804c6
4715         end84f0f457e271104a92343e3b1d2804c6:
4716                 ;
4717         case OpAMD64MOVSDstore:
4718                 // match: (MOVSDstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
4719                 // cond:
4720                 // result: (MOVSDstore [addOff(off1, off2)] {sym} ptr val mem)
4721                 {
4722                         off1 := v.AuxInt
4723                         sym := v.Aux
4724                         if v.Args[0].Op != OpAMD64ADDQconst {
4725                                 goto end6c6160664143cc66e63e67b9aa43a7ef
4726                         }
4727                         off2 := v.Args[0].AuxInt
4728                         ptr := v.Args[0].Args[0]
4729                         val := v.Args[1]
4730                         mem := v.Args[2]
4731                         v.Op = OpAMD64MOVSDstore
4732                         v.AuxInt = 0
4733                         v.Aux = nil
4734                         v.resetArgs()
4735                         v.AuxInt = addOff(off1, off2)
4736                         v.Aux = sym
4737                         v.AddArg(ptr)
4738                         v.AddArg(val)
4739                         v.AddArg(mem)
4740                         return true
4741                 }
4742                 goto end6c6160664143cc66e63e67b9aa43a7ef
4743         end6c6160664143cc66e63e67b9aa43a7ef:
4744                 ;
4745                 // match: (MOVSDstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
4746                 // cond: canMergeSym(sym1, sym2)
4747                 // result: (MOVSDstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
4748                 {
4749                         off1 := v.AuxInt
4750                         sym1 := v.Aux
4751                         if v.Args[0].Op != OpAMD64LEAQ {
4752                                 goto end415dde14f3400bec1b2756174a5d7179
4753                         }
4754                         off2 := v.Args[0].AuxInt
4755                         sym2 := v.Args[0].Aux
4756                         base := v.Args[0].Args[0]
4757                         val := v.Args[1]
4758                         mem := v.Args[2]
4759                         if !(canMergeSym(sym1, sym2)) {
4760                                 goto end415dde14f3400bec1b2756174a5d7179
4761                         }
4762                         v.Op = OpAMD64MOVSDstore
4763                         v.AuxInt = 0
4764                         v.Aux = nil
4765                         v.resetArgs()
4766                         v.AuxInt = addOff(off1, off2)
4767                         v.Aux = mergeSym(sym1, sym2)
4768                         v.AddArg(base)
4769                         v.AddArg(val)
4770                         v.AddArg(mem)
4771                         return true
4772                 }
4773                 goto end415dde14f3400bec1b2756174a5d7179
4774         end415dde14f3400bec1b2756174a5d7179:
4775                 ;
4776                 // match: (MOVSDstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)
4777                 // cond: canMergeSym(sym1, sym2)
4778                 // result: (MOVSDstoreidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
4779                 {
4780                         off1 := v.AuxInt
4781                         sym1 := v.Aux
4782                         if v.Args[0].Op != OpAMD64LEAQ8 {
4783                                 goto end1ad6fc0c5b59610dabf7f9595a48a230
4784                         }
4785                         off2 := v.Args[0].AuxInt
4786                         sym2 := v.Args[0].Aux
4787                         ptr := v.Args[0].Args[0]
4788                         idx := v.Args[0].Args[1]
4789                         val := v.Args[1]
4790                         mem := v.Args[2]
4791                         if !(canMergeSym(sym1, sym2)) {
4792                                 goto end1ad6fc0c5b59610dabf7f9595a48a230
4793                         }
4794                         v.Op = OpAMD64MOVSDstoreidx8
4795                         v.AuxInt = 0
4796                         v.Aux = nil
4797                         v.resetArgs()
4798                         v.AuxInt = addOff(off1, off2)
4799                         v.Aux = mergeSym(sym1, sym2)
4800                         v.AddArg(ptr)
4801                         v.AddArg(idx)
4802                         v.AddArg(val)
4803                         v.AddArg(mem)
4804                         return true
4805                 }
4806                 goto end1ad6fc0c5b59610dabf7f9595a48a230
4807         end1ad6fc0c5b59610dabf7f9595a48a230:
4808                 ;
4809         case OpAMD64MOVSDstoreidx8:
4810                 // match: (MOVSDstoreidx8 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx val mem)
4811                 // cond:
4812                 // result: (MOVSDstoreidx8 [addOff(off1, off2)] {sym} ptr idx val mem)
4813                 {
4814                         off1 := v.AuxInt
4815                         sym := v.Aux
4816                         if v.Args[0].Op != OpAMD64ADDQconst {
4817                                 goto endc0e28f57697cb6038d5d09eafe26c947
4818                         }
4819                         off2 := v.Args[0].AuxInt
4820                         if v.Args[0].Aux != v.Aux {
4821                                 goto endc0e28f57697cb6038d5d09eafe26c947
4822                         }
4823                         ptr := v.Args[0].Args[0]
4824                         idx := v.Args[1]
4825                         val := v.Args[2]
4826                         mem := v.Args[3]
4827                         v.Op = OpAMD64MOVSDstoreidx8
4828                         v.AuxInt = 0
4829                         v.Aux = nil
4830                         v.resetArgs()
4831                         v.AuxInt = addOff(off1, off2)
4832                         v.Aux = sym
4833                         v.AddArg(ptr)
4834                         v.AddArg(idx)
4835                         v.AddArg(val)
4836                         v.AddArg(mem)
4837                         return true
4838                 }
4839                 goto endc0e28f57697cb6038d5d09eafe26c947
4840         endc0e28f57697cb6038d5d09eafe26c947:
4841                 ;
4842         case OpAMD64MOVSSload:
4843                 // match: (MOVSSload [off1] {sym} (ADDQconst [off2] ptr) mem)
4844                 // cond:
4845                 // result: (MOVSSload [addOff(off1, off2)] {sym} ptr mem)
4846                 {
4847                         off1 := v.AuxInt
4848                         sym := v.Aux
4849                         if v.Args[0].Op != OpAMD64ADDQconst {
4850                                 goto end96d63dbb64b0adfa944684c9e939c972
4851                         }
4852                         off2 := v.Args[0].AuxInt
4853                         ptr := v.Args[0].Args[0]
4854                         mem := v.Args[1]
4855                         v.Op = OpAMD64MOVSSload
4856                         v.AuxInt = 0
4857                         v.Aux = nil
4858                         v.resetArgs()
4859                         v.AuxInt = addOff(off1, off2)
4860                         v.Aux = sym
4861                         v.AddArg(ptr)
4862                         v.AddArg(mem)
4863                         return true
4864                 }
4865                 goto end96d63dbb64b0adfa944684c9e939c972
4866         end96d63dbb64b0adfa944684c9e939c972:
4867                 ;
4868                 // match: (MOVSSload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
4869                 // cond: canMergeSym(sym1, sym2)
4870                 // result: (MOVSSload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
4871                 {
4872                         off1 := v.AuxInt
4873                         sym1 := v.Aux
4874                         if v.Args[0].Op != OpAMD64LEAQ {
4875                                 goto end15f2583bd72ad7fc077b3952634a1c85
4876                         }
4877                         off2 := v.Args[0].AuxInt
4878                         sym2 := v.Args[0].Aux
4879                         base := v.Args[0].Args[0]
4880                         mem := v.Args[1]
4881                         if !(canMergeSym(sym1, sym2)) {
4882                                 goto end15f2583bd72ad7fc077b3952634a1c85
4883                         }
4884                         v.Op = OpAMD64MOVSSload
4885                         v.AuxInt = 0
4886                         v.Aux = nil
4887                         v.resetArgs()
4888                         v.AuxInt = addOff(off1, off2)
4889                         v.Aux = mergeSym(sym1, sym2)
4890                         v.AddArg(base)
4891                         v.AddArg(mem)
4892                         return true
4893                 }
4894                 goto end15f2583bd72ad7fc077b3952634a1c85
4895         end15f2583bd72ad7fc077b3952634a1c85:
4896                 ;
4897                 // match: (MOVSSload [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) mem)
4898                 // cond: canMergeSym(sym1, sym2)
4899                 // result: (MOVSSloadidx4 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
4900                 {
4901                         off1 := v.AuxInt
4902                         sym1 := v.Aux
4903                         if v.Args[0].Op != OpAMD64LEAQ4 {
4904                                 goto end49722f4a0adba31bb143601ce1d2aae0
4905                         }
4906                         off2 := v.Args[0].AuxInt
4907                         sym2 := v.Args[0].Aux
4908                         ptr := v.Args[0].Args[0]
4909                         idx := v.Args[0].Args[1]
4910                         mem := v.Args[1]
4911                         if !(canMergeSym(sym1, sym2)) {
4912                                 goto end49722f4a0adba31bb143601ce1d2aae0
4913                         }
4914                         v.Op = OpAMD64MOVSSloadidx4
4915                         v.AuxInt = 0
4916                         v.Aux = nil
4917                         v.resetArgs()
4918                         v.AuxInt = addOff(off1, off2)
4919                         v.Aux = mergeSym(sym1, sym2)
4920                         v.AddArg(ptr)
4921                         v.AddArg(idx)
4922                         v.AddArg(mem)
4923                         return true
4924                 }
4925                 goto end49722f4a0adba31bb143601ce1d2aae0
4926         end49722f4a0adba31bb143601ce1d2aae0:
4927                 ;
4928         case OpAMD64MOVSSloadidx4:
4929                 // match: (MOVSSloadidx4 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx mem)
4930                 // cond:
4931                 // result: (MOVSSloadidx4 [addOff(off1, off2)] {sym} ptr idx mem)
4932                 {
4933                         off1 := v.AuxInt
4934                         sym := v.Aux
4935                         if v.Args[0].Op != OpAMD64ADDQconst {
4936                                 goto end7eb5a1ab1e2508683d879ec25286754b
4937                         }
4938                         off2 := v.Args[0].AuxInt
4939                         if v.Args[0].Aux != v.Aux {
4940                                 goto end7eb5a1ab1e2508683d879ec25286754b
4941                         }
4942                         ptr := v.Args[0].Args[0]
4943                         idx := v.Args[1]
4944                         mem := v.Args[2]
4945                         v.Op = OpAMD64MOVSSloadidx4
4946                         v.AuxInt = 0
4947                         v.Aux = nil
4948                         v.resetArgs()
4949                         v.AuxInt = addOff(off1, off2)
4950                         v.Aux = sym
4951                         v.AddArg(ptr)
4952                         v.AddArg(idx)
4953                         v.AddArg(mem)
4954                         return true
4955                 }
4956                 goto end7eb5a1ab1e2508683d879ec25286754b
4957         end7eb5a1ab1e2508683d879ec25286754b:
4958                 ;
4959         case OpAMD64MOVSSstore:
4960                 // match: (MOVSSstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
4961                 // cond:
4962                 // result: (MOVSSstore [addOff(off1, off2)] {sym} ptr val mem)
4963                 {
4964                         off1 := v.AuxInt
4965                         sym := v.Aux
4966                         if v.Args[0].Op != OpAMD64ADDQconst {
4967                                 goto endf711aa4081a9b2924b55387d4f70cfd6
4968                         }
4969                         off2 := v.Args[0].AuxInt
4970                         ptr := v.Args[0].Args[0]
4971                         val := v.Args[1]
4972                         mem := v.Args[2]
4973                         v.Op = OpAMD64MOVSSstore
4974                         v.AuxInt = 0
4975                         v.Aux = nil
4976                         v.resetArgs()
4977                         v.AuxInt = addOff(off1, off2)
4978                         v.Aux = sym
4979                         v.AddArg(ptr)
4980                         v.AddArg(val)
4981                         v.AddArg(mem)
4982                         return true
4983                 }
4984                 goto endf711aa4081a9b2924b55387d4f70cfd6
4985         endf711aa4081a9b2924b55387d4f70cfd6:
4986                 ;
4987                 // match: (MOVSSstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
4988                 // cond: canMergeSym(sym1, sym2)
4989                 // result: (MOVSSstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
4990                 {
4991                         off1 := v.AuxInt
4992                         sym1 := v.Aux
4993                         if v.Args[0].Op != OpAMD64LEAQ {
4994                                 goto end70ebc170131920e515e3f416a6b952c5
4995                         }
4996                         off2 := v.Args[0].AuxInt
4997                         sym2 := v.Args[0].Aux
4998                         base := v.Args[0].Args[0]
4999                         val := v.Args[1]
5000                         mem := v.Args[2]
5001                         if !(canMergeSym(sym1, sym2)) {
5002                                 goto end70ebc170131920e515e3f416a6b952c5
5003                         }
5004                         v.Op = OpAMD64MOVSSstore
5005                         v.AuxInt = 0
5006                         v.Aux = nil
5007                         v.resetArgs()
5008                         v.AuxInt = addOff(off1, off2)
5009                         v.Aux = mergeSym(sym1, sym2)
5010                         v.AddArg(base)
5011                         v.AddArg(val)
5012                         v.AddArg(mem)
5013                         return true
5014                 }
5015                 goto end70ebc170131920e515e3f416a6b952c5
5016         end70ebc170131920e515e3f416a6b952c5:
5017                 ;
5018                 // match: (MOVSSstore [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) val mem)
5019                 // cond: canMergeSym(sym1, sym2)
5020                 // result: (MOVSSstoreidx4 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
5021                 {
5022                         off1 := v.AuxInt
5023                         sym1 := v.Aux
5024                         if v.Args[0].Op != OpAMD64LEAQ4 {
5025                                 goto end1622dc435e45833eda4d29d44df7cc34
5026                         }
5027                         off2 := v.Args[0].AuxInt
5028                         sym2 := v.Args[0].Aux
5029                         ptr := v.Args[0].Args[0]
5030                         idx := v.Args[0].Args[1]
5031                         val := v.Args[1]
5032                         mem := v.Args[2]
5033                         if !(canMergeSym(sym1, sym2)) {
5034                                 goto end1622dc435e45833eda4d29d44df7cc34
5035                         }
5036                         v.Op = OpAMD64MOVSSstoreidx4
5037                         v.AuxInt = 0
5038                         v.Aux = nil
5039                         v.resetArgs()
5040                         v.AuxInt = addOff(off1, off2)
5041                         v.Aux = mergeSym(sym1, sym2)
5042                         v.AddArg(ptr)
5043                         v.AddArg(idx)
5044                         v.AddArg(val)
5045                         v.AddArg(mem)
5046                         return true
5047                 }
5048                 goto end1622dc435e45833eda4d29d44df7cc34
5049         end1622dc435e45833eda4d29d44df7cc34:
5050                 ;
5051         case OpAMD64MOVSSstoreidx4:
5052                 // match: (MOVSSstoreidx4 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx val mem)
5053                 // cond:
5054                 // result: (MOVSSstoreidx4 [addOff(off1, off2)] {sym} ptr idx val mem)
5055                 {
5056                         off1 := v.AuxInt
5057                         sym := v.Aux
5058                         if v.Args[0].Op != OpAMD64ADDQconst {
5059                                 goto end66e4853026306cd46f414c22d281254f
5060                         }
5061                         off2 := v.Args[0].AuxInt
5062                         if v.Args[0].Aux != v.Aux {
5063                                 goto end66e4853026306cd46f414c22d281254f
5064                         }
5065                         ptr := v.Args[0].Args[0]
5066                         idx := v.Args[1]
5067                         val := v.Args[2]
5068                         mem := v.Args[3]
5069                         v.Op = OpAMD64MOVSSstoreidx4
5070                         v.AuxInt = 0
5071                         v.Aux = nil
5072                         v.resetArgs()
5073                         v.AuxInt = addOff(off1, off2)
5074                         v.Aux = sym
5075                         v.AddArg(ptr)
5076                         v.AddArg(idx)
5077                         v.AddArg(val)
5078                         v.AddArg(mem)
5079                         return true
5080                 }
5081                 goto end66e4853026306cd46f414c22d281254f
5082         end66e4853026306cd46f414c22d281254f:
5083                 ;
5084         case OpAMD64MOVWload:
5085                 // match: (MOVWload  [off1] {sym} (ADDQconst [off2] ptr) mem)
5086                 // cond:
5087                 // result: (MOVWload  [addOff(off1, off2)] {sym} ptr mem)
5088                 {
5089                         off1 := v.AuxInt
5090                         sym := v.Aux
5091                         if v.Args[0].Op != OpAMD64ADDQconst {
5092                                 goto endfcb0ce76f96e8b0c2eb19a9b827c1b73
5093                         }
5094                         off2 := v.Args[0].AuxInt
5095                         ptr := v.Args[0].Args[0]
5096                         mem := v.Args[1]
5097                         v.Op = OpAMD64MOVWload
5098                         v.AuxInt = 0
5099                         v.Aux = nil
5100                         v.resetArgs()
5101                         v.AuxInt = addOff(off1, off2)
5102                         v.Aux = sym
5103                         v.AddArg(ptr)
5104                         v.AddArg(mem)
5105                         return true
5106                 }
5107                 goto endfcb0ce76f96e8b0c2eb19a9b827c1b73
5108         endfcb0ce76f96e8b0c2eb19a9b827c1b73:
5109                 ;
5110                 // match: (MOVWload  [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
5111                 // cond: canMergeSym(sym1, sym2)
5112                 // result: (MOVWload  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
5113                 {
5114                         off1 := v.AuxInt
5115                         sym1 := v.Aux
5116                         if v.Args[0].Op != OpAMD64LEAQ {
5117                                 goto end7a79314cb49bf53d79c38c3077d87457
5118                         }
5119                         off2 := v.Args[0].AuxInt
5120                         sym2 := v.Args[0].Aux
5121                         base := v.Args[0].Args[0]
5122                         mem := v.Args[1]
5123                         if !(canMergeSym(sym1, sym2)) {
5124                                 goto end7a79314cb49bf53d79c38c3077d87457
5125                         }
5126                         v.Op = OpAMD64MOVWload
5127                         v.AuxInt = 0
5128                         v.Aux = nil
5129                         v.resetArgs()
5130                         v.AuxInt = addOff(off1, off2)
5131                         v.Aux = mergeSym(sym1, sym2)
5132                         v.AddArg(base)
5133                         v.AddArg(mem)
5134                         return true
5135                 }
5136                 goto end7a79314cb49bf53d79c38c3077d87457
5137         end7a79314cb49bf53d79c38c3077d87457:
5138                 ;
5139         case OpAMD64MOVWstore:
5140                 // match: (MOVWstore [off] {sym} ptr (MOVWQSX x) mem)
5141                 // cond:
5142                 // result: (MOVWstore [off] {sym} ptr x mem)
5143                 {
5144                         off := v.AuxInt
5145                         sym := v.Aux
5146                         ptr := v.Args[0]
5147                         if v.Args[1].Op != OpAMD64MOVWQSX {
5148                                 goto endca90c534e75c7f5cb803504d119a853f
5149                         }
5150                         x := v.Args[1].Args[0]
5151                         mem := v.Args[2]
5152                         v.Op = OpAMD64MOVWstore
5153                         v.AuxInt = 0
5154                         v.Aux = nil
5155                         v.resetArgs()
5156                         v.AuxInt = off
5157                         v.Aux = sym
5158                         v.AddArg(ptr)
5159                         v.AddArg(x)
5160                         v.AddArg(mem)
5161                         return true
5162                 }
5163                 goto endca90c534e75c7f5cb803504d119a853f
5164         endca90c534e75c7f5cb803504d119a853f:
5165                 ;
5166                 // match: (MOVWstore [off] {sym} ptr (MOVWQZX x) mem)
5167                 // cond:
5168                 // result: (MOVWstore [off] {sym} ptr x mem)
5169                 {
5170                         off := v.AuxInt
5171                         sym := v.Aux
5172                         ptr := v.Args[0]
5173                         if v.Args[1].Op != OpAMD64MOVWQZX {
5174                                 goto end187fe73dfaf9cf5f4c349283b4dfd9d1
5175                         }
5176                         x := v.Args[1].Args[0]
5177                         mem := v.Args[2]
5178                         v.Op = OpAMD64MOVWstore
5179                         v.AuxInt = 0
5180                         v.Aux = nil
5181                         v.resetArgs()
5182                         v.AuxInt = off
5183                         v.Aux = sym
5184                         v.AddArg(ptr)
5185                         v.AddArg(x)
5186                         v.AddArg(mem)
5187                         return true
5188                 }
5189                 goto end187fe73dfaf9cf5f4c349283b4dfd9d1
5190         end187fe73dfaf9cf5f4c349283b4dfd9d1:
5191                 ;
5192                 // match: (MOVWstore  [off1] {sym} (ADDQconst [off2] ptr) val mem)
5193                 // cond:
5194                 // result: (MOVWstore  [addOff(off1, off2)] {sym} ptr val mem)
5195                 {
5196                         off1 := v.AuxInt
5197                         sym := v.Aux
5198                         if v.Args[0].Op != OpAMD64ADDQconst {
5199                                 goto endda15fdd59aa956ded0440188f38de1aa
5200                         }
5201                         off2 := v.Args[0].AuxInt
5202                         ptr := v.Args[0].Args[0]
5203                         val := v.Args[1]
5204                         mem := v.Args[2]
5205                         v.Op = OpAMD64MOVWstore
5206                         v.AuxInt = 0
5207                         v.Aux = nil
5208                         v.resetArgs()
5209                         v.AuxInt = addOff(off1, off2)
5210                         v.Aux = sym
5211                         v.AddArg(ptr)
5212                         v.AddArg(val)
5213                         v.AddArg(mem)
5214                         return true
5215                 }
5216                 goto endda15fdd59aa956ded0440188f38de1aa
5217         endda15fdd59aa956ded0440188f38de1aa:
5218                 ;
5219                 // match: (MOVWstore  [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
5220                 // cond: canMergeSym(sym1, sym2)
5221                 // result: (MOVWstore  [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
5222                 {
5223                         off1 := v.AuxInt
5224                         sym1 := v.Aux
5225                         if v.Args[0].Op != OpAMD64LEAQ {
5226                                 goto end4cc466ede8e64e415c899ccac81c0f27
5227                         }
5228                         off2 := v.Args[0].AuxInt
5229                         sym2 := v.Args[0].Aux
5230                         base := v.Args[0].Args[0]
5231                         val := v.Args[1]
5232                         mem := v.Args[2]
5233                         if !(canMergeSym(sym1, sym2)) {
5234                                 goto end4cc466ede8e64e415c899ccac81c0f27
5235                         }
5236                         v.Op = OpAMD64MOVWstore
5237                         v.AuxInt = 0
5238                         v.Aux = nil
5239                         v.resetArgs()
5240                         v.AuxInt = addOff(off1, off2)
5241                         v.Aux = mergeSym(sym1, sym2)
5242                         v.AddArg(base)
5243                         v.AddArg(val)
5244                         v.AddArg(mem)
5245                         return true
5246                 }
5247                 goto end4cc466ede8e64e415c899ccac81c0f27
5248         end4cc466ede8e64e415c899ccac81c0f27:
5249                 ;
5250         case OpAMD64MULB:
5251                 // match: (MULB x (MOVBconst [c]))
5252                 // cond:
5253                 // result: (MULBconst [c] x)
5254                 {
5255                         x := v.Args[0]
5256                         if v.Args[1].Op != OpAMD64MOVBconst {
5257                                 goto end66c6419213ddeb52b1c53fb589a70e5f
5258                         }
5259                         c := v.Args[1].AuxInt
5260                         v.Op = OpAMD64MULBconst
5261                         v.AuxInt = 0
5262                         v.Aux = nil
5263                         v.resetArgs()
5264                         v.AuxInt = c
5265                         v.AddArg(x)
5266                         return true
5267                 }
5268                 goto end66c6419213ddeb52b1c53fb589a70e5f
5269         end66c6419213ddeb52b1c53fb589a70e5f:
5270                 ;
5271                 // match: (MULB (MOVBconst [c]) x)
5272                 // cond:
5273                 // result: (MULBconst [c] x)
5274                 {
5275                         if v.Args[0].Op != OpAMD64MOVBconst {
5276                                 goto end7e82c8dbbba265b78035ca7df394bb06
5277                         }
5278                         c := v.Args[0].AuxInt
5279                         x := v.Args[1]
5280                         v.Op = OpAMD64MULBconst
5281                         v.AuxInt = 0
5282                         v.Aux = nil
5283                         v.resetArgs()
5284                         v.AuxInt = c
5285                         v.AddArg(x)
5286                         return true
5287                 }
5288                 goto end7e82c8dbbba265b78035ca7df394bb06
5289         end7e82c8dbbba265b78035ca7df394bb06:
5290                 ;
5291         case OpAMD64MULBconst:
5292                 // match: (MULBconst [c] (MOVBconst [d]))
5293                 // cond:
5294                 // result: (MOVBconst [c*d])
5295                 {
5296                         c := v.AuxInt
5297                         if v.Args[0].Op != OpAMD64MOVBconst {
5298                                 goto endf2db9f96016085f8cb4082b4af01b2aa
5299                         }
5300                         d := v.Args[0].AuxInt
5301                         v.Op = OpAMD64MOVBconst
5302                         v.AuxInt = 0
5303                         v.Aux = nil
5304                         v.resetArgs()
5305                         v.AuxInt = c * d
5306                         return true
5307                 }
5308                 goto endf2db9f96016085f8cb4082b4af01b2aa
5309         endf2db9f96016085f8cb4082b4af01b2aa:
5310                 ;
5311         case OpAMD64MULL:
5312                 // match: (MULL x (MOVLconst [c]))
5313                 // cond:
5314                 // result: (MULLconst [c] x)
5315                 {
5316                         x := v.Args[0]
5317                         if v.Args[1].Op != OpAMD64MOVLconst {
5318                                 goto end893477a261bcad6c2821b77c83075c6c
5319                         }
5320                         c := v.Args[1].AuxInt
5321                         v.Op = OpAMD64MULLconst
5322                         v.AuxInt = 0
5323                         v.Aux = nil
5324                         v.resetArgs()
5325                         v.AuxInt = c
5326                         v.AddArg(x)
5327                         return true
5328                 }
5329                 goto end893477a261bcad6c2821b77c83075c6c
5330         end893477a261bcad6c2821b77c83075c6c:
5331                 ;
5332                 // match: (MULL (MOVLconst [c]) x)
5333                 // cond:
5334                 // result: (MULLconst [c] x)
5335                 {
5336                         if v.Args[0].Op != OpAMD64MOVLconst {
5337                                 goto end8a0f957c528a54eecb0dbfc5d96e017a
5338                         }
5339                         c := v.Args[0].AuxInt
5340                         x := v.Args[1]
5341                         v.Op = OpAMD64MULLconst
5342                         v.AuxInt = 0
5343                         v.Aux = nil
5344                         v.resetArgs()
5345                         v.AuxInt = c
5346                         v.AddArg(x)
5347                         return true
5348                 }
5349                 goto end8a0f957c528a54eecb0dbfc5d96e017a
5350         end8a0f957c528a54eecb0dbfc5d96e017a:
5351                 ;
5352         case OpAMD64MULLconst:
5353                 // match: (MULLconst [c] (MOVLconst [d]))
5354                 // cond:
5355                 // result: (MOVLconst [c*d])
5356                 {
5357                         c := v.AuxInt
5358                         if v.Args[0].Op != OpAMD64MOVLconst {
5359                                 goto endd5732835ed1276ef8b728bcfc1289f73
5360                         }
5361                         d := v.Args[0].AuxInt
5362                         v.Op = OpAMD64MOVLconst
5363                         v.AuxInt = 0
5364                         v.Aux = nil
5365                         v.resetArgs()
5366                         v.AuxInt = c * d
5367                         return true
5368                 }
5369                 goto endd5732835ed1276ef8b728bcfc1289f73
5370         endd5732835ed1276ef8b728bcfc1289f73:
5371                 ;
5372         case OpAMD64MULQ:
5373                 // match: (MULQ x (MOVQconst [c]))
5374                 // cond: is32Bit(c)
5375                 // result: (MULQconst [c] x)
5376                 {
5377                         x := v.Args[0]
5378                         if v.Args[1].Op != OpAMD64MOVQconst {
5379                                 goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
5380                         }
5381                         c := v.Args[1].AuxInt
5382                         if !(is32Bit(c)) {
5383                                 goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
5384                         }
5385                         v.Op = OpAMD64MULQconst
5386                         v.AuxInt = 0
5387                         v.Aux = nil
5388                         v.resetArgs()
5389                         v.AuxInt = c
5390                         v.AddArg(x)
5391                         return true
5392                 }
5393                 goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
5394         endb38c6e3e0ddfa25ba0ef9684ac1528c0:
5395                 ;
5396                 // match: (MULQ (MOVQconst [c]) x)
5397                 // cond: is32Bit(c)
5398                 // result: (MULQconst [c] x)
5399                 {
5400                         if v.Args[0].Op != OpAMD64MOVQconst {
5401                                 goto end9cb4f29b0bd7141639416735dcbb3b87
5402                         }
5403                         c := v.Args[0].AuxInt
5404                         x := v.Args[1]
5405                         if !(is32Bit(c)) {
5406                                 goto end9cb4f29b0bd7141639416735dcbb3b87
5407                         }
5408                         v.Op = OpAMD64MULQconst
5409                         v.AuxInt = 0
5410                         v.Aux = nil
5411                         v.resetArgs()
5412                         v.AuxInt = c
5413                         v.AddArg(x)
5414                         return true
5415                 }
5416                 goto end9cb4f29b0bd7141639416735dcbb3b87
5417         end9cb4f29b0bd7141639416735dcbb3b87:
5418                 ;
5419         case OpAMD64MULQconst:
5420                 // match: (MULQconst [-1] x)
5421                 // cond:
5422                 // result: (NEGQ x)
5423                 {
5424                         if v.AuxInt != -1 {
5425                                 goto end82501cca6b5fb121a7f8b197e55f2fec
5426                         }
5427                         x := v.Args[0]
5428                         v.Op = OpAMD64NEGQ
5429                         v.AuxInt = 0
5430                         v.Aux = nil
5431                         v.resetArgs()
5432                         v.AddArg(x)
5433                         return true
5434                 }
5435                 goto end82501cca6b5fb121a7f8b197e55f2fec
5436         end82501cca6b5fb121a7f8b197e55f2fec:
5437                 ;
5438                 // match: (MULQconst [0] _)
5439                 // cond:
5440                 // result: (MOVQconst [0])
5441                 {
5442                         if v.AuxInt != 0 {
5443                                 goto endcb9faa068e3558ff44daaf1d47d091b5
5444                         }
5445                         v.Op = OpAMD64MOVQconst
5446                         v.AuxInt = 0
5447                         v.Aux = nil
5448                         v.resetArgs()
5449                         v.AuxInt = 0
5450                         return true
5451                 }
5452                 goto endcb9faa068e3558ff44daaf1d47d091b5
5453         endcb9faa068e3558ff44daaf1d47d091b5:
5454                 ;
5455                 // match: (MULQconst [1] x)
5456                 // cond:
5457                 // result: x
5458                 {
5459                         if v.AuxInt != 1 {
5460                                 goto end0b527e71db2b288b2841a1f757aa580d
5461                         }
5462                         x := v.Args[0]
5463                         v.Op = OpCopy
5464                         v.AuxInt = 0
5465                         v.Aux = nil
5466                         v.resetArgs()
5467                         v.Type = x.Type
5468                         v.AddArg(x)
5469                         return true
5470                 }
5471                 goto end0b527e71db2b288b2841a1f757aa580d
5472         end0b527e71db2b288b2841a1f757aa580d:
5473                 ;
5474                 // match: (MULQconst [3] x)
5475                 // cond:
5476                 // result: (LEAQ2 x x)
5477                 {
5478                         if v.AuxInt != 3 {
5479                                 goto end34a86f261671b5852bec6c57155fe0da
5480                         }
5481                         x := v.Args[0]
5482                         v.Op = OpAMD64LEAQ2
5483                         v.AuxInt = 0
5484                         v.Aux = nil
5485                         v.resetArgs()
5486                         v.AddArg(x)
5487                         v.AddArg(x)
5488                         return true
5489                 }
5490                 goto end34a86f261671b5852bec6c57155fe0da
5491         end34a86f261671b5852bec6c57155fe0da:
5492                 ;
5493                 // match: (MULQconst [5] x)
5494                 // cond:
5495                 // result: (LEAQ4 x x)
5496                 {
5497                         if v.AuxInt != 5 {
5498                                 goto end534601906c45a9171a9fec3e4b82b189
5499                         }
5500                         x := v.Args[0]
5501                         v.Op = OpAMD64LEAQ4
5502                         v.AuxInt = 0
5503                         v.Aux = nil
5504                         v.resetArgs()
5505                         v.AddArg(x)
5506                         v.AddArg(x)
5507                         return true
5508                 }
5509                 goto end534601906c45a9171a9fec3e4b82b189
5510         end534601906c45a9171a9fec3e4b82b189:
5511                 ;
5512                 // match: (MULQconst [9] x)
5513                 // cond:
5514                 // result: (LEAQ8 x x)
5515                 {
5516                         if v.AuxInt != 9 {
5517                                 goto end48a2280b6459821289c56073b8354997
5518                         }
5519                         x := v.Args[0]
5520                         v.Op = OpAMD64LEAQ8
5521                         v.AuxInt = 0
5522                         v.Aux = nil
5523                         v.resetArgs()
5524                         v.AddArg(x)
5525                         v.AddArg(x)
5526                         return true
5527                 }
5528                 goto end48a2280b6459821289c56073b8354997
5529         end48a2280b6459821289c56073b8354997:
5530                 ;
5531                 // match: (MULQconst [c] x)
5532                 // cond: isPowerOfTwo(c)
5533                 // result: (SHLQconst [log2(c)] x)
5534                 {
5535                         c := v.AuxInt
5536                         x := v.Args[0]
5537                         if !(isPowerOfTwo(c)) {
5538                                 goto end75076953dbfe022526a153eda99b39b2
5539                         }
5540                         v.Op = OpAMD64SHLQconst
5541                         v.AuxInt = 0
5542                         v.Aux = nil
5543                         v.resetArgs()
5544                         v.AuxInt = log2(c)
5545                         v.AddArg(x)
5546                         return true
5547                 }
5548                 goto end75076953dbfe022526a153eda99b39b2
5549         end75076953dbfe022526a153eda99b39b2:
5550                 ;
5551                 // match: (MULQconst [c] (MOVQconst [d]))
5552                 // cond:
5553                 // result: (MOVQconst [c*d])
5554                 {
5555                         c := v.AuxInt
5556                         if v.Args[0].Op != OpAMD64MOVQconst {
5557                                 goto end55c38c5c405101e610d7ba7fc702ddc0
5558                         }
5559                         d := v.Args[0].AuxInt
5560                         v.Op = OpAMD64MOVQconst
5561                         v.AuxInt = 0
5562                         v.Aux = nil
5563                         v.resetArgs()
5564                         v.AuxInt = c * d
5565                         return true
5566                 }
5567                 goto end55c38c5c405101e610d7ba7fc702ddc0
5568         end55c38c5c405101e610d7ba7fc702ddc0:
5569                 ;
5570         case OpAMD64MULW:
5571                 // match: (MULW x (MOVWconst [c]))
5572                 // cond:
5573                 // result: (MULWconst [c] x)
5574                 {
5575                         x := v.Args[0]
5576                         if v.Args[1].Op != OpAMD64MOVWconst {
5577                                 goto end542112cc08217d4bdffc1a645d290ffb
5578                         }
5579                         c := v.Args[1].AuxInt
5580                         v.Op = OpAMD64MULWconst
5581                         v.AuxInt = 0
5582                         v.Aux = nil
5583                         v.resetArgs()
5584                         v.AuxInt = c
5585                         v.AddArg(x)
5586                         return true
5587                 }
5588                 goto end542112cc08217d4bdffc1a645d290ffb
5589         end542112cc08217d4bdffc1a645d290ffb:
5590                 ;
5591                 // match: (MULW (MOVWconst [c]) x)
5592                 // cond:
5593                 // result: (MULWconst [c] x)
5594                 {
5595                         if v.Args[0].Op != OpAMD64MOVWconst {
5596                                 goto endd97b4245ced2b3d27d8c555b06281de4
5597                         }
5598                         c := v.Args[0].AuxInt
5599                         x := v.Args[1]
5600                         v.Op = OpAMD64MULWconst
5601                         v.AuxInt = 0
5602                         v.Aux = nil
5603                         v.resetArgs()
5604                         v.AuxInt = c
5605                         v.AddArg(x)
5606                         return true
5607                 }
5608                 goto endd97b4245ced2b3d27d8c555b06281de4
5609         endd97b4245ced2b3d27d8c555b06281de4:
5610                 ;
5611         case OpAMD64MULWconst:
5612                 // match: (MULWconst [c] (MOVWconst [d]))
5613                 // cond:
5614                 // result: (MOVWconst [c*d])
5615                 {
5616                         c := v.AuxInt
5617                         if v.Args[0].Op != OpAMD64MOVWconst {
5618                                 goto end61dbc9d9e93dd6946a20a1f475b3f74b
5619                         }
5620                         d := v.Args[0].AuxInt
5621                         v.Op = OpAMD64MOVWconst
5622                         v.AuxInt = 0
5623                         v.Aux = nil
5624                         v.resetArgs()
5625                         v.AuxInt = c * d
5626                         return true
5627                 }
5628                 goto end61dbc9d9e93dd6946a20a1f475b3f74b
5629         end61dbc9d9e93dd6946a20a1f475b3f74b:
5630                 ;
5631         case OpMod16:
5632                 // match: (Mod16 x y)
5633                 // cond:
5634                 // result: (MODW x y)
5635                 {
5636                         x := v.Args[0]
5637                         y := v.Args[1]
5638                         v.Op = OpAMD64MODW
5639                         v.AuxInt = 0
5640                         v.Aux = nil
5641                         v.resetArgs()
5642                         v.AddArg(x)
5643                         v.AddArg(y)
5644                         return true
5645                 }
5646                 goto end036bac694be9fe0d6b00b86c2e625990
5647         end036bac694be9fe0d6b00b86c2e625990:
5648                 ;
5649         case OpMod16u:
5650                 // match: (Mod16u x y)
5651                 // cond:
5652                 // result: (MODWU x y)
5653                 {
5654                         x := v.Args[0]
5655                         y := v.Args[1]
5656                         v.Op = OpAMD64MODWU
5657                         v.AuxInt = 0
5658                         v.Aux = nil
5659                         v.resetArgs()
5660                         v.AddArg(x)
5661                         v.AddArg(y)
5662                         return true
5663                 }
5664                 goto enda75d900097f1510ca1c6df786bef0c24
5665         enda75d900097f1510ca1c6df786bef0c24:
5666                 ;
5667         case OpMod32:
5668                 // match: (Mod32 x y)
5669                 // cond:
5670                 // result: (MODL x y)
5671                 {
5672                         x := v.Args[0]
5673                         y := v.Args[1]
5674                         v.Op = OpAMD64MODL
5675                         v.AuxInt = 0
5676                         v.Aux = nil
5677                         v.resetArgs()
5678                         v.AddArg(x)
5679                         v.AddArg(y)
5680                         return true
5681                 }
5682                 goto end12c8c0ecf3296810b8217cd4e40f7707
5683         end12c8c0ecf3296810b8217cd4e40f7707:
5684                 ;
5685         case OpMod32u:
5686                 // match: (Mod32u x y)
5687                 // cond:
5688                 // result: (MODLU x y)
5689                 {
5690                         x := v.Args[0]
5691                         y := v.Args[1]
5692                         v.Op = OpAMD64MODLU
5693                         v.AuxInt = 0
5694                         v.Aux = nil
5695                         v.resetArgs()
5696                         v.AddArg(x)
5697                         v.AddArg(y)
5698                         return true
5699                 }
5700                 goto end1f0892076cfd58733a08d3ab175a3c1c
5701         end1f0892076cfd58733a08d3ab175a3c1c:
5702                 ;
5703         case OpMod64:
5704                 // match: (Mod64 x y)
5705                 // cond:
5706                 // result: (MODQ x y)
5707                 {
5708                         x := v.Args[0]
5709                         y := v.Args[1]
5710                         v.Op = OpAMD64MODQ
5711                         v.AuxInt = 0
5712                         v.Aux = nil
5713                         v.resetArgs()
5714                         v.AddArg(x)
5715                         v.AddArg(y)
5716                         return true
5717                 }
5718                 goto endaae75f449baf5dc108be4e0439af97f2
5719         endaae75f449baf5dc108be4e0439af97f2:
5720                 ;
5721         case OpMod64u:
5722                 // match: (Mod64u x y)
5723                 // cond:
5724                 // result: (MODQU x y)
5725                 {
5726                         x := v.Args[0]
5727                         y := v.Args[1]
5728                         v.Op = OpAMD64MODQU
5729                         v.AuxInt = 0
5730                         v.Aux = nil
5731                         v.resetArgs()
5732                         v.AddArg(x)
5733                         v.AddArg(y)
5734                         return true
5735                 }
5736                 goto end0d4c8b9df77e59289fb14e2496559d1d
5737         end0d4c8b9df77e59289fb14e2496559d1d:
5738                 ;
5739         case OpMod8:
5740                 // match: (Mod8 x y)
5741                 // cond:
5742                 // result: (MODW (SignExt8to16 x) (SignExt8to16 y))
5743                 {
5744                         x := v.Args[0]
5745                         y := v.Args[1]
5746                         v.Op = OpAMD64MODW
5747                         v.AuxInt = 0
5748                         v.Aux = nil
5749                         v.resetArgs()
5750                         v0 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
5751                         v0.AddArg(x)
5752                         v0.Type = config.fe.TypeInt16()
5753                         v.AddArg(v0)
5754                         v1 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
5755                         v1.AddArg(y)
5756                         v1.Type = config.fe.TypeInt16()
5757                         v.AddArg(v1)
5758                         return true
5759                 }
5760                 goto endf959fc16e72bc6dc47ab7c9ee3778901
5761         endf959fc16e72bc6dc47ab7c9ee3778901:
5762                 ;
5763         case OpMod8u:
5764                 // match: (Mod8u x y)
5765                 // cond:
5766                 // result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y))
5767                 {
5768                         x := v.Args[0]
5769                         y := v.Args[1]
5770                         v.Op = OpAMD64MODWU
5771                         v.AuxInt = 0
5772                         v.Aux = nil
5773                         v.resetArgs()
5774                         v0 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
5775                         v0.AddArg(x)
5776                         v0.Type = config.fe.TypeUInt16()
5777                         v.AddArg(v0)
5778                         v1 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
5779                         v1.AddArg(y)
5780                         v1.Type = config.fe.TypeUInt16()
5781                         v.AddArg(v1)
5782                         return true
5783                 }
5784                 goto end9b3274d9dd7f1e91c75ce5e7b548fe97
5785         end9b3274d9dd7f1e91c75ce5e7b548fe97:
5786                 ;
5787         case OpMove:
5788                 // match: (Move [size] dst src mem)
5789                 // cond:
5790                 // result: (REPMOVSB dst src (MOVQconst <config.Frontend().TypeUInt64()> [size]) mem)
5791                 {
5792                         size := v.AuxInt
5793                         dst := v.Args[0]
5794                         src := v.Args[1]
5795                         mem := v.Args[2]
5796                         v.Op = OpAMD64REPMOVSB
5797                         v.AuxInt = 0
5798                         v.Aux = nil
5799                         v.resetArgs()
5800                         v.AddArg(dst)
5801                         v.AddArg(src)
5802                         v0 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
5803                         v0.Type = config.Frontend().TypeUInt64()
5804                         v0.AuxInt = size
5805                         v.AddArg(v0)
5806                         v.AddArg(mem)
5807                         return true
5808                 }
5809                 goto end4dd156b33beb9981378c91e46f055a56
5810         end4dd156b33beb9981378c91e46f055a56:
5811                 ;
5812         case OpMul16:
5813                 // match: (Mul16 x y)
5814                 // cond:
5815                 // result: (MULW x y)
5816                 {
5817                         x := v.Args[0]
5818                         y := v.Args[1]
5819                         v.Op = OpAMD64MULW
5820                         v.AuxInt = 0
5821                         v.Aux = nil
5822                         v.resetArgs()
5823                         v.AddArg(x)
5824                         v.AddArg(y)
5825                         return true
5826                 }
5827                 goto end1addf5ea2c885aa1729b8f944859d00c
5828         end1addf5ea2c885aa1729b8f944859d00c:
5829                 ;
5830         case OpMul32:
5831                 // match: (Mul32 x y)
5832                 // cond:
5833                 // result: (MULL x y)
5834                 {
5835                         x := v.Args[0]
5836                         y := v.Args[1]
5837                         v.Op = OpAMD64MULL
5838                         v.AuxInt = 0
5839                         v.Aux = nil
5840                         v.resetArgs()
5841                         v.AddArg(x)
5842                         v.AddArg(y)
5843                         return true
5844                 }
5845                 goto ende144381f85808e5144782804768e2859
5846         ende144381f85808e5144782804768e2859:
5847                 ;
5848         case OpMul32F:
5849                 // match: (Mul32F x y)
5850                 // cond:
5851                 // result: (MULSS x y)
5852                 {
5853                         x := v.Args[0]
5854                         y := v.Args[1]
5855                         v.Op = OpAMD64MULSS
5856                         v.AuxInt = 0
5857                         v.Aux = nil
5858                         v.resetArgs()
5859                         v.AddArg(x)
5860                         v.AddArg(y)
5861                         return true
5862                 }
5863                 goto end32105a3bfe0237b799b69d83b3f171ca
5864         end32105a3bfe0237b799b69d83b3f171ca:
5865                 ;
5866         case OpMul64:
5867                 // match: (Mul64 x y)
5868                 // cond:
5869                 // result: (MULQ x y)
5870                 {
5871                         x := v.Args[0]
5872                         y := v.Args[1]
5873                         v.Op = OpAMD64MULQ
5874                         v.AuxInt = 0
5875                         v.Aux = nil
5876                         v.resetArgs()
5877                         v.AddArg(x)
5878                         v.AddArg(y)
5879                         return true
5880                 }
5881                 goto end38da21e77ac329eb643b20e7d97d5853
5882         end38da21e77ac329eb643b20e7d97d5853:
5883                 ;
5884         case OpMul64F:
5885                 // match: (Mul64F x y)
5886                 // cond:
5887                 // result: (MULSD x y)
5888                 {
5889                         x := v.Args[0]
5890                         y := v.Args[1]
5891                         v.Op = OpAMD64MULSD
5892                         v.AuxInt = 0
5893                         v.Aux = nil
5894                         v.resetArgs()
5895                         v.AddArg(x)
5896                         v.AddArg(y)
5897                         return true
5898                 }
5899                 goto end0ff6e1919fb0a3e549eb82b43edf1f52
5900         end0ff6e1919fb0a3e549eb82b43edf1f52:
5901                 ;
5902         case OpMul8:
5903                 // match: (Mul8 x y)
5904                 // cond:
5905                 // result: (MULB x y)
5906                 {
5907                         x := v.Args[0]
5908                         y := v.Args[1]
5909                         v.Op = OpAMD64MULB
5910                         v.AuxInt = 0
5911                         v.Aux = nil
5912                         v.resetArgs()
5913                         v.AddArg(x)
5914                         v.AddArg(y)
5915                         return true
5916                 }
5917                 goto endd876d6bc42a2285b801f42dadbd8757c
5918         endd876d6bc42a2285b801f42dadbd8757c:
5919                 ;
5920         case OpMulPtr:
5921                 // match: (MulPtr x y)
5922                 // cond:
5923                 // result: (MULQ x y)
5924                 {
5925                         x := v.Args[0]
5926                         y := v.Args[1]
5927                         v.Op = OpAMD64MULQ
5928                         v.AuxInt = 0
5929                         v.Aux = nil
5930                         v.resetArgs()
5931                         v.AddArg(x)
5932                         v.AddArg(y)
5933                         return true
5934                 }
5935                 goto endbbedad106c011a93243e2062afdcc75f
5936         endbbedad106c011a93243e2062afdcc75f:
5937                 ;
5938         case OpAMD64NEGB:
5939                 // match: (NEGB (MOVBconst [c]))
5940                 // cond:
5941                 // result: (MOVBconst [-c])
5942                 {
5943                         if v.Args[0].Op != OpAMD64MOVBconst {
5944                                 goto end36d0300ba9eab8c9da86246ff653ca96
5945                         }
5946                         c := v.Args[0].AuxInt
5947                         v.Op = OpAMD64MOVBconst
5948                         v.AuxInt = 0
5949                         v.Aux = nil
5950                         v.resetArgs()
5951                         v.AuxInt = -c
5952                         return true
5953                 }
5954                 goto end36d0300ba9eab8c9da86246ff653ca96
5955         end36d0300ba9eab8c9da86246ff653ca96:
5956                 ;
5957         case OpAMD64NEGL:
5958                 // match: (NEGL (MOVLconst [c]))
5959                 // cond:
5960                 // result: (MOVLconst [-c])
5961                 {
5962                         if v.Args[0].Op != OpAMD64MOVLconst {
5963                                 goto end7a245ec67e56bd51911e5ba2d0aa0a16
5964                         }
5965                         c := v.Args[0].AuxInt
5966                         v.Op = OpAMD64MOVLconst
5967                         v.AuxInt = 0
5968                         v.Aux = nil
5969                         v.resetArgs()
5970                         v.AuxInt = -c
5971                         return true
5972                 }
5973                 goto end7a245ec67e56bd51911e5ba2d0aa0a16
5974         end7a245ec67e56bd51911e5ba2d0aa0a16:
5975                 ;
5976         case OpAMD64NEGQ:
5977                 // match: (NEGQ (MOVQconst [c]))
5978                 // cond:
5979                 // result: (MOVQconst [-c])
5980                 {
5981                         if v.Args[0].Op != OpAMD64MOVQconst {
5982                                 goto end04ddd98bc6724ecb85c80c2a4e2bca5a
5983                         }
5984                         c := v.Args[0].AuxInt
5985                         v.Op = OpAMD64MOVQconst
5986                         v.AuxInt = 0
5987                         v.Aux = nil
5988                         v.resetArgs()
5989                         v.AuxInt = -c
5990                         return true
5991                 }
5992                 goto end04ddd98bc6724ecb85c80c2a4e2bca5a
5993         end04ddd98bc6724ecb85c80c2a4e2bca5a:
5994                 ;
5995         case OpAMD64NEGW:
5996                 // match: (NEGW (MOVWconst [c]))
5997                 // cond:
5998                 // result: (MOVWconst [-c])
5999                 {
6000                         if v.Args[0].Op != OpAMD64MOVWconst {
6001                                 goto end1db6636f0a51848d8a34f6561ecfe7ae
6002                         }
6003                         c := v.Args[0].AuxInt
6004                         v.Op = OpAMD64MOVWconst
6005                         v.AuxInt = 0
6006                         v.Aux = nil
6007                         v.resetArgs()
6008                         v.AuxInt = -c
6009                         return true
6010                 }
6011                 goto end1db6636f0a51848d8a34f6561ecfe7ae
6012         end1db6636f0a51848d8a34f6561ecfe7ae:
6013                 ;
6014         case OpAMD64NOTB:
6015                 // match: (NOTB (MOVBconst [c]))
6016                 // cond:
6017                 // result: (MOVBconst [^c])
6018                 {
6019                         if v.Args[0].Op != OpAMD64MOVBconst {
6020                                 goto end9e383a9ceb29a9e2bf890ec6a67212a8
6021                         }
6022                         c := v.Args[0].AuxInt
6023                         v.Op = OpAMD64MOVBconst
6024                         v.AuxInt = 0
6025                         v.Aux = nil
6026                         v.resetArgs()
6027                         v.AuxInt = ^c
6028                         return true
6029                 }
6030                 goto end9e383a9ceb29a9e2bf890ec6a67212a8
6031         end9e383a9ceb29a9e2bf890ec6a67212a8:
6032                 ;
6033         case OpAMD64NOTL:
6034                 // match: (NOTL (MOVLconst [c]))
6035                 // cond:
6036                 // result: (MOVLconst [^c])
6037                 {
6038                         if v.Args[0].Op != OpAMD64MOVLconst {
6039                                 goto endcc73972c088d5e652a1370a96e56502d
6040                         }
6041                         c := v.Args[0].AuxInt
6042                         v.Op = OpAMD64MOVLconst
6043                         v.AuxInt = 0
6044                         v.Aux = nil
6045                         v.resetArgs()
6046                         v.AuxInt = ^c
6047                         return true
6048                 }
6049                 goto endcc73972c088d5e652a1370a96e56502d
6050         endcc73972c088d5e652a1370a96e56502d:
6051                 ;
6052         case OpAMD64NOTQ:
6053                 // match: (NOTQ (MOVQconst [c]))
6054                 // cond:
6055                 // result: (MOVQconst [^c])
6056                 {
6057                         if v.Args[0].Op != OpAMD64MOVQconst {
6058                                 goto endb39ddb6bf7339d46f74114baad4333b6
6059                         }
6060                         c := v.Args[0].AuxInt
6061                         v.Op = OpAMD64MOVQconst
6062                         v.AuxInt = 0
6063                         v.Aux = nil
6064                         v.resetArgs()
6065                         v.AuxInt = ^c
6066                         return true
6067                 }
6068                 goto endb39ddb6bf7339d46f74114baad4333b6
6069         endb39ddb6bf7339d46f74114baad4333b6:
6070                 ;
6071         case OpAMD64NOTW:
6072                 // match: (NOTW (MOVWconst [c]))
6073                 // cond:
6074                 // result: (MOVWconst [^c])
6075                 {
6076                         if v.Args[0].Op != OpAMD64MOVWconst {
6077                                 goto end35848095ebcf894c6957ad3be5f82c43
6078                         }
6079                         c := v.Args[0].AuxInt
6080                         v.Op = OpAMD64MOVWconst
6081                         v.AuxInt = 0
6082                         v.Aux = nil
6083                         v.resetArgs()
6084                         v.AuxInt = ^c
6085                         return true
6086                 }
6087                 goto end35848095ebcf894c6957ad3be5f82c43
6088         end35848095ebcf894c6957ad3be5f82c43:
6089                 ;
6090         case OpNeg16:
6091                 // match: (Neg16 x)
6092                 // cond:
6093                 // result: (NEGW x)
6094                 {
6095                         x := v.Args[0]
6096                         v.Op = OpAMD64NEGW
6097                         v.AuxInt = 0
6098                         v.Aux = nil
6099                         v.resetArgs()
6100                         v.AddArg(x)
6101                         return true
6102                 }
6103                 goto end7a8c652f4ffeb49656119af69512edb2
6104         end7a8c652f4ffeb49656119af69512edb2:
6105                 ;
6106         case OpNeg32:
6107                 // match: (Neg32 x)
6108                 // cond:
6109                 // result: (NEGL x)
6110                 {
6111                         x := v.Args[0]
6112                         v.Op = OpAMD64NEGL
6113                         v.AuxInt = 0
6114                         v.Aux = nil
6115                         v.resetArgs()
6116                         v.AddArg(x)
6117                         return true
6118                 }
6119                 goto endce1f7e17fc193f6c076e47d5e401e126
6120         endce1f7e17fc193f6c076e47d5e401e126:
6121                 ;
6122         case OpNeg32F:
6123                 // match: (Neg32F x)
6124                 // cond:
6125                 // result: (PXOR x (MOVSSconst <config.Frontend().TypeFloat32()> [f2i(math.Copysign(0, -1))]))
6126                 {
6127                         x := v.Args[0]
6128                         v.Op = OpAMD64PXOR
6129                         v.AuxInt = 0
6130                         v.Aux = nil
6131                         v.resetArgs()
6132                         v.AddArg(x)
6133                         v0 := b.NewValue0(v.Line, OpAMD64MOVSSconst, TypeInvalid)
6134                         v0.Type = config.Frontend().TypeFloat32()
6135                         v0.AuxInt = f2i(math.Copysign(0, -1))
6136                         v.AddArg(v0)
6137                         return true
6138                 }
6139                 goto end685a5fc899e195b9091afbe2a7146051
6140         end685a5fc899e195b9091afbe2a7146051:
6141                 ;
6142         case OpNeg64:
6143                 // match: (Neg64 x)
6144                 // cond:
6145                 // result: (NEGQ x)
6146                 {
6147                         x := v.Args[0]
6148                         v.Op = OpAMD64NEGQ
6149                         v.AuxInt = 0
6150                         v.Aux = nil
6151                         v.resetArgs()
6152                         v.AddArg(x)
6153                         return true
6154                 }
6155                 goto enda06c5b1718f2b96aba10bf5a5c437c6c
6156         enda06c5b1718f2b96aba10bf5a5c437c6c:
6157                 ;
6158         case OpNeg64F:
6159                 // match: (Neg64F x)
6160                 // cond:
6161                 // result: (PXOR x (MOVSDconst <config.Frontend().TypeFloat64()> [f2i(math.Copysign(0, -1))]))
6162                 {
6163                         x := v.Args[0]
6164                         v.Op = OpAMD64PXOR
6165                         v.AuxInt = 0
6166                         v.Aux = nil
6167                         v.resetArgs()
6168                         v.AddArg(x)
6169                         v0 := b.NewValue0(v.Line, OpAMD64MOVSDconst, TypeInvalid)
6170                         v0.Type = config.Frontend().TypeFloat64()
6171                         v0.AuxInt = f2i(math.Copysign(0, -1))
6172                         v.AddArg(v0)
6173                         return true
6174                 }
6175                 goto ende85ae82b7a51e75000eb9158d584acb2
6176         ende85ae82b7a51e75000eb9158d584acb2:
6177                 ;
6178         case OpNeg8:
6179                 // match: (Neg8 x)
6180                 // cond:
6181                 // result: (NEGB x)
6182                 {
6183                         x := v.Args[0]
6184                         v.Op = OpAMD64NEGB
6185                         v.AuxInt = 0
6186                         v.Aux = nil
6187                         v.resetArgs()
6188                         v.AddArg(x)
6189                         return true
6190                 }
6191                 goto end1e5f495a2ac6cdea47b1ae5ba62aa95d
6192         end1e5f495a2ac6cdea47b1ae5ba62aa95d:
6193                 ;
6194         case OpNeq16:
6195                 // match: (Neq16 x y)
6196                 // cond:
6197                 // result: (SETNE (CMPW x y))
6198                 {
6199                         x := v.Args[0]
6200                         y := v.Args[1]
6201                         v.Op = OpAMD64SETNE
6202                         v.AuxInt = 0
6203                         v.Aux = nil
6204                         v.resetArgs()
6205                         v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
6206                         v0.AddArg(x)
6207                         v0.AddArg(y)
6208                         v0.Type = TypeFlags
6209                         v.AddArg(v0)
6210                         return true
6211                 }
6212                 goto end6413ee42d523a005cce9e3372ff2c8e9
6213         end6413ee42d523a005cce9e3372ff2c8e9:
6214                 ;
6215         case OpNeq32:
6216                 // match: (Neq32 x y)
6217                 // cond:
6218                 // result: (SETNE (CMPL x y))
6219                 {
6220                         x := v.Args[0]
6221                         y := v.Args[1]
6222                         v.Op = OpAMD64SETNE
6223                         v.AuxInt = 0
6224                         v.Aux = nil
6225                         v.resetArgs()
6226                         v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
6227                         v0.AddArg(x)
6228                         v0.AddArg(y)
6229                         v0.Type = TypeFlags
6230                         v.AddArg(v0)
6231                         return true
6232                 }
6233                 goto endb1a3ad499a09d8262952e6cbc47a23a8
6234         endb1a3ad499a09d8262952e6cbc47a23a8:
6235                 ;
6236         case OpNeq32F:
6237                 // match: (Neq32F x y)
6238                 // cond:
6239                 // result: (SETNEF (UCOMISS x y))
6240                 {
6241                         x := v.Args[0]
6242                         y := v.Args[1]
6243                         v.Op = OpAMD64SETNEF
6244                         v.AuxInt = 0
6245                         v.Aux = nil
6246                         v.resetArgs()
6247                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
6248                         v0.AddArg(x)
6249                         v0.AddArg(y)
6250                         v0.Type = TypeFlags
6251                         v.AddArg(v0)
6252                         return true
6253                 }
6254                 goto end2a001b2774f58aaf8c1e9efce6ae59e7
6255         end2a001b2774f58aaf8c1e9efce6ae59e7:
6256                 ;
6257         case OpNeq64:
6258                 // match: (Neq64 x y)
6259                 // cond:
6260                 // result: (SETNE (CMPQ x y))
6261                 {
6262                         x := v.Args[0]
6263                         y := v.Args[1]
6264                         v.Op = OpAMD64SETNE
6265                         v.AuxInt = 0
6266                         v.Aux = nil
6267                         v.resetArgs()
6268                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
6269                         v0.AddArg(x)
6270                         v0.AddArg(y)
6271                         v0.Type = TypeFlags
6272                         v.AddArg(v0)
6273                         return true
6274                 }
6275                 goto end092b9159bce08d2ef7896f7d3da5a595
6276         end092b9159bce08d2ef7896f7d3da5a595:
6277                 ;
6278         case OpNeq64F:
6279                 // match: (Neq64F x y)
6280                 // cond:
6281                 // result: (SETNEF (UCOMISD x y))
6282                 {
6283                         x := v.Args[0]
6284                         y := v.Args[1]
6285                         v.Op = OpAMD64SETNEF
6286                         v.AuxInt = 0
6287                         v.Aux = nil
6288                         v.resetArgs()
6289                         v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
6290                         v0.AddArg(x)
6291                         v0.AddArg(y)
6292                         v0.Type = TypeFlags
6293                         v.AddArg(v0)
6294                         return true
6295                 }
6296                 goto endb9c010023c38bd2fee7800fbefc85d98
6297         endb9c010023c38bd2fee7800fbefc85d98:
6298                 ;
6299         case OpNeq8:
6300                 // match: (Neq8 x y)
6301                 // cond:
6302                 // result: (SETNE (CMPB x y))
6303                 {
6304                         x := v.Args[0]
6305                         y := v.Args[1]
6306                         v.Op = OpAMD64SETNE
6307                         v.AuxInt = 0
6308                         v.Aux = nil
6309                         v.resetArgs()
6310                         v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
6311                         v0.AddArg(x)
6312                         v0.AddArg(y)
6313                         v0.Type = TypeFlags
6314                         v.AddArg(v0)
6315                         return true
6316                 }
6317                 goto end89e59f45e068c89458cc4db1692bf3bb
6318         end89e59f45e068c89458cc4db1692bf3bb:
6319                 ;
6320         case OpNeqPtr:
6321                 // match: (NeqPtr x y)
6322                 // cond:
6323                 // result: (SETNE (CMPQ x y))
6324                 {
6325                         x := v.Args[0]
6326                         y := v.Args[1]
6327                         v.Op = OpAMD64SETNE
6328                         v.AuxInt = 0
6329                         v.Aux = nil
6330                         v.resetArgs()
6331                         v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
6332                         v0.AddArg(x)
6333                         v0.AddArg(y)
6334                         v0.Type = TypeFlags
6335                         v.AddArg(v0)
6336                         return true
6337                 }
6338                 goto end3b8bb3b4952011d1d40f993d8717cf16
6339         end3b8bb3b4952011d1d40f993d8717cf16:
6340                 ;
6341         case OpNot:
6342                 // match: (Not x)
6343                 // cond:
6344                 // result: (XORBconst [1] x)
6345                 {
6346                         x := v.Args[0]
6347                         v.Op = OpAMD64XORBconst
6348                         v.AuxInt = 0
6349                         v.Aux = nil
6350                         v.resetArgs()
6351                         v.AuxInt = 1
6352                         v.AddArg(x)
6353                         return true
6354                 }
6355                 goto end73973101aad60079c62fa64624e21db1
6356         end73973101aad60079c62fa64624e21db1:
6357                 ;
6358         case OpAMD64ORB:
6359                 // match: (ORB x (MOVBconst [c]))
6360                 // cond:
6361                 // result: (ORBconst [c] x)
6362                 {
6363                         x := v.Args[0]
6364                         if v.Args[1].Op != OpAMD64MOVBconst {
6365                                 goto end7b63870decde2515cb77ec4f8f76817c
6366                         }
6367                         c := v.Args[1].AuxInt
6368                         v.Op = OpAMD64ORBconst
6369                         v.AuxInt = 0
6370                         v.Aux = nil
6371                         v.resetArgs()
6372                         v.AuxInt = c
6373                         v.AddArg(x)
6374                         return true
6375                 }
6376                 goto end7b63870decde2515cb77ec4f8f76817c
6377         end7b63870decde2515cb77ec4f8f76817c:
6378                 ;
6379                 // match: (ORB (MOVBconst [c]) x)
6380                 // cond:
6381                 // result: (ORBconst [c] x)
6382                 {
6383                         if v.Args[0].Op != OpAMD64MOVBconst {
6384                                 goto end70b43d531e2097a4f6293f66256a642e
6385                         }
6386                         c := v.Args[0].AuxInt
6387                         x := v.Args[1]
6388                         v.Op = OpAMD64ORBconst
6389                         v.AuxInt = 0
6390                         v.Aux = nil
6391                         v.resetArgs()
6392                         v.AuxInt = c
6393                         v.AddArg(x)
6394                         return true
6395                 }
6396                 goto end70b43d531e2097a4f6293f66256a642e
6397         end70b43d531e2097a4f6293f66256a642e:
6398                 ;
6399                 // match: (ORB x x)
6400                 // cond:
6401                 // result: x
6402                 {
6403                         x := v.Args[0]
6404                         if v.Args[1] != x {
6405                                 goto enddca5ce800a9eca157f243cb2fdb1408a
6406                         }
6407                         v.Op = OpCopy
6408                         v.AuxInt = 0
6409                         v.Aux = nil
6410                         v.resetArgs()
6411                         v.Type = x.Type
6412                         v.AddArg(x)
6413                         return true
6414                 }
6415                 goto enddca5ce800a9eca157f243cb2fdb1408a
6416         enddca5ce800a9eca157f243cb2fdb1408a:
6417                 ;
6418         case OpAMD64ORBconst:
6419                 // match: (ORBconst [c] x)
6420                 // cond: int8(c)==0
6421                 // result: x
6422                 {
6423                         c := v.AuxInt
6424                         x := v.Args[0]
6425                         if !(int8(c) == 0) {
6426                                 goto end565f78e3a843dc73943b59227b39a1b3
6427                         }
6428                         v.Op = OpCopy
6429                         v.AuxInt = 0
6430                         v.Aux = nil
6431                         v.resetArgs()
6432                         v.Type = x.Type
6433                         v.AddArg(x)
6434                         return true
6435                 }
6436                 goto end565f78e3a843dc73943b59227b39a1b3
6437         end565f78e3a843dc73943b59227b39a1b3:
6438                 ;
6439                 // match: (ORBconst [c] _)
6440                 // cond: int8(c)==-1
6441                 // result: (MOVBconst [-1])
6442                 {
6443                         c := v.AuxInt
6444                         if !(int8(c) == -1) {
6445                                 goto end6033c7910d8cd536b31446e179e4610d
6446                         }
6447                         v.Op = OpAMD64MOVBconst
6448                         v.AuxInt = 0
6449                         v.Aux = nil
6450                         v.resetArgs()
6451                         v.AuxInt = -1
6452                         return true
6453                 }
6454                 goto end6033c7910d8cd536b31446e179e4610d
6455         end6033c7910d8cd536b31446e179e4610d:
6456                 ;
6457                 // match: (ORBconst [c] (MOVBconst [d]))
6458                 // cond:
6459                 // result: (MOVBconst [c|d])
6460                 {
6461                         c := v.AuxInt
6462                         if v.Args[0].Op != OpAMD64MOVBconst {
6463                                 goto endbe5263f022dc10a5cf53c118937d79dd
6464                         }
6465                         d := v.Args[0].AuxInt
6466                         v.Op = OpAMD64MOVBconst
6467                         v.AuxInt = 0
6468                         v.Aux = nil
6469                         v.resetArgs()
6470                         v.AuxInt = c | d
6471                         return true
6472                 }
6473                 goto endbe5263f022dc10a5cf53c118937d79dd
6474         endbe5263f022dc10a5cf53c118937d79dd:
6475                 ;
6476         case OpAMD64ORL:
6477                 // match: (ORL x (MOVLconst [c]))
6478                 // cond:
6479                 // result: (ORLconst [c] x)
6480                 {
6481                         x := v.Args[0]
6482                         if v.Args[1].Op != OpAMD64MOVLconst {
6483                                 goto end1b883e30d860b6fac14ae98462c4f61a
6484                         }
6485                         c := v.Args[1].AuxInt
6486                         v.Op = OpAMD64ORLconst
6487                         v.AuxInt = 0
6488                         v.Aux = nil
6489                         v.resetArgs()
6490                         v.AuxInt = c
6491                         v.AddArg(x)
6492                         return true
6493                 }
6494                 goto end1b883e30d860b6fac14ae98462c4f61a
6495         end1b883e30d860b6fac14ae98462c4f61a:
6496                 ;
6497                 // match: (ORL (MOVLconst [c]) x)
6498                 // cond:
6499                 // result: (ORLconst [c] x)
6500                 {
6501                         if v.Args[0].Op != OpAMD64MOVLconst {
6502                                 goto enda5bc49524a0cbd2241f792837d0a48a8
6503                         }
6504                         c := v.Args[0].AuxInt
6505                         x := v.Args[1]
6506                         v.Op = OpAMD64ORLconst
6507                         v.AuxInt = 0
6508                         v.Aux = nil
6509                         v.resetArgs()
6510                         v.AuxInt = c
6511                         v.AddArg(x)
6512                         return true
6513                 }
6514                 goto enda5bc49524a0cbd2241f792837d0a48a8
6515         enda5bc49524a0cbd2241f792837d0a48a8:
6516                 ;
6517                 // match: (ORL x x)
6518                 // cond:
6519                 // result: x
6520                 {
6521                         x := v.Args[0]
6522                         if v.Args[1] != x {
6523                                 goto end2dd719b68f4938777ef0d820aab93659
6524                         }
6525                         v.Op = OpCopy
6526                         v.AuxInt = 0
6527                         v.Aux = nil
6528                         v.resetArgs()
6529                         v.Type = x.Type
6530                         v.AddArg(x)
6531                         return true
6532                 }
6533                 goto end2dd719b68f4938777ef0d820aab93659
6534         end2dd719b68f4938777ef0d820aab93659:
6535                 ;
6536         case OpAMD64ORLconst:
6537                 // match: (ORLconst [c] x)
6538                 // cond: int32(c)==0
6539                 // result: x
6540                 {
6541                         c := v.AuxInt
6542                         x := v.Args[0]
6543                         if !(int32(c) == 0) {
6544                                 goto end5b52623a724e8a7167c71289fb7192f1
6545                         }
6546                         v.Op = OpCopy
6547                         v.AuxInt = 0
6548                         v.Aux = nil
6549                         v.resetArgs()
6550                         v.Type = x.Type
6551                         v.AddArg(x)
6552                         return true
6553                 }
6554                 goto end5b52623a724e8a7167c71289fb7192f1
6555         end5b52623a724e8a7167c71289fb7192f1:
6556                 ;
6557                 // match: (ORLconst [c] _)
6558                 // cond: int32(c)==-1
6559                 // result: (MOVLconst [-1])
6560                 {
6561                         c := v.AuxInt
6562                         if !(int32(c) == -1) {
6563                                 goto end345a8ea439ef2ef54bd84fc8a0f73e97
6564                         }
6565                         v.Op = OpAMD64MOVLconst
6566                         v.AuxInt = 0
6567                         v.Aux = nil
6568                         v.resetArgs()
6569                         v.AuxInt = -1
6570                         return true
6571                 }
6572                 goto end345a8ea439ef2ef54bd84fc8a0f73e97
6573         end345a8ea439ef2ef54bd84fc8a0f73e97:
6574                 ;
6575                 // match: (ORLconst [c] (MOVLconst [d]))
6576                 // cond:
6577                 // result: (MOVLconst [c|d])
6578                 {
6579                         c := v.AuxInt
6580                         if v.Args[0].Op != OpAMD64MOVLconst {
6581                                 goto ende9ca05024248f782c88084715f81d727
6582                         }
6583                         d := v.Args[0].AuxInt
6584                         v.Op = OpAMD64MOVLconst
6585                         v.AuxInt = 0
6586                         v.Aux = nil
6587                         v.resetArgs()
6588                         v.AuxInt = c | d
6589                         return true
6590                 }
6591                 goto ende9ca05024248f782c88084715f81d727
6592         ende9ca05024248f782c88084715f81d727:
6593                 ;
6594         case OpAMD64ORQ:
6595                 // match: (ORQ x (MOVQconst [c]))
6596                 // cond: is32Bit(c)
6597                 // result: (ORQconst [c] x)
6598                 {
6599                         x := v.Args[0]
6600                         if v.Args[1].Op != OpAMD64MOVQconst {
6601                                 goto end601f2bb3ccda102e484ff60adeaf6d26
6602                         }
6603                         c := v.Args[1].AuxInt
6604                         if !(is32Bit(c)) {
6605                                 goto end601f2bb3ccda102e484ff60adeaf6d26
6606                         }
6607                         v.Op = OpAMD64ORQconst
6608                         v.AuxInt = 0
6609                         v.Aux = nil
6610                         v.resetArgs()
6611                         v.AuxInt = c
6612                         v.AddArg(x)
6613                         return true
6614                 }
6615                 goto end601f2bb3ccda102e484ff60adeaf6d26
6616         end601f2bb3ccda102e484ff60adeaf6d26:
6617                 ;
6618                 // match: (ORQ (MOVQconst [c]) x)
6619                 // cond: is32Bit(c)
6620                 // result: (ORQconst [c] x)
6621                 {
6622                         if v.Args[0].Op != OpAMD64MOVQconst {
6623                                 goto end010afbebcd314e288509d79a16a6d5cc
6624                         }
6625                         c := v.Args[0].AuxInt
6626                         x := v.Args[1]
6627                         if !(is32Bit(c)) {
6628                                 goto end010afbebcd314e288509d79a16a6d5cc
6629                         }
6630                         v.Op = OpAMD64ORQconst
6631                         v.AuxInt = 0
6632                         v.Aux = nil
6633                         v.resetArgs()
6634                         v.AuxInt = c
6635                         v.AddArg(x)
6636                         return true
6637                 }
6638                 goto end010afbebcd314e288509d79a16a6d5cc
6639         end010afbebcd314e288509d79a16a6d5cc:
6640                 ;
6641                 // match: (ORQ x x)
6642                 // cond:
6643                 // result: x
6644                 {
6645                         x := v.Args[0]
6646                         if v.Args[1] != x {
6647                                 goto end47a27d30b82db576978c5a3a57b520fb
6648                         }
6649                         v.Op = OpCopy
6650                         v.AuxInt = 0
6651                         v.Aux = nil
6652                         v.resetArgs()
6653                         v.Type = x.Type
6654                         v.AddArg(x)
6655                         return true
6656                 }
6657                 goto end47a27d30b82db576978c5a3a57b520fb
6658         end47a27d30b82db576978c5a3a57b520fb:
6659                 ;
6660         case OpAMD64ORQconst:
6661                 // match: (ORQconst [0] x)
6662                 // cond:
6663                 // result: x
6664                 {
6665                         if v.AuxInt != 0 {
6666                                 goto end44534da6b9ce98d33fad7e20f0be1fbd
6667                         }
6668                         x := v.Args[0]
6669                         v.Op = OpCopy
6670                         v.AuxInt = 0
6671                         v.Aux = nil
6672                         v.resetArgs()
6673                         v.Type = x.Type
6674                         v.AddArg(x)
6675                         return true
6676                 }
6677                 goto end44534da6b9ce98d33fad7e20f0be1fbd
6678         end44534da6b9ce98d33fad7e20f0be1fbd:
6679                 ;
6680                 // match: (ORQconst [-1] _)
6681                 // cond:
6682                 // result: (MOVQconst [-1])
6683                 {
6684                         if v.AuxInt != -1 {
6685                                 goto endcde9b9d7c4527eaa5d50b252f50b43c1
6686                         }
6687                         v.Op = OpAMD64MOVQconst
6688                         v.AuxInt = 0
6689                         v.Aux = nil
6690                         v.resetArgs()
6691                         v.AuxInt = -1
6692                         return true
6693                 }
6694                 goto endcde9b9d7c4527eaa5d50b252f50b43c1
6695         endcde9b9d7c4527eaa5d50b252f50b43c1:
6696                 ;
6697                 // match: (ORQconst [c] (MOVQconst [d]))
6698                 // cond:
6699                 // result: (MOVQconst [c|d])
6700                 {
6701                         c := v.AuxInt
6702                         if v.Args[0].Op != OpAMD64MOVQconst {
6703                                 goto enda2488509b71db9abcb06a5115c4ddc2c
6704                         }
6705                         d := v.Args[0].AuxInt
6706                         v.Op = OpAMD64MOVQconst
6707                         v.AuxInt = 0
6708                         v.Aux = nil
6709                         v.resetArgs()
6710                         v.AuxInt = c | d
6711                         return true
6712                 }
6713                 goto enda2488509b71db9abcb06a5115c4ddc2c
6714         enda2488509b71db9abcb06a5115c4ddc2c:
6715                 ;
6716         case OpAMD64ORW:
6717                 // match: (ORW x (MOVWconst [c]))
6718                 // cond:
6719                 // result: (ORWconst [c] x)
6720                 {
6721                         x := v.Args[0]
6722                         if v.Args[1].Op != OpAMD64MOVWconst {
6723                                 goto end9f98df10892dbf170b49aace86ee0d7f
6724                         }
6725                         c := v.Args[1].AuxInt
6726                         v.Op = OpAMD64ORWconst
6727                         v.AuxInt = 0
6728                         v.Aux = nil
6729                         v.resetArgs()
6730                         v.AuxInt = c
6731                         v.AddArg(x)
6732                         return true
6733                 }
6734                 goto end9f98df10892dbf170b49aace86ee0d7f
6735         end9f98df10892dbf170b49aace86ee0d7f:
6736                 ;
6737                 // match: (ORW (MOVWconst [c]) x)
6738                 // cond:
6739                 // result: (ORWconst [c] x)
6740                 {
6741                         if v.Args[0].Op != OpAMD64MOVWconst {
6742                                 goto end96405942c9ceb5fcb0ddb85a8709d015
6743                         }
6744                         c := v.Args[0].AuxInt
6745                         x := v.Args[1]
6746                         v.Op = OpAMD64ORWconst
6747                         v.AuxInt = 0
6748                         v.Aux = nil
6749                         v.resetArgs()
6750                         v.AuxInt = c
6751                         v.AddArg(x)
6752                         return true
6753                 }
6754                 goto end96405942c9ceb5fcb0ddb85a8709d015
6755         end96405942c9ceb5fcb0ddb85a8709d015:
6756                 ;
6757                 // match: (ORW x x)
6758                 // cond:
6759                 // result: x
6760                 {
6761                         x := v.Args[0]
6762                         if v.Args[1] != x {
6763                                 goto endc6a23b64e541dc9cfc6a90fd7028e8c1
6764                         }
6765                         v.Op = OpCopy
6766                         v.AuxInt = 0
6767                         v.Aux = nil
6768                         v.resetArgs()
6769                         v.Type = x.Type
6770                         v.AddArg(x)
6771                         return true
6772                 }
6773                 goto endc6a23b64e541dc9cfc6a90fd7028e8c1
6774         endc6a23b64e541dc9cfc6a90fd7028e8c1:
6775                 ;
6776         case OpAMD64ORWconst:
6777                 // match: (ORWconst [c] x)
6778                 // cond: int16(c)==0
6779                 // result: x
6780                 {
6781                         c := v.AuxInt
6782                         x := v.Args[0]
6783                         if !(int16(c) == 0) {
6784                                 goto endbbbdec9091c8b4c58e587eac8a43402d
6785                         }
6786                         v.Op = OpCopy
6787                         v.AuxInt = 0
6788                         v.Aux = nil
6789                         v.resetArgs()
6790                         v.Type = x.Type
6791                         v.AddArg(x)
6792                         return true
6793                 }
6794                 goto endbbbdec9091c8b4c58e587eac8a43402d
6795         endbbbdec9091c8b4c58e587eac8a43402d:
6796                 ;
6797                 // match: (ORWconst [c] _)
6798                 // cond: int16(c)==-1
6799                 // result: (MOVWconst [-1])
6800                 {
6801                         c := v.AuxInt
6802                         if !(int16(c) == -1) {
6803                                 goto ended87a5775f5e04b2d2a117a63d82dd9b
6804                         }
6805                         v.Op = OpAMD64MOVWconst
6806                         v.AuxInt = 0
6807                         v.Aux = nil
6808                         v.resetArgs()
6809                         v.AuxInt = -1
6810                         return true
6811                 }
6812                 goto ended87a5775f5e04b2d2a117a63d82dd9b
6813         ended87a5775f5e04b2d2a117a63d82dd9b:
6814                 ;
6815                 // match: (ORWconst [c] (MOVWconst [d]))
6816                 // cond:
6817                 // result: (MOVWconst [c|d])
6818                 {
6819                         c := v.AuxInt
6820                         if v.Args[0].Op != OpAMD64MOVWconst {
6821                                 goto endba9221a8462b5c62e8d7c686f64c2778
6822                         }
6823                         d := v.Args[0].AuxInt
6824                         v.Op = OpAMD64MOVWconst
6825                         v.AuxInt = 0
6826                         v.Aux = nil
6827                         v.resetArgs()
6828                         v.AuxInt = c | d
6829                         return true
6830                 }
6831                 goto endba9221a8462b5c62e8d7c686f64c2778
6832         endba9221a8462b5c62e8d7c686f64c2778:
6833                 ;
6834         case OpOffPtr:
6835                 // match: (OffPtr [off] ptr)
6836                 // cond:
6837                 // result: (ADDQconst [off] ptr)
6838                 {
6839                         off := v.AuxInt
6840                         ptr := v.Args[0]
6841                         v.Op = OpAMD64ADDQconst
6842                         v.AuxInt = 0
6843                         v.Aux = nil
6844                         v.resetArgs()
6845                         v.AuxInt = off
6846                         v.AddArg(ptr)
6847                         return true
6848                 }
6849                 goto end0429f947ee7ac49ff45a243e461a5290
6850         end0429f947ee7ac49ff45a243e461a5290:
6851                 ;
6852         case OpOr16:
6853                 // match: (Or16 x y)
6854                 // cond:
6855                 // result: (ORW x y)
6856                 {
6857                         x := v.Args[0]
6858                         y := v.Args[1]
6859                         v.Op = OpAMD64ORW
6860                         v.AuxInt = 0
6861                         v.Aux = nil
6862                         v.resetArgs()
6863                         v.AddArg(x)
6864                         v.AddArg(y)
6865                         return true
6866                 }
6867                 goto end8fedf2c79d5607b7056b0ff015199cbd
6868         end8fedf2c79d5607b7056b0ff015199cbd:
6869                 ;
6870         case OpOr32:
6871                 // match: (Or32 x y)
6872                 // cond:
6873                 // result: (ORL x y)
6874                 {
6875                         x := v.Args[0]
6876                         y := v.Args[1]
6877                         v.Op = OpAMD64ORL
6878                         v.AuxInt = 0
6879                         v.Aux = nil
6880                         v.resetArgs()
6881                         v.AddArg(x)
6882                         v.AddArg(y)
6883                         return true
6884                 }
6885                 goto endea45bed9ca97d2995b68b53e6012d384
6886         endea45bed9ca97d2995b68b53e6012d384:
6887                 ;
6888         case OpOr64:
6889                 // match: (Or64 x y)
6890                 // cond:
6891                 // result: (ORQ x y)
6892                 {
6893                         x := v.Args[0]
6894                         y := v.Args[1]
6895                         v.Op = OpAMD64ORQ
6896                         v.AuxInt = 0
6897                         v.Aux = nil
6898                         v.resetArgs()
6899                         v.AddArg(x)
6900                         v.AddArg(y)
6901                         return true
6902                 }
6903                 goto end3a446becaf2461f4f1a41faeef313f41
6904         end3a446becaf2461f4f1a41faeef313f41:
6905                 ;
6906         case OpOr8:
6907                 // match: (Or8 x y)
6908                 // cond:
6909                 // result: (ORB x y)
6910                 {
6911                         x := v.Args[0]
6912                         y := v.Args[1]
6913                         v.Op = OpAMD64ORB
6914                         v.AuxInt = 0
6915                         v.Aux = nil
6916                         v.resetArgs()
6917                         v.AddArg(x)
6918                         v.AddArg(y)
6919                         return true
6920                 }
6921                 goto end6f8a8c559a167d1f0a5901d09a1fb248
6922         end6f8a8c559a167d1f0a5901d09a1fb248:
6923                 ;
6924         case OpPanicNilCheck:
6925                 // match: (PanicNilCheck ptr mem)
6926                 // cond:
6927                 // result: (LoweredPanicNilCheck ptr mem)
6928                 {
6929                         ptr := v.Args[0]
6930                         mem := v.Args[1]
6931                         v.Op = OpAMD64LoweredPanicNilCheck
6932                         v.AuxInt = 0
6933                         v.Aux = nil
6934                         v.resetArgs()
6935                         v.AddArg(ptr)
6936                         v.AddArg(mem)
6937                         return true
6938                 }
6939                 goto enda02b1ad5a6f929b782190145f2c8628b
6940         enda02b1ad5a6f929b782190145f2c8628b:
6941                 ;
6942         case OpRsh16Ux16:
6943                 // match: (Rsh16Ux16 <t> x y)
6944                 // cond:
6945                 // result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst [16] y)))
6946                 {
6947                         t := v.Type
6948                         x := v.Args[0]
6949                         y := v.Args[1]
6950                         v.Op = OpAMD64ANDW
6951                         v.AuxInt = 0
6952                         v.Aux = nil
6953                         v.resetArgs()
6954                         v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
6955                         v0.Type = t
6956                         v0.AddArg(x)
6957                         v0.AddArg(y)
6958                         v.AddArg(v0)
6959                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
6960                         v1.Type = t
6961                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
6962                         v2.AuxInt = 16
6963                         v2.AddArg(y)
6964                         v2.Type = TypeFlags
6965                         v1.AddArg(v2)
6966                         v.AddArg(v1)
6967                         return true
6968                 }
6969                 goto end4d5e000764dcea396f2d86472c2af6eb
6970         end4d5e000764dcea396f2d86472c2af6eb:
6971                 ;
6972         case OpRsh16Ux32:
6973                 // match: (Rsh16Ux32 <t> x y)
6974                 // cond:
6975                 // result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst [16] y)))
6976                 {
6977                         t := v.Type
6978                         x := v.Args[0]
6979                         y := v.Args[1]
6980                         v.Op = OpAMD64ANDW
6981                         v.AuxInt = 0
6982                         v.Aux = nil
6983                         v.resetArgs()
6984                         v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
6985                         v0.Type = t
6986                         v0.AddArg(x)
6987                         v0.AddArg(y)
6988                         v.AddArg(v0)
6989                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
6990                         v1.Type = t
6991                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
6992                         v2.AuxInt = 16
6993                         v2.AddArg(y)
6994                         v2.Type = TypeFlags
6995                         v1.AddArg(v2)
6996                         v.AddArg(v1)
6997                         return true
6998                 }
6999                 goto end9ef4fe2ea4565865cd4b3aa9c7596c00
7000         end9ef4fe2ea4565865cd4b3aa9c7596c00:
7001                 ;
7002         case OpRsh16Ux64:
7003                 // match: (Rsh16Ux64 <t> x y)
7004                 // cond:
7005                 // result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPQconst [16] y)))
7006                 {
7007                         t := v.Type
7008                         x := v.Args[0]
7009                         y := v.Args[1]
7010                         v.Op = OpAMD64ANDW
7011                         v.AuxInt = 0
7012                         v.Aux = nil
7013                         v.resetArgs()
7014                         v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
7015                         v0.Type = t
7016                         v0.AddArg(x)
7017                         v0.AddArg(y)
7018                         v.AddArg(v0)
7019                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7020                         v1.Type = t
7021                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7022                         v2.AuxInt = 16
7023                         v2.AddArg(y)
7024                         v2.Type = TypeFlags
7025                         v1.AddArg(v2)
7026                         v.AddArg(v1)
7027                         return true
7028                 }
7029                 goto end48bc94b9a68aad454eaabc42b2e1d646
7030         end48bc94b9a68aad454eaabc42b2e1d646:
7031                 ;
7032         case OpRsh16Ux8:
7033                 // match: (Rsh16Ux8 <t> x y)
7034                 // cond:
7035                 // result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst [16] y)))
7036                 {
7037                         t := v.Type
7038                         x := v.Args[0]
7039                         y := v.Args[1]
7040                         v.Op = OpAMD64ANDW
7041                         v.AuxInt = 0
7042                         v.Aux = nil
7043                         v.resetArgs()
7044                         v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
7045                         v0.Type = t
7046                         v0.AddArg(x)
7047                         v0.AddArg(y)
7048                         v.AddArg(v0)
7049                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7050                         v1.Type = t
7051                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7052                         v2.AuxInt = 16
7053                         v2.AddArg(y)
7054                         v2.Type = TypeFlags
7055                         v1.AddArg(v2)
7056                         v.AddArg(v1)
7057                         return true
7058                 }
7059                 goto ende98f618fa53b1f1d5d3f79781d5cb2cc
7060         ende98f618fa53b1f1d5d3f79781d5cb2cc:
7061                 ;
7062         case OpRsh16x16:
7063                 // match: (Rsh16x16 <t> x y)
7064                 // cond:
7065                 // result: (SARW <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst [16] y)))))
7066                 {
7067                         t := v.Type
7068                         x := v.Args[0]
7069                         y := v.Args[1]
7070                         v.Op = OpAMD64SARW
7071                         v.AuxInt = 0
7072                         v.Aux = nil
7073                         v.resetArgs()
7074                         v.Type = t
7075                         v.AddArg(x)
7076                         v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
7077                         v0.Type = y.Type
7078                         v0.AddArg(y)
7079                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7080                         v1.Type = y.Type
7081                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7082                         v2.Type = y.Type
7083                         v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7084                         v3.AuxInt = 16
7085                         v3.AddArg(y)
7086                         v3.Type = TypeFlags
7087                         v2.AddArg(v3)
7088                         v1.AddArg(v2)
7089                         v0.AddArg(v1)
7090                         v.AddArg(v0)
7091                         return true
7092                 }
7093                 goto end1de548dcf8d7c7222c7a739809597526
7094         end1de548dcf8d7c7222c7a739809597526:
7095                 ;
7096         case OpRsh16x32:
7097                 // match: (Rsh16x32 <t> x y)
7098                 // cond:
7099                 // result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst [16] y)))))
7100                 {
7101                         t := v.Type
7102                         x := v.Args[0]
7103                         y := v.Args[1]
7104                         v.Op = OpAMD64SARW
7105                         v.AuxInt = 0
7106                         v.Aux = nil
7107                         v.resetArgs()
7108                         v.Type = t
7109                         v.AddArg(x)
7110                         v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
7111                         v0.Type = y.Type
7112                         v0.AddArg(y)
7113                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7114                         v1.Type = y.Type
7115                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7116                         v2.Type = y.Type
7117                         v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7118                         v3.AuxInt = 16
7119                         v3.AddArg(y)
7120                         v3.Type = TypeFlags
7121                         v2.AddArg(v3)
7122                         v1.AddArg(v2)
7123                         v0.AddArg(v1)
7124                         v.AddArg(v0)
7125                         return true
7126                 }
7127                 goto end74419e1036ea7e0c3a09d05b1eabad22
7128         end74419e1036ea7e0c3a09d05b1eabad22:
7129                 ;
7130         case OpRsh16x64:
7131                 // match: (Rsh16x64 <t> x y)
7132                 // cond:
7133                 // result: (SARW <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst [16] y)))))
7134                 {
7135                         t := v.Type
7136                         x := v.Args[0]
7137                         y := v.Args[1]
7138                         v.Op = OpAMD64SARW
7139                         v.AuxInt = 0
7140                         v.Aux = nil
7141                         v.resetArgs()
7142                         v.Type = t
7143                         v.AddArg(x)
7144                         v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
7145                         v0.Type = y.Type
7146                         v0.AddArg(y)
7147                         v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
7148                         v1.Type = y.Type
7149                         v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7150                         v2.Type = y.Type
7151                         v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7152                         v3.AuxInt = 16
7153                         v3.AddArg(y)
7154                         v3.Type = TypeFlags
7155                         v2.AddArg(v3)
7156                         v1.AddArg(v2)
7157                         v0.AddArg(v1)
7158                         v.AddArg(v0)
7159                         return true
7160                 }
7161                 goto ende35d1c2918196fae04fca22e80936bab
7162         ende35d1c2918196fae04fca22e80936bab:
7163                 ;
7164         case OpRsh16x8:
7165                 // match: (Rsh16x8 <t> x y)
7166                 // cond:
7167                 // result: (SARW <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst [16] y)))))
7168                 {
7169                         t := v.Type
7170                         x := v.Args[0]
7171                         y := v.Args[1]
7172                         v.Op = OpAMD64SARW
7173                         v.AuxInt = 0
7174                         v.Aux = nil
7175                         v.resetArgs()
7176                         v.Type = t
7177                         v.AddArg(x)
7178                         v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
7179                         v0.Type = y.Type
7180                         v0.AddArg(y)
7181                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7182                         v1.Type = y.Type
7183                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7184                         v2.Type = y.Type
7185                         v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7186                         v3.AuxInt = 16
7187                         v3.AddArg(y)
7188                         v3.Type = TypeFlags
7189                         v2.AddArg(v3)
7190                         v1.AddArg(v2)
7191                         v0.AddArg(v1)
7192                         v.AddArg(v0)
7193                         return true
7194                 }
7195                 goto endaa6a45afc4c6552c1a90a13160578fba
7196         endaa6a45afc4c6552c1a90a13160578fba:
7197                 ;
7198         case OpRsh32Ux16:
7199                 // match: (Rsh32Ux16 <t> x y)
7200                 // cond:
7201                 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst [32] y)))
7202                 {
7203                         t := v.Type
7204                         x := v.Args[0]
7205                         y := v.Args[1]
7206                         v.Op = OpAMD64ANDL
7207                         v.AuxInt = 0
7208                         v.Aux = nil
7209                         v.resetArgs()
7210                         v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
7211                         v0.Type = t
7212                         v0.AddArg(x)
7213                         v0.AddArg(y)
7214                         v.AddArg(v0)
7215                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7216                         v1.Type = t
7217                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7218                         v2.AuxInt = 32
7219                         v2.AddArg(y)
7220                         v2.Type = TypeFlags
7221                         v1.AddArg(v2)
7222                         v.AddArg(v1)
7223                         return true
7224                 }
7225                 goto end74495683df77023ed619b4ecee98d94a
7226         end74495683df77023ed619b4ecee98d94a:
7227                 ;
7228         case OpRsh32Ux32:
7229                 // match: (Rsh32Ux32 <t> x y)
7230                 // cond:
7231                 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst [32] y)))
7232                 {
7233                         t := v.Type
7234                         x := v.Args[0]
7235                         y := v.Args[1]
7236                         v.Op = OpAMD64ANDL
7237                         v.AuxInt = 0
7238                         v.Aux = nil
7239                         v.resetArgs()
7240                         v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
7241                         v0.Type = t
7242                         v0.AddArg(x)
7243                         v0.AddArg(y)
7244                         v.AddArg(v0)
7245                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7246                         v1.Type = t
7247                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7248                         v2.AuxInt = 32
7249                         v2.AddArg(y)
7250                         v2.Type = TypeFlags
7251                         v1.AddArg(v2)
7252                         v.AddArg(v1)
7253                         return true
7254                 }
7255                 goto enda7d6c92ab2d7467102db447d6b431b28
7256         enda7d6c92ab2d7467102db447d6b431b28:
7257                 ;
7258         case OpRsh32Ux64:
7259                 // match: (Rsh32Ux64 <t> x y)
7260                 // cond:
7261                 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPQconst [32] y)))
7262                 {
7263                         t := v.Type
7264                         x := v.Args[0]
7265                         y := v.Args[1]
7266                         v.Op = OpAMD64ANDL
7267                         v.AuxInt = 0
7268                         v.Aux = nil
7269                         v.resetArgs()
7270                         v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
7271                         v0.Type = t
7272                         v0.AddArg(x)
7273                         v0.AddArg(y)
7274                         v.AddArg(v0)
7275                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7276                         v1.Type = t
7277                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7278                         v2.AuxInt = 32
7279                         v2.AddArg(y)
7280                         v2.Type = TypeFlags
7281                         v1.AddArg(v2)
7282                         v.AddArg(v1)
7283                         return true
7284                 }
7285                 goto end7c0829166a6219a15de2c0aa688a9bb3
7286         end7c0829166a6219a15de2c0aa688a9bb3:
7287                 ;
7288         case OpRsh32Ux8:
7289                 // match: (Rsh32Ux8 <t> x y)
7290                 // cond:
7291                 // result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst [32] y)))
7292                 {
7293                         t := v.Type
7294                         x := v.Args[0]
7295                         y := v.Args[1]
7296                         v.Op = OpAMD64ANDL
7297                         v.AuxInt = 0
7298                         v.Aux = nil
7299                         v.resetArgs()
7300                         v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
7301                         v0.Type = t
7302                         v0.AddArg(x)
7303                         v0.AddArg(y)
7304                         v.AddArg(v0)
7305                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7306                         v1.Type = t
7307                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7308                         v2.AuxInt = 32
7309                         v2.AddArg(y)
7310                         v2.Type = TypeFlags
7311                         v1.AddArg(v2)
7312                         v.AddArg(v1)
7313                         return true
7314                 }
7315                 goto end221315aa8a09c9d8d2f243bf445446ea
7316         end221315aa8a09c9d8d2f243bf445446ea:
7317                 ;
7318         case OpRsh32x16:
7319                 // match: (Rsh32x16 <t> x y)
7320                 // cond:
7321                 // result: (SARL <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst [32] y)))))
7322                 {
7323                         t := v.Type
7324                         x := v.Args[0]
7325                         y := v.Args[1]
7326                         v.Op = OpAMD64SARL
7327                         v.AuxInt = 0
7328                         v.Aux = nil
7329                         v.resetArgs()
7330                         v.Type = t
7331                         v.AddArg(x)
7332                         v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
7333                         v0.Type = y.Type
7334                         v0.AddArg(y)
7335                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7336                         v1.Type = y.Type
7337                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7338                         v2.Type = y.Type
7339                         v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7340                         v3.AuxInt = 32
7341                         v3.AddArg(y)
7342                         v3.Type = TypeFlags
7343                         v2.AddArg(v3)
7344                         v1.AddArg(v2)
7345                         v0.AddArg(v1)
7346                         v.AddArg(v0)
7347                         return true
7348                 }
7349                 goto end521b60d91648f07fe1be359f1cdbde29
7350         end521b60d91648f07fe1be359f1cdbde29:
7351                 ;
7352         case OpRsh32x32:
7353                 // match: (Rsh32x32 <t> x y)
7354                 // cond:
7355                 // result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst [32] y)))))
7356                 {
7357                         t := v.Type
7358                         x := v.Args[0]
7359                         y := v.Args[1]
7360                         v.Op = OpAMD64SARL
7361                         v.AuxInt = 0
7362                         v.Aux = nil
7363                         v.resetArgs()
7364                         v.Type = t
7365                         v.AddArg(x)
7366                         v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
7367                         v0.Type = y.Type
7368                         v0.AddArg(y)
7369                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7370                         v1.Type = y.Type
7371                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7372                         v2.Type = y.Type
7373                         v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7374                         v3.AuxInt = 32
7375                         v3.AddArg(y)
7376                         v3.Type = TypeFlags
7377                         v2.AddArg(v3)
7378                         v1.AddArg(v2)
7379                         v0.AddArg(v1)
7380                         v.AddArg(v0)
7381                         return true
7382                 }
7383                 goto end0fc03188975afbca2139e28c38b7cd17
7384         end0fc03188975afbca2139e28c38b7cd17:
7385                 ;
7386         case OpRsh32x64:
7387                 // match: (Rsh32x64 <t> x y)
7388                 // cond:
7389                 // result: (SARL <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst [32] y)))))
7390                 {
7391                         t := v.Type
7392                         x := v.Args[0]
7393                         y := v.Args[1]
7394                         v.Op = OpAMD64SARL
7395                         v.AuxInt = 0
7396                         v.Aux = nil
7397                         v.resetArgs()
7398                         v.Type = t
7399                         v.AddArg(x)
7400                         v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
7401                         v0.Type = y.Type
7402                         v0.AddArg(y)
7403                         v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
7404                         v1.Type = y.Type
7405                         v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7406                         v2.Type = y.Type
7407                         v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7408                         v3.AuxInt = 32
7409                         v3.AddArg(y)
7410                         v3.Type = TypeFlags
7411                         v2.AddArg(v3)
7412                         v1.AddArg(v2)
7413                         v0.AddArg(v1)
7414                         v.AddArg(v0)
7415                         return true
7416                 }
7417                 goto endf36790cc7ba330d448b403a450a7c1d4
7418         endf36790cc7ba330d448b403a450a7c1d4:
7419                 ;
7420         case OpRsh32x8:
7421                 // match: (Rsh32x8 <t> x y)
7422                 // cond:
7423                 // result: (SARL <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst [32] y)))))
7424                 {
7425                         t := v.Type
7426                         x := v.Args[0]
7427                         y := v.Args[1]
7428                         v.Op = OpAMD64SARL
7429                         v.AuxInt = 0
7430                         v.Aux = nil
7431                         v.resetArgs()
7432                         v.Type = t
7433                         v.AddArg(x)
7434                         v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
7435                         v0.Type = y.Type
7436                         v0.AddArg(y)
7437                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7438                         v1.Type = y.Type
7439                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7440                         v2.Type = y.Type
7441                         v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7442                         v3.AuxInt = 32
7443                         v3.AddArg(y)
7444                         v3.Type = TypeFlags
7445                         v2.AddArg(v3)
7446                         v1.AddArg(v2)
7447                         v0.AddArg(v1)
7448                         v.AddArg(v0)
7449                         return true
7450                 }
7451                 goto end1242709228488be2f2505ead8eabb871
7452         end1242709228488be2f2505ead8eabb871:
7453                 ;
7454         case OpRsh64Ux16:
7455                 // match: (Rsh64Ux16 <t> x y)
7456                 // cond:
7457                 // result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPWconst [64] y)))
7458                 {
7459                         t := v.Type
7460                         x := v.Args[0]
7461                         y := v.Args[1]
7462                         v.Op = OpAMD64ANDQ
7463                         v.AuxInt = 0
7464                         v.Aux = nil
7465                         v.resetArgs()
7466                         v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
7467                         v0.Type = t
7468                         v0.AddArg(x)
7469                         v0.AddArg(y)
7470                         v.AddArg(v0)
7471                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7472                         v1.Type = t
7473                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7474                         v2.AuxInt = 64
7475                         v2.AddArg(y)
7476                         v2.Type = TypeFlags
7477                         v1.AddArg(v2)
7478                         v.AddArg(v1)
7479                         return true
7480                 }
7481                 goto end0bc6c36a57ebaf0b90fc418f976fe210
7482         end0bc6c36a57ebaf0b90fc418f976fe210:
7483                 ;
7484         case OpRsh64Ux32:
7485                 // match: (Rsh64Ux32 <t> x y)
7486                 // cond:
7487                 // result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPLconst [64] y)))
7488                 {
7489                         t := v.Type
7490                         x := v.Args[0]
7491                         y := v.Args[1]
7492                         v.Op = OpAMD64ANDQ
7493                         v.AuxInt = 0
7494                         v.Aux = nil
7495                         v.resetArgs()
7496                         v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
7497                         v0.Type = t
7498                         v0.AddArg(x)
7499                         v0.AddArg(y)
7500                         v.AddArg(v0)
7501                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7502                         v1.Type = t
7503                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7504                         v2.AuxInt = 64
7505                         v2.AddArg(y)
7506                         v2.Type = TypeFlags
7507                         v1.AddArg(v2)
7508                         v.AddArg(v1)
7509                         return true
7510                 }
7511                 goto ende3f52062f53bc3b5aa0461a644e38a1b
7512         ende3f52062f53bc3b5aa0461a644e38a1b:
7513                 ;
7514         case OpRsh64Ux64:
7515                 // match: (Rsh64Ux64 <t> x y)
7516                 // cond:
7517                 // result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPQconst [64] y)))
7518                 {
7519                         t := v.Type
7520                         x := v.Args[0]
7521                         y := v.Args[1]
7522                         v.Op = OpAMD64ANDQ
7523                         v.AuxInt = 0
7524                         v.Aux = nil
7525                         v.resetArgs()
7526                         v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
7527                         v0.Type = t
7528                         v0.AddArg(x)
7529                         v0.AddArg(y)
7530                         v.AddArg(v0)
7531                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7532                         v1.Type = t
7533                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7534                         v2.AuxInt = 64
7535                         v2.AddArg(y)
7536                         v2.Type = TypeFlags
7537                         v1.AddArg(v2)
7538                         v.AddArg(v1)
7539                         return true
7540                 }
7541                 goto endaec410d0544f817303c79bad739c50fd
7542         endaec410d0544f817303c79bad739c50fd:
7543                 ;
7544         case OpRsh64Ux8:
7545                 // match: (Rsh64Ux8 <t> x y)
7546                 // cond:
7547                 // result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPBconst [64] y)))
7548                 {
7549                         t := v.Type
7550                         x := v.Args[0]
7551                         y := v.Args[1]
7552                         v.Op = OpAMD64ANDQ
7553                         v.AuxInt = 0
7554                         v.Aux = nil
7555                         v.resetArgs()
7556                         v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
7557                         v0.Type = t
7558                         v0.AddArg(x)
7559                         v0.AddArg(y)
7560                         v.AddArg(v0)
7561                         v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7562                         v1.Type = t
7563                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7564                         v2.AuxInt = 64
7565                         v2.AddArg(y)
7566                         v2.Type = TypeFlags
7567                         v1.AddArg(v2)
7568                         v.AddArg(v1)
7569                         return true
7570                 }
7571                 goto end0318851ecb02e4ad8a2669034adf7862
7572         end0318851ecb02e4ad8a2669034adf7862:
7573                 ;
7574         case OpRsh64x16:
7575                 // match: (Rsh64x16 <t> x y)
7576                 // cond:
7577                 // result: (SARQ <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst [64] y)))))
7578                 {
7579                         t := v.Type
7580                         x := v.Args[0]
7581                         y := v.Args[1]
7582                         v.Op = OpAMD64SARQ
7583                         v.AuxInt = 0
7584                         v.Aux = nil
7585                         v.resetArgs()
7586                         v.Type = t
7587                         v.AddArg(x)
7588                         v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
7589                         v0.Type = y.Type
7590                         v0.AddArg(y)
7591                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7592                         v1.Type = y.Type
7593                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7594                         v2.Type = y.Type
7595                         v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7596                         v3.AuxInt = 64
7597                         v3.AddArg(y)
7598                         v3.Type = TypeFlags
7599                         v2.AddArg(v3)
7600                         v1.AddArg(v2)
7601                         v0.AddArg(v1)
7602                         v.AddArg(v0)
7603                         return true
7604                 }
7605                 goto endcf8bbca9a7a848fbebaaaa8b699cd086
7606         endcf8bbca9a7a848fbebaaaa8b699cd086:
7607                 ;
7608         case OpRsh64x32:
7609                 // match: (Rsh64x32 <t> x y)
7610                 // cond:
7611                 // result: (SARQ <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst [64] y)))))
7612                 {
7613                         t := v.Type
7614                         x := v.Args[0]
7615                         y := v.Args[1]
7616                         v.Op = OpAMD64SARQ
7617                         v.AuxInt = 0
7618                         v.Aux = nil
7619                         v.resetArgs()
7620                         v.Type = t
7621                         v.AddArg(x)
7622                         v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
7623                         v0.Type = y.Type
7624                         v0.AddArg(y)
7625                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7626                         v1.Type = y.Type
7627                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7628                         v2.Type = y.Type
7629                         v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7630                         v3.AuxInt = 64
7631                         v3.AddArg(y)
7632                         v3.Type = TypeFlags
7633                         v2.AddArg(v3)
7634                         v1.AddArg(v2)
7635                         v0.AddArg(v1)
7636                         v.AddArg(v0)
7637                         return true
7638                 }
7639                 goto end7604d45b06ee69bf2feddf88b2f33cb6
7640         end7604d45b06ee69bf2feddf88b2f33cb6:
7641                 ;
7642         case OpRsh64x64:
7643                 // match: (Rsh64x64 <t> x y)
7644                 // cond:
7645                 // result: (SARQ <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst [64] y)))))
7646                 {
7647                         t := v.Type
7648                         x := v.Args[0]
7649                         y := v.Args[1]
7650                         v.Op = OpAMD64SARQ
7651                         v.AuxInt = 0
7652                         v.Aux = nil
7653                         v.resetArgs()
7654                         v.Type = t
7655                         v.AddArg(x)
7656                         v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
7657                         v0.Type = y.Type
7658                         v0.AddArg(y)
7659                         v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
7660                         v1.Type = y.Type
7661                         v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7662                         v2.Type = y.Type
7663                         v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7664                         v3.AuxInt = 64
7665                         v3.AddArg(y)
7666                         v3.Type = TypeFlags
7667                         v2.AddArg(v3)
7668                         v1.AddArg(v2)
7669                         v0.AddArg(v1)
7670                         v.AddArg(v0)
7671                         return true
7672                 }
7673                 goto end12a3b44af604b515ad5530502336486f
7674         end12a3b44af604b515ad5530502336486f:
7675                 ;
7676         case OpRsh64x8:
7677                 // match: (Rsh64x8 <t> x y)
7678                 // cond:
7679                 // result: (SARQ <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst [64] y)))))
7680                 {
7681                         t := v.Type
7682                         x := v.Args[0]
7683                         y := v.Args[1]
7684                         v.Op = OpAMD64SARQ
7685                         v.AuxInt = 0
7686                         v.Aux = nil
7687                         v.resetArgs()
7688                         v.Type = t
7689                         v.AddArg(x)
7690                         v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
7691                         v0.Type = y.Type
7692                         v0.AddArg(y)
7693                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7694                         v1.Type = y.Type
7695                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7696                         v2.Type = y.Type
7697                         v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7698                         v3.AuxInt = 64
7699                         v3.AddArg(y)
7700                         v3.Type = TypeFlags
7701                         v2.AddArg(v3)
7702                         v1.AddArg(v2)
7703                         v0.AddArg(v1)
7704                         v.AddArg(v0)
7705                         return true
7706                 }
7707                 goto end4e2a83809914aad301a2f74d3c38fbbb
7708         end4e2a83809914aad301a2f74d3c38fbbb:
7709                 ;
7710         case OpRsh8Ux16:
7711                 // match: (Rsh8Ux16 <t> x y)
7712                 // cond:
7713                 // result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst [8] y)))
7714                 {
7715                         t := v.Type
7716                         x := v.Args[0]
7717                         y := v.Args[1]
7718                         v.Op = OpAMD64ANDB
7719                         v.AuxInt = 0
7720                         v.Aux = nil
7721                         v.resetArgs()
7722                         v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
7723                         v0.Type = t
7724                         v0.AddArg(x)
7725                         v0.AddArg(y)
7726                         v.AddArg(v0)
7727                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7728                         v1.Type = t
7729                         v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7730                         v2.AuxInt = 8
7731                         v2.AddArg(y)
7732                         v2.Type = TypeFlags
7733                         v1.AddArg(v2)
7734                         v.AddArg(v1)
7735                         return true
7736                 }
7737                 goto end724175a51b6efac60c6bb9d83d81215a
7738         end724175a51b6efac60c6bb9d83d81215a:
7739                 ;
7740         case OpRsh8Ux32:
7741                 // match: (Rsh8Ux32 <t> x y)
7742                 // cond:
7743                 // result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst [8] y)))
7744                 {
7745                         t := v.Type
7746                         x := v.Args[0]
7747                         y := v.Args[1]
7748                         v.Op = OpAMD64ANDB
7749                         v.AuxInt = 0
7750                         v.Aux = nil
7751                         v.resetArgs()
7752                         v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
7753                         v0.Type = t
7754                         v0.AddArg(x)
7755                         v0.AddArg(y)
7756                         v.AddArg(v0)
7757                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7758                         v1.Type = t
7759                         v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7760                         v2.AuxInt = 8
7761                         v2.AddArg(y)
7762                         v2.Type = TypeFlags
7763                         v1.AddArg(v2)
7764                         v.AddArg(v1)
7765                         return true
7766                 }
7767                 goto end9d973431bed6682c1d557a535cf440ed
7768         end9d973431bed6682c1d557a535cf440ed:
7769                 ;
7770         case OpRsh8Ux64:
7771                 // match: (Rsh8Ux64 <t> x y)
7772                 // cond:
7773                 // result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPQconst [8] y)))
7774                 {
7775                         t := v.Type
7776                         x := v.Args[0]
7777                         y := v.Args[1]
7778                         v.Op = OpAMD64ANDB
7779                         v.AuxInt = 0
7780                         v.Aux = nil
7781                         v.resetArgs()
7782                         v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
7783                         v0.Type = t
7784                         v0.AddArg(x)
7785                         v0.AddArg(y)
7786                         v.AddArg(v0)
7787                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7788                         v1.Type = t
7789                         v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7790                         v2.AuxInt = 8
7791                         v2.AddArg(y)
7792                         v2.Type = TypeFlags
7793                         v1.AddArg(v2)
7794                         v.AddArg(v1)
7795                         return true
7796                 }
7797                 goto end9586937cdeb7946c337d46cd30cb9a11
7798         end9586937cdeb7946c337d46cd30cb9a11:
7799                 ;
7800         case OpRsh8Ux8:
7801                 // match: (Rsh8Ux8 <t> x y)
7802                 // cond:
7803                 // result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst [8] y)))
7804                 {
7805                         t := v.Type
7806                         x := v.Args[0]
7807                         y := v.Args[1]
7808                         v.Op = OpAMD64ANDB
7809                         v.AuxInt = 0
7810                         v.Aux = nil
7811                         v.resetArgs()
7812                         v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
7813                         v0.Type = t
7814                         v0.AddArg(x)
7815                         v0.AddArg(y)
7816                         v.AddArg(v0)
7817                         v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7818                         v1.Type = t
7819                         v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7820                         v2.AuxInt = 8
7821                         v2.AddArg(y)
7822                         v2.Type = TypeFlags
7823                         v1.AddArg(v2)
7824                         v.AddArg(v1)
7825                         return true
7826                 }
7827                 goto endc5a55ef63d86e6b8d4d366a947bf563d
7828         endc5a55ef63d86e6b8d4d366a947bf563d:
7829                 ;
7830         case OpRsh8x16:
7831                 // match: (Rsh8x16 <t> x y)
7832                 // cond:
7833                 // result: (SARB <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst [8] y)))))
7834                 {
7835                         t := v.Type
7836                         x := v.Args[0]
7837                         y := v.Args[1]
7838                         v.Op = OpAMD64SARB
7839                         v.AuxInt = 0
7840                         v.Aux = nil
7841                         v.resetArgs()
7842                         v.Type = t
7843                         v.AddArg(x)
7844                         v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
7845                         v0.Type = y.Type
7846                         v0.AddArg(y)
7847                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7848                         v1.Type = y.Type
7849                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7850                         v2.Type = y.Type
7851                         v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
7852                         v3.AuxInt = 8
7853                         v3.AddArg(y)
7854                         v3.Type = TypeFlags
7855                         v2.AddArg(v3)
7856                         v1.AddArg(v2)
7857                         v0.AddArg(v1)
7858                         v.AddArg(v0)
7859                         return true
7860                 }
7861                 goto endfa967d6583c1bb9644514c2013b919f8
7862         endfa967d6583c1bb9644514c2013b919f8:
7863                 ;
7864         case OpRsh8x32:
7865                 // match: (Rsh8x32 <t> x y)
7866                 // cond:
7867                 // result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst [8] y)))))
7868                 {
7869                         t := v.Type
7870                         x := v.Args[0]
7871                         y := v.Args[1]
7872                         v.Op = OpAMD64SARB
7873                         v.AuxInt = 0
7874                         v.Aux = nil
7875                         v.resetArgs()
7876                         v.Type = t
7877                         v.AddArg(x)
7878                         v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
7879                         v0.Type = y.Type
7880                         v0.AddArg(y)
7881                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7882                         v1.Type = y.Type
7883                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7884                         v2.Type = y.Type
7885                         v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
7886                         v3.AuxInt = 8
7887                         v3.AddArg(y)
7888                         v3.Type = TypeFlags
7889                         v2.AddArg(v3)
7890                         v1.AddArg(v2)
7891                         v0.AddArg(v1)
7892                         v.AddArg(v0)
7893                         return true
7894                 }
7895                 goto ende5a630810624a1bd3677618c2cbc8619
7896         ende5a630810624a1bd3677618c2cbc8619:
7897                 ;
7898         case OpRsh8x64:
7899                 // match: (Rsh8x64 <t> x y)
7900                 // cond:
7901                 // result: (SARB <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst [8] y)))))
7902                 {
7903                         t := v.Type
7904                         x := v.Args[0]
7905                         y := v.Args[1]
7906                         v.Op = OpAMD64SARB
7907                         v.AuxInt = 0
7908                         v.Aux = nil
7909                         v.resetArgs()
7910                         v.Type = t
7911                         v.AddArg(x)
7912                         v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
7913                         v0.Type = y.Type
7914                         v0.AddArg(y)
7915                         v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
7916                         v1.Type = y.Type
7917                         v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
7918                         v2.Type = y.Type
7919                         v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
7920                         v3.AuxInt = 8
7921                         v3.AddArg(y)
7922                         v3.Type = TypeFlags
7923                         v2.AddArg(v3)
7924                         v1.AddArg(v2)
7925                         v0.AddArg(v1)
7926                         v.AddArg(v0)
7927                         return true
7928                 }
7929                 goto end23c55e49d8bc44afc680b2a4eade5af6
7930         end23c55e49d8bc44afc680b2a4eade5af6:
7931                 ;
7932         case OpRsh8x8:
7933                 // match: (Rsh8x8 <t> x y)
7934                 // cond:
7935                 // result: (SARB <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst [8] y)))))
7936                 {
7937                         t := v.Type
7938                         x := v.Args[0]
7939                         y := v.Args[1]
7940                         v.Op = OpAMD64SARB
7941                         v.AuxInt = 0
7942                         v.Aux = nil
7943                         v.resetArgs()
7944                         v.Type = t
7945                         v.AddArg(x)
7946                         v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
7947                         v0.Type = y.Type
7948                         v0.AddArg(y)
7949                         v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
7950                         v1.Type = y.Type
7951                         v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
7952                         v2.Type = y.Type
7953                         v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
7954                         v3.AuxInt = 8
7955                         v3.AddArg(y)
7956                         v3.Type = TypeFlags
7957                         v2.AddArg(v3)
7958                         v1.AddArg(v2)
7959                         v0.AddArg(v1)
7960                         v.AddArg(v0)
7961                         return true
7962                 }
7963                 goto enddab0c33c56e2e9434b880e1718621979
7964         enddab0c33c56e2e9434b880e1718621979:
7965                 ;
7966         case OpAMD64SARB:
7967                 // match: (SARB x (MOVBconst [c]))
7968                 // cond:
7969                 // result: (SARBconst [c&31] x)
7970                 {
7971                         x := v.Args[0]
7972                         if v.Args[1].Op != OpAMD64MOVBconst {
7973                                 goto end3bf3d17717aa6c04462e56d1c87902ce
7974                         }
7975                         c := v.Args[1].AuxInt
7976                         v.Op = OpAMD64SARBconst
7977                         v.AuxInt = 0
7978                         v.Aux = nil
7979                         v.resetArgs()
7980                         v.AuxInt = c & 31
7981                         v.AddArg(x)
7982                         return true
7983                 }
7984                 goto end3bf3d17717aa6c04462e56d1c87902ce
7985         end3bf3d17717aa6c04462e56d1c87902ce:
7986                 ;
7987         case OpAMD64SARBconst:
7988                 // match: (SARBconst [c] (MOVQconst [d]))
7989                 // cond:
7990                 // result: (MOVQconst [d>>uint64(c)])
7991                 {
7992                         c := v.AuxInt
7993                         if v.Args[0].Op != OpAMD64MOVQconst {
7994                                 goto end06e0e38775f0650ed672427d19cd8fff
7995                         }
7996                         d := v.Args[0].AuxInt
7997                         v.Op = OpAMD64MOVQconst
7998                         v.AuxInt = 0
7999                         v.Aux = nil
8000                         v.resetArgs()
8001                         v.AuxInt = d >> uint64(c)
8002                         return true
8003                 }
8004                 goto end06e0e38775f0650ed672427d19cd8fff
8005         end06e0e38775f0650ed672427d19cd8fff:
8006                 ;
8007         case OpAMD64SARL:
8008                 // match: (SARL x (MOVLconst [c]))
8009                 // cond:
8010                 // result: (SARLconst [c&31] x)
8011                 {
8012                         x := v.Args[0]
8013                         if v.Args[1].Op != OpAMD64MOVLconst {
8014                                 goto ende586a72c1b232ee0b63e37c71eeb8470
8015                         }
8016                         c := v.Args[1].AuxInt
8017                         v.Op = OpAMD64SARLconst
8018                         v.AuxInt = 0
8019                         v.Aux = nil
8020                         v.resetArgs()
8021                         v.AuxInt = c & 31
8022                         v.AddArg(x)
8023                         return true
8024                 }
8025                 goto ende586a72c1b232ee0b63e37c71eeb8470
8026         ende586a72c1b232ee0b63e37c71eeb8470:
8027                 ;
8028         case OpAMD64SARLconst:
8029                 // match: (SARLconst [c] (MOVQconst [d]))
8030                 // cond:
8031                 // result: (MOVQconst [d>>uint64(c)])
8032                 {
8033                         c := v.AuxInt
8034                         if v.Args[0].Op != OpAMD64MOVQconst {
8035                                 goto end8f34dc94323303e75b7bcc8e731cf1db
8036                         }
8037                         d := v.Args[0].AuxInt
8038                         v.Op = OpAMD64MOVQconst
8039                         v.AuxInt = 0
8040                         v.Aux = nil
8041                         v.resetArgs()
8042                         v.AuxInt = d >> uint64(c)
8043                         return true
8044                 }
8045                 goto end8f34dc94323303e75b7bcc8e731cf1db
8046         end8f34dc94323303e75b7bcc8e731cf1db:
8047                 ;
8048         case OpAMD64SARQ:
8049                 // match: (SARQ x (MOVQconst [c]))
8050                 // cond:
8051                 // result: (SARQconst [c&63] x)
8052                 {
8053                         x := v.Args[0]
8054                         if v.Args[1].Op != OpAMD64MOVQconst {
8055                                 goto end25e720ab203be2745dded5550e6d8a7c
8056                         }
8057                         c := v.Args[1].AuxInt
8058                         v.Op = OpAMD64SARQconst
8059                         v.AuxInt = 0
8060                         v.Aux = nil
8061                         v.resetArgs()
8062                         v.AuxInt = c & 63
8063                         v.AddArg(x)
8064                         return true
8065                 }
8066                 goto end25e720ab203be2745dded5550e6d8a7c
8067         end25e720ab203be2745dded5550e6d8a7c:
8068                 ;
8069         case OpAMD64SARQconst:
8070                 // match: (SARQconst [c] (MOVQconst [d]))
8071                 // cond:
8072                 // result: (MOVQconst [d>>uint64(c)])
8073                 {
8074                         c := v.AuxInt
8075                         if v.Args[0].Op != OpAMD64MOVQconst {
8076                                 goto endd949ba69a1ff71ba62c49b39c68f269e
8077                         }
8078                         d := v.Args[0].AuxInt
8079                         v.Op = OpAMD64MOVQconst
8080                         v.AuxInt = 0
8081                         v.Aux = nil
8082                         v.resetArgs()
8083                         v.AuxInt = d >> uint64(c)
8084                         return true
8085                 }
8086                 goto endd949ba69a1ff71ba62c49b39c68f269e
8087         endd949ba69a1ff71ba62c49b39c68f269e:
8088                 ;
8089         case OpAMD64SARW:
8090                 // match: (SARW x (MOVWconst [c]))
8091                 // cond:
8092                 // result: (SARWconst [c&31] x)
8093                 {
8094                         x := v.Args[0]
8095                         if v.Args[1].Op != OpAMD64MOVWconst {
8096                                 goto endc46e3f211f94238f9a0aec3c498af490
8097                         }
8098                         c := v.Args[1].AuxInt
8099                         v.Op = OpAMD64SARWconst
8100                         v.AuxInt = 0
8101                         v.Aux = nil
8102                         v.resetArgs()
8103                         v.AuxInt = c & 31
8104                         v.AddArg(x)
8105                         return true
8106                 }
8107                 goto endc46e3f211f94238f9a0aec3c498af490
8108         endc46e3f211f94238f9a0aec3c498af490:
8109                 ;
8110         case OpAMD64SARWconst:
8111                 // match: (SARWconst [c] (MOVQconst [d]))
8112                 // cond:
8113                 // result: (MOVQconst [d>>uint64(c)])
8114                 {
8115                         c := v.AuxInt
8116                         if v.Args[0].Op != OpAMD64MOVQconst {
8117                                 goto endca23e80dba22ab574f843c7a4cef24ab
8118                         }
8119                         d := v.Args[0].AuxInt
8120                         v.Op = OpAMD64MOVQconst
8121                         v.AuxInt = 0
8122                         v.Aux = nil
8123                         v.resetArgs()
8124                         v.AuxInt = d >> uint64(c)
8125                         return true
8126                 }
8127                 goto endca23e80dba22ab574f843c7a4cef24ab
8128         endca23e80dba22ab574f843c7a4cef24ab:
8129                 ;
8130         case OpAMD64SBBLcarrymask:
8131                 // match: (SBBLcarrymask (CMPQconst [c] (MOVQconst [d])))
8132                 // cond: inBounds64(d, c)
8133                 // result: (MOVLconst [-1])
8134                 {
8135                         if v.Args[0].Op != OpAMD64CMPQconst {
8136                                 goto end490c8a7039bab41e90e564fbb8500233
8137                         }
8138                         c := v.Args[0].AuxInt
8139                         if v.Args[0].Args[0].Op != OpAMD64MOVQconst {
8140                                 goto end490c8a7039bab41e90e564fbb8500233
8141                         }
8142                         d := v.Args[0].Args[0].AuxInt
8143                         if !(inBounds64(d, c)) {
8144                                 goto end490c8a7039bab41e90e564fbb8500233
8145                         }
8146                         v.Op = OpAMD64MOVLconst
8147                         v.AuxInt = 0
8148                         v.Aux = nil
8149                         v.resetArgs()
8150                         v.AuxInt = -1
8151                         return true
8152                 }
8153                 goto end490c8a7039bab41e90e564fbb8500233
8154         end490c8a7039bab41e90e564fbb8500233:
8155                 ;
8156                 // match: (SBBLcarrymask (CMPQconst [c] (MOVQconst [d])))
8157                 // cond: !inBounds64(d, c)
8158                 // result: (MOVLconst [0])
8159                 {
8160                         if v.Args[0].Op != OpAMD64CMPQconst {
8161                                 goto end95e703eabe71d831b7a3d2f9fabe7de9
8162                         }
8163                         c := v.Args[0].AuxInt
8164                         if v.Args[0].Args[0].Op != OpAMD64MOVQconst {
8165                                 goto end95e703eabe71d831b7a3d2f9fabe7de9
8166                         }
8167                         d := v.Args[0].Args[0].AuxInt
8168                         if !(!inBounds64(d, c)) {
8169                                 goto end95e703eabe71d831b7a3d2f9fabe7de9
8170                         }
8171                         v.Op = OpAMD64MOVLconst
8172                         v.AuxInt = 0
8173                         v.Aux = nil
8174                         v.resetArgs()
8175                         v.AuxInt = 0
8176                         return true
8177                 }
8178                 goto end95e703eabe71d831b7a3d2f9fabe7de9
8179         end95e703eabe71d831b7a3d2f9fabe7de9:
8180                 ;
8181                 // match: (SBBLcarrymask (CMPLconst [c] (MOVLconst [d])))
8182                 // cond: inBounds32(d, c)
8183                 // result: (MOVLconst [-1])
8184                 {
8185                         if v.Args[0].Op != OpAMD64CMPLconst {
8186                                 goto end00c0a561340b0172c9a21f63648b86e2
8187                         }
8188                         c := v.Args[0].AuxInt
8189                         if v.Args[0].Args[0].Op != OpAMD64MOVLconst {
8190                                 goto end00c0a561340b0172c9a21f63648b86e2
8191                         }
8192                         d := v.Args[0].Args[0].AuxInt
8193                         if !(inBounds32(d, c)) {
8194                                 goto end00c0a561340b0172c9a21f63648b86e2
8195                         }
8196                         v.Op = OpAMD64MOVLconst
8197                         v.AuxInt = 0
8198                         v.Aux = nil
8199                         v.resetArgs()
8200                         v.AuxInt = -1
8201                         return true
8202                 }
8203                 goto end00c0a561340b0172c9a21f63648b86e2
8204         end00c0a561340b0172c9a21f63648b86e2:
8205                 ;
8206                 // match: (SBBLcarrymask (CMPLconst [c] (MOVLconst [d])))
8207                 // cond: !inBounds32(d, c)
8208                 // result: (MOVLconst [0])
8209                 {
8210                         if v.Args[0].Op != OpAMD64CMPLconst {
8211                                 goto enda73c8bf14f7b45dd97c6a006e317b0b8
8212                         }
8213                         c := v.Args[0].AuxInt
8214                         if v.Args[0].Args[0].Op != OpAMD64MOVLconst {
8215                                 goto enda73c8bf14f7b45dd97c6a006e317b0b8
8216                         }
8217                         d := v.Args[0].Args[0].AuxInt
8218                         if !(!inBounds32(d, c)) {
8219                                 goto enda73c8bf14f7b45dd97c6a006e317b0b8
8220                         }
8221                         v.Op = OpAMD64MOVLconst
8222                         v.AuxInt = 0
8223                         v.Aux = nil
8224                         v.resetArgs()
8225                         v.AuxInt = 0
8226                         return true
8227                 }
8228                 goto enda73c8bf14f7b45dd97c6a006e317b0b8
8229         enda73c8bf14f7b45dd97c6a006e317b0b8:
8230                 ;
8231                 // match: (SBBLcarrymask (CMPWconst [c] (MOVWconst [d])))
8232                 // cond: inBounds16(d, c)
8233                 // result: (MOVLconst [-1])
8234                 {
8235                         if v.Args[0].Op != OpAMD64CMPWconst {
8236                                 goto endb94dc44cd77f66ed3bf3742874b666fc
8237                         }
8238                         c := v.Args[0].AuxInt
8239                         if v.Args[0].Args[0].Op != OpAMD64MOVWconst {
8240                                 goto endb94dc44cd77f66ed3bf3742874b666fc
8241                         }
8242                         d := v.Args[0].Args[0].AuxInt
8243                         if !(inBounds16(d, c)) {
8244                                 goto endb94dc44cd77f66ed3bf3742874b666fc
8245                         }
8246                         v.Op = OpAMD64MOVLconst
8247                         v.AuxInt = 0
8248                         v.Aux = nil
8249                         v.resetArgs()
8250                         v.AuxInt = -1
8251                         return true
8252                 }
8253                 goto endb94dc44cd77f66ed3bf3742874b666fc
8254         endb94dc44cd77f66ed3bf3742874b666fc:
8255                 ;
8256                 // match: (SBBLcarrymask (CMPWconst [c] (MOVWconst [d])))
8257                 // cond: !inBounds16(d, c)
8258                 // result: (MOVLconst [0])
8259                 {
8260                         if v.Args[0].Op != OpAMD64CMPWconst {
8261                                 goto end7a02def6194822f7ab937d78088504d2
8262                         }
8263                         c := v.Args[0].AuxInt
8264                         if v.Args[0].Args[0].Op != OpAMD64MOVWconst {
8265                                 goto end7a02def6194822f7ab937d78088504d2
8266                         }
8267                         d := v.Args[0].Args[0].AuxInt
8268                         if !(!inBounds16(d, c)) {
8269                                 goto end7a02def6194822f7ab937d78088504d2
8270                         }
8271                         v.Op = OpAMD64MOVLconst
8272                         v.AuxInt = 0
8273                         v.Aux = nil
8274                         v.resetArgs()
8275                         v.AuxInt = 0
8276                         return true
8277                 }
8278                 goto end7a02def6194822f7ab937d78088504d2
8279         end7a02def6194822f7ab937d78088504d2:
8280                 ;
8281                 // match: (SBBLcarrymask (CMPBconst [c] (MOVBconst [d])))
8282                 // cond: inBounds8(d, c)
8283                 // result: (MOVLconst [-1])
8284                 {
8285                         if v.Args[0].Op != OpAMD64CMPBconst {
8286                                 goto end79c8e4a20761df731521e6cd956c4245
8287                         }
8288                         c := v.Args[0].AuxInt
8289                         if v.Args[0].Args[0].Op != OpAMD64MOVBconst {
8290                                 goto end79c8e4a20761df731521e6cd956c4245
8291                         }
8292                         d := v.Args[0].Args[0].AuxInt
8293                         if !(inBounds8(d, c)) {
8294                                 goto end79c8e4a20761df731521e6cd956c4245
8295                         }
8296                         v.Op = OpAMD64MOVLconst
8297                         v.AuxInt = 0
8298                         v.Aux = nil
8299                         v.resetArgs()
8300                         v.AuxInt = -1
8301                         return true
8302                 }
8303                 goto end79c8e4a20761df731521e6cd956c4245
8304         end79c8e4a20761df731521e6cd956c4245:
8305                 ;
8306                 // match: (SBBLcarrymask (CMPBconst [c] (MOVBconst [d])))
8307                 // cond: !inBounds8(d, c)
8308                 // result: (MOVLconst [0])
8309                 {
8310                         if v.Args[0].Op != OpAMD64CMPBconst {
8311                                 goto end95b5b21dd7756ae41575759a1eff2bea
8312                         }
8313                         c := v.Args[0].AuxInt
8314                         if v.Args[0].Args[0].Op != OpAMD64MOVBconst {
8315                                 goto end95b5b21dd7756ae41575759a1eff2bea
8316                         }
8317                         d := v.Args[0].Args[0].AuxInt
8318                         if !(!inBounds8(d, c)) {
8319                                 goto end95b5b21dd7756ae41575759a1eff2bea
8320                         }
8321                         v.Op = OpAMD64MOVLconst
8322                         v.AuxInt = 0
8323                         v.Aux = nil
8324                         v.resetArgs()
8325                         v.AuxInt = 0
8326                         return true
8327                 }
8328                 goto end95b5b21dd7756ae41575759a1eff2bea
8329         end95b5b21dd7756ae41575759a1eff2bea:
8330                 ;
8331         case OpAMD64SBBQcarrymask:
8332                 // match: (SBBQcarrymask (CMPQconst [c] (MOVQconst [d])))
8333                 // cond: inBounds64(d, c)
8334                 // result: (MOVQconst [-1])
8335                 {
8336                         if v.Args[0].Op != OpAMD64CMPQconst {
8337                                 goto end0c26df98feb38f149eca12f33c15de1b
8338                         }
8339                         c := v.Args[0].AuxInt
8340                         if v.Args[0].Args[0].Op != OpAMD64MOVQconst {
8341                                 goto end0c26df98feb38f149eca12f33c15de1b
8342                         }
8343                         d := v.Args[0].Args[0].AuxInt
8344                         if !(inBounds64(d, c)) {
8345                                 goto end0c26df98feb38f149eca12f33c15de1b
8346                         }
8347                         v.Op = OpAMD64MOVQconst
8348                         v.AuxInt = 0
8349                         v.Aux = nil
8350                         v.resetArgs()
8351                         v.AuxInt = -1
8352                         return true
8353                 }
8354                 goto end0c26df98feb38f149eca12f33c15de1b
8355         end0c26df98feb38f149eca12f33c15de1b:
8356                 ;
8357                 // match: (SBBQcarrymask (CMPQconst [c] (MOVQconst [d])))
8358                 // cond: !inBounds64(d, c)
8359                 // result: (MOVQconst [0])
8360                 {
8361                         if v.Args[0].Op != OpAMD64CMPQconst {
8362                                 goto end8965aa1e1153e5ecd123bbb31a618570
8363                         }
8364                         c := v.Args[0].AuxInt
8365                         if v.Args[0].Args[0].Op != OpAMD64MOVQconst {
8366                                 goto end8965aa1e1153e5ecd123bbb31a618570
8367                         }
8368                         d := v.Args[0].Args[0].AuxInt
8369                         if !(!inBounds64(d, c)) {
8370                                 goto end8965aa1e1153e5ecd123bbb31a618570
8371                         }
8372                         v.Op = OpAMD64MOVQconst
8373                         v.AuxInt = 0
8374                         v.Aux = nil
8375                         v.resetArgs()
8376                         v.AuxInt = 0
8377                         return true
8378                 }
8379                 goto end8965aa1e1153e5ecd123bbb31a618570
8380         end8965aa1e1153e5ecd123bbb31a618570:
8381                 ;
8382                 // match: (SBBQcarrymask (CMPLconst [c] (MOVLconst [d])))
8383                 // cond: inBounds32(d, c)
8384                 // result: (MOVQconst [-1])
8385                 {
8386                         if v.Args[0].Op != OpAMD64CMPLconst {
8387                                 goto end8772ede6098981a61af0f478841d7d54
8388                         }
8389                         c := v.Args[0].AuxInt
8390                         if v.Args[0].Args[0].Op != OpAMD64MOVLconst {
8391                                 goto end8772ede6098981a61af0f478841d7d54
8392                         }
8393                         d := v.Args[0].Args[0].AuxInt
8394                         if !(inBounds32(d, c)) {
8395                                 goto end8772ede6098981a61af0f478841d7d54
8396                         }
8397                         v.Op = OpAMD64MOVQconst
8398                         v.AuxInt = 0
8399                         v.Aux = nil
8400                         v.resetArgs()
8401                         v.AuxInt = -1
8402                         return true
8403                 }
8404                 goto end8772ede6098981a61af0f478841d7d54
8405         end8772ede6098981a61af0f478841d7d54:
8406                 ;
8407                 // match: (SBBQcarrymask (CMPLconst [c] (MOVLconst [d])))
8408                 // cond: !inBounds32(d, c)
8409                 // result: (MOVQconst [0])
8410                 {
8411                         if v.Args[0].Op != OpAMD64CMPLconst {
8412                                 goto end2d535e90075ee777fc616e6b9847a384
8413                         }
8414                         c := v.Args[0].AuxInt
8415                         if v.Args[0].Args[0].Op != OpAMD64MOVLconst {
8416                                 goto end2d535e90075ee777fc616e6b9847a384
8417                         }
8418                         d := v.Args[0].Args[0].AuxInt
8419                         if !(!inBounds32(d, c)) {
8420                                 goto end2d535e90075ee777fc616e6b9847a384
8421                         }
8422                         v.Op = OpAMD64MOVQconst
8423                         v.AuxInt = 0
8424                         v.Aux = nil
8425                         v.resetArgs()
8426                         v.AuxInt = 0
8427                         return true
8428                 }
8429                 goto end2d535e90075ee777fc616e6b9847a384
8430         end2d535e90075ee777fc616e6b9847a384:
8431                 ;
8432                 // match: (SBBQcarrymask (CMPWconst [c] (MOVWconst [d])))
8433                 // cond: inBounds16(d, c)
8434                 // result: (MOVQconst [-1])
8435                 {
8436                         if v.Args[0].Op != OpAMD64CMPWconst {
8437                                 goto end3103c51e14b4fc894b4170f16f37eebc
8438                         }
8439                         c := v.Args[0].AuxInt
8440                         if v.Args[0].Args[0].Op != OpAMD64MOVWconst {
8441                                 goto end3103c51e14b4fc894b4170f16f37eebc
8442                         }
8443                         d := v.Args[0].Args[0].AuxInt
8444                         if !(inBounds16(d, c)) {
8445                                 goto end3103c51e14b4fc894b4170f16f37eebc
8446                         }
8447                         v.Op = OpAMD64MOVQconst
8448                         v.AuxInt = 0
8449                         v.Aux = nil
8450                         v.resetArgs()
8451                         v.AuxInt = -1
8452                         return true
8453                 }
8454                 goto end3103c51e14b4fc894b4170f16f37eebc
8455         end3103c51e14b4fc894b4170f16f37eebc:
8456                 ;
8457                 // match: (SBBQcarrymask (CMPWconst [c] (MOVWconst [d])))
8458                 // cond: !inBounds16(d, c)
8459                 // result: (MOVQconst [0])
8460                 {
8461                         if v.Args[0].Op != OpAMD64CMPWconst {
8462                                 goto enddae2191a59cfef5efb04ebab9354745c
8463                         }
8464                         c := v.Args[0].AuxInt
8465                         if v.Args[0].Args[0].Op != OpAMD64MOVWconst {
8466                                 goto enddae2191a59cfef5efb04ebab9354745c
8467                         }
8468                         d := v.Args[0].Args[0].AuxInt
8469                         if !(!inBounds16(d, c)) {
8470                                 goto enddae2191a59cfef5efb04ebab9354745c
8471                         }
8472                         v.Op = OpAMD64MOVQconst
8473                         v.AuxInt = 0
8474                         v.Aux = nil
8475                         v.resetArgs()
8476                         v.AuxInt = 0
8477                         return true
8478                 }
8479                 goto enddae2191a59cfef5efb04ebab9354745c
8480         enddae2191a59cfef5efb04ebab9354745c:
8481                 ;
8482                 // match: (SBBQcarrymask (CMPBconst [c] (MOVBconst [d])))
8483                 // cond: inBounds8(d, c)
8484                 // result: (MOVQconst [-1])
8485                 {
8486                         if v.Args[0].Op != OpAMD64CMPBconst {
8487                                 goto end72e088325ca005b0251b1ee82da3c5d9
8488                         }
8489                         c := v.Args[0].AuxInt
8490                         if v.Args[0].Args[0].Op != OpAMD64MOVBconst {
8491                                 goto end72e088325ca005b0251b1ee82da3c5d9
8492                         }
8493                         d := v.Args[0].Args[0].AuxInt
8494                         if !(inBounds8(d, c)) {
8495                                 goto end72e088325ca005b0251b1ee82da3c5d9
8496                         }
8497                         v.Op = OpAMD64MOVQconst
8498                         v.AuxInt = 0
8499                         v.Aux = nil
8500                         v.resetArgs()
8501                         v.AuxInt = -1
8502                         return true
8503                 }
8504                 goto end72e088325ca005b0251b1ee82da3c5d9
8505         end72e088325ca005b0251b1ee82da3c5d9:
8506                 ;
8507                 // match: (SBBQcarrymask (CMPBconst [c] (MOVBconst [d])))
8508                 // cond: !inBounds8(d, c)
8509                 // result: (MOVQconst [0])
8510                 {
8511                         if v.Args[0].Op != OpAMD64CMPBconst {
8512                                 goto endcb388100f5b933aa94095096d2bb425e
8513                         }
8514                         c := v.Args[0].AuxInt
8515                         if v.Args[0].Args[0].Op != OpAMD64MOVBconst {
8516                                 goto endcb388100f5b933aa94095096d2bb425e
8517                         }
8518                         d := v.Args[0].Args[0].AuxInt
8519                         if !(!inBounds8(d, c)) {
8520                                 goto endcb388100f5b933aa94095096d2bb425e
8521                         }
8522                         v.Op = OpAMD64MOVQconst
8523                         v.AuxInt = 0
8524                         v.Aux = nil
8525                         v.resetArgs()
8526                         v.AuxInt = 0
8527                         return true
8528                 }
8529                 goto endcb388100f5b933aa94095096d2bb425e
8530         endcb388100f5b933aa94095096d2bb425e:
8531                 ;
8532         case OpAMD64SETA:
8533                 // match: (SETA (InvertFlags x))
8534                 // cond:
8535                 // result: (SETB x)
8536                 {
8537                         if v.Args[0].Op != OpAMD64InvertFlags {
8538                                 goto enda4ac36e94fc279d762b5a6c7c6cc665d
8539                         }
8540                         x := v.Args[0].Args[0]
8541                         v.Op = OpAMD64SETB
8542                         v.AuxInt = 0
8543                         v.Aux = nil
8544                         v.resetArgs()
8545                         v.AddArg(x)
8546                         return true
8547                 }
8548                 goto enda4ac36e94fc279d762b5a6c7c6cc665d
8549         enda4ac36e94fc279d762b5a6c7c6cc665d:
8550                 ;
8551         case OpAMD64SETAE:
8552                 // match: (SETAE (InvertFlags x))
8553                 // cond:
8554                 // result: (SETBE x)
8555                 {
8556                         if v.Args[0].Op != OpAMD64InvertFlags {
8557                                 goto end0468f5be6caf682fdea6b91d6648991e
8558                         }
8559                         x := v.Args[0].Args[0]
8560                         v.Op = OpAMD64SETBE
8561                         v.AuxInt = 0
8562                         v.Aux = nil
8563                         v.resetArgs()
8564                         v.AddArg(x)
8565                         return true
8566                 }
8567                 goto end0468f5be6caf682fdea6b91d6648991e
8568         end0468f5be6caf682fdea6b91d6648991e:
8569                 ;
8570         case OpAMD64SETB:
8571                 // match: (SETB (InvertFlags x))
8572                 // cond:
8573                 // result: (SETA x)
8574                 {
8575                         if v.Args[0].Op != OpAMD64InvertFlags {
8576                                 goto endc9eba7aa1e54a228570d2f5cc96f3565
8577                         }
8578                         x := v.Args[0].Args[0]
8579                         v.Op = OpAMD64SETA
8580                         v.AuxInt = 0
8581                         v.Aux = nil
8582                         v.resetArgs()
8583                         v.AddArg(x)
8584                         return true
8585                 }
8586                 goto endc9eba7aa1e54a228570d2f5cc96f3565
8587         endc9eba7aa1e54a228570d2f5cc96f3565:
8588                 ;
8589         case OpAMD64SETBE:
8590                 // match: (SETBE (InvertFlags x))
8591                 // cond:
8592                 // result: (SETAE x)
8593                 {
8594                         if v.Args[0].Op != OpAMD64InvertFlags {
8595                                 goto end9d9031643469798b14b8cad1f5a7a1ba
8596                         }
8597                         x := v.Args[0].Args[0]
8598                         v.Op = OpAMD64SETAE
8599                         v.AuxInt = 0
8600                         v.Aux = nil
8601                         v.resetArgs()
8602                         v.AddArg(x)
8603                         return true
8604                 }
8605                 goto end9d9031643469798b14b8cad1f5a7a1ba
8606         end9d9031643469798b14b8cad1f5a7a1ba:
8607                 ;
8608         case OpAMD64SETEQ:
8609                 // match: (SETEQ (InvertFlags x))
8610                 // cond:
8611                 // result: (SETEQ x)
8612                 {
8613                         if v.Args[0].Op != OpAMD64InvertFlags {
8614                                 goto end5d2039c9368d8c0cfba23b5a85b459e1
8615                         }
8616                         x := v.Args[0].Args[0]
8617                         v.Op = OpAMD64SETEQ
8618                         v.AuxInt = 0
8619                         v.Aux = nil
8620                         v.resetArgs()
8621                         v.AddArg(x)
8622                         return true
8623                 }
8624                 goto end5d2039c9368d8c0cfba23b5a85b459e1
8625         end5d2039c9368d8c0cfba23b5a85b459e1:
8626                 ;
8627         case OpAMD64SETG:
8628                 // match: (SETG (InvertFlags x))
8629                 // cond:
8630                 // result: (SETL x)
8631                 {
8632                         if v.Args[0].Op != OpAMD64InvertFlags {
8633                                 goto endf7586738694c9cd0b74ae28bbadb649f
8634                         }
8635                         x := v.Args[0].Args[0]
8636                         v.Op = OpAMD64SETL
8637                         v.AuxInt = 0
8638                         v.Aux = nil
8639                         v.resetArgs()
8640                         v.AddArg(x)
8641                         return true
8642                 }
8643                 goto endf7586738694c9cd0b74ae28bbadb649f
8644         endf7586738694c9cd0b74ae28bbadb649f:
8645                 ;
8646         case OpAMD64SETGE:
8647                 // match: (SETGE (InvertFlags x))
8648                 // cond:
8649                 // result: (SETLE x)
8650                 {
8651                         if v.Args[0].Op != OpAMD64InvertFlags {
8652                                 goto end82c11eff6f842159f564f2dad3d2eedc
8653                         }
8654                         x := v.Args[0].Args[0]
8655                         v.Op = OpAMD64SETLE
8656                         v.AuxInt = 0
8657                         v.Aux = nil
8658                         v.resetArgs()
8659                         v.AddArg(x)
8660                         return true
8661                 }
8662                 goto end82c11eff6f842159f564f2dad3d2eedc
8663         end82c11eff6f842159f564f2dad3d2eedc:
8664                 ;
8665         case OpAMD64SETL:
8666                 // match: (SETL (InvertFlags x))
8667                 // cond:
8668                 // result: (SETG x)
8669                 {
8670                         if v.Args[0].Op != OpAMD64InvertFlags {
8671                                 goto ende33160cd86b9d4d3b77e02fb4658d5d3
8672                         }
8673                         x := v.Args[0].Args[0]
8674                         v.Op = OpAMD64SETG
8675                         v.AuxInt = 0
8676                         v.Aux = nil
8677                         v.resetArgs()
8678                         v.AddArg(x)
8679                         return true
8680                 }
8681                 goto ende33160cd86b9d4d3b77e02fb4658d5d3
8682         ende33160cd86b9d4d3b77e02fb4658d5d3:
8683                 ;
8684         case OpAMD64SETLE:
8685                 // match: (SETLE (InvertFlags x))
8686                 // cond:
8687                 // result: (SETGE x)
8688                 {
8689                         if v.Args[0].Op != OpAMD64InvertFlags {
8690                                 goto end9307d96753efbeb888d1c98a6aba7a29
8691                         }
8692                         x := v.Args[0].Args[0]
8693                         v.Op = OpAMD64SETGE
8694                         v.AuxInt = 0
8695                         v.Aux = nil
8696                         v.resetArgs()
8697                         v.AddArg(x)
8698                         return true
8699                 }
8700                 goto end9307d96753efbeb888d1c98a6aba7a29
8701         end9307d96753efbeb888d1c98a6aba7a29:
8702                 ;
8703         case OpAMD64SETNE:
8704                 // match: (SETNE (InvertFlags x))
8705                 // cond:
8706                 // result: (SETNE x)
8707                 {
8708                         if v.Args[0].Op != OpAMD64InvertFlags {
8709                                 goto endbc71811b789475308014550f638026eb
8710                         }
8711                         x := v.Args[0].Args[0]
8712                         v.Op = OpAMD64SETNE
8713                         v.AuxInt = 0
8714                         v.Aux = nil
8715                         v.resetArgs()
8716                         v.AddArg(x)
8717                         return true
8718                 }
8719                 goto endbc71811b789475308014550f638026eb
8720         endbc71811b789475308014550f638026eb:
8721                 ;
8722         case OpAMD64SHLB:
8723                 // match: (SHLB x (MOVBconst [c]))
8724                 // cond:
8725                 // result: (SHLBconst [c&31] x)
8726                 {
8727                         x := v.Args[0]
8728                         if v.Args[1].Op != OpAMD64MOVBconst {
8729                                 goto end2d0d0111d831d8a575b5627284a6337a
8730                         }
8731                         c := v.Args[1].AuxInt
8732                         v.Op = OpAMD64SHLBconst
8733                         v.AuxInt = 0
8734                         v.Aux = nil
8735                         v.resetArgs()
8736                         v.AuxInt = c & 31
8737                         v.AddArg(x)
8738                         return true
8739                 }
8740                 goto end2d0d0111d831d8a575b5627284a6337a
8741         end2d0d0111d831d8a575b5627284a6337a:
8742                 ;
8743         case OpAMD64SHLL:
8744                 // match: (SHLL x (MOVLconst [c]))
8745                 // cond:
8746                 // result: (SHLLconst [c&31] x)
8747                 {
8748                         x := v.Args[0]
8749                         if v.Args[1].Op != OpAMD64MOVLconst {
8750                                 goto end633f9ddcfbb63374c895a5f78da75d25
8751                         }
8752                         c := v.Args[1].AuxInt
8753                         v.Op = OpAMD64SHLLconst
8754                         v.AuxInt = 0
8755                         v.Aux = nil
8756                         v.resetArgs()
8757                         v.AuxInt = c & 31
8758                         v.AddArg(x)
8759                         return true
8760                 }
8761                 goto end633f9ddcfbb63374c895a5f78da75d25
8762         end633f9ddcfbb63374c895a5f78da75d25:
8763                 ;
8764         case OpAMD64SHLQ:
8765                 // match: (SHLQ x (MOVQconst [c]))
8766                 // cond:
8767                 // result: (SHLQconst [c&63] x)
8768                 {
8769                         x := v.Args[0]
8770                         if v.Args[1].Op != OpAMD64MOVQconst {
8771                                 goto end4d7e3a945cacdd6b6c8c0de6f465d4ae
8772                         }
8773                         c := v.Args[1].AuxInt
8774                         v.Op = OpAMD64SHLQconst
8775                         v.AuxInt = 0
8776                         v.Aux = nil
8777                         v.resetArgs()
8778                         v.AuxInt = c & 63
8779                         v.AddArg(x)
8780                         return true
8781                 }
8782                 goto end4d7e3a945cacdd6b6c8c0de6f465d4ae
8783         end4d7e3a945cacdd6b6c8c0de6f465d4ae:
8784                 ;
8785         case OpAMD64SHLW:
8786                 // match: (SHLW x (MOVWconst [c]))
8787                 // cond:
8788                 // result: (SHLWconst [c&31] x)
8789                 {
8790                         x := v.Args[0]
8791                         if v.Args[1].Op != OpAMD64MOVWconst {
8792                                 goto endba96a52aa58d28b3357828051e0e695c
8793                         }
8794                         c := v.Args[1].AuxInt
8795                         v.Op = OpAMD64SHLWconst
8796                         v.AuxInt = 0
8797                         v.Aux = nil
8798                         v.resetArgs()
8799                         v.AuxInt = c & 31
8800                         v.AddArg(x)
8801                         return true
8802                 }
8803                 goto endba96a52aa58d28b3357828051e0e695c
8804         endba96a52aa58d28b3357828051e0e695c:
8805                 ;
8806         case OpAMD64SHRB:
8807                 // match: (SHRB x (MOVBconst [c]))
8808                 // cond:
8809                 // result: (SHRBconst [c&31] x)
8810                 {
8811                         x := v.Args[0]
8812                         if v.Args[1].Op != OpAMD64MOVBconst {
8813                                 goto enddb1cd5aaa826d43fa4f6d1b2b8795e58
8814                         }
8815                         c := v.Args[1].AuxInt
8816                         v.Op = OpAMD64SHRBconst
8817                         v.AuxInt = 0
8818                         v.Aux = nil
8819                         v.resetArgs()
8820                         v.AuxInt = c & 31
8821                         v.AddArg(x)
8822                         return true
8823                 }
8824                 goto enddb1cd5aaa826d43fa4f6d1b2b8795e58
8825         enddb1cd5aaa826d43fa4f6d1b2b8795e58:
8826                 ;
8827         case OpAMD64SHRL:
8828                 // match: (SHRL x (MOVLconst [c]))
8829                 // cond:
8830                 // result: (SHRLconst [c&31] x)
8831                 {
8832                         x := v.Args[0]
8833                         if v.Args[1].Op != OpAMD64MOVLconst {
8834                                 goto end344b8b9202e1925e8d0561f1c21412fc
8835                         }
8836                         c := v.Args[1].AuxInt
8837                         v.Op = OpAMD64SHRLconst
8838                         v.AuxInt = 0
8839                         v.Aux = nil
8840                         v.resetArgs()
8841                         v.AuxInt = c & 31
8842                         v.AddArg(x)
8843                         return true
8844                 }
8845                 goto end344b8b9202e1925e8d0561f1c21412fc
8846         end344b8b9202e1925e8d0561f1c21412fc:
8847                 ;
8848         case OpAMD64SHRQ:
8849                 // match: (SHRQ x (MOVQconst [c]))
8850                 // cond:
8851                 // result: (SHRQconst [c&63] x)
8852                 {
8853                         x := v.Args[0]
8854                         if v.Args[1].Op != OpAMD64MOVQconst {
8855                                 goto end699d35e2d5cfa08b8a3b1c8a183ddcf3
8856                         }
8857                         c := v.Args[1].AuxInt
8858                         v.Op = OpAMD64SHRQconst
8859                         v.AuxInt = 0
8860                         v.Aux = nil
8861                         v.resetArgs()
8862                         v.AuxInt = c & 63
8863                         v.AddArg(x)
8864                         return true
8865                 }
8866                 goto end699d35e2d5cfa08b8a3b1c8a183ddcf3
8867         end699d35e2d5cfa08b8a3b1c8a183ddcf3:
8868                 ;
8869         case OpAMD64SHRW:
8870                 // match: (SHRW x (MOVWconst [c]))
8871                 // cond:
8872                 // result: (SHRWconst [c&31] x)
8873                 {
8874                         x := v.Args[0]
8875                         if v.Args[1].Op != OpAMD64MOVWconst {
8876                                 goto endd75ff1f9b3e9ec9c942a39b6179da1b3
8877                         }
8878                         c := v.Args[1].AuxInt
8879                         v.Op = OpAMD64SHRWconst
8880                         v.AuxInt = 0
8881                         v.Aux = nil
8882                         v.resetArgs()
8883                         v.AuxInt = c & 31
8884                         v.AddArg(x)
8885                         return true
8886                 }
8887                 goto endd75ff1f9b3e9ec9c942a39b6179da1b3
8888         endd75ff1f9b3e9ec9c942a39b6179da1b3:
8889                 ;
8890         case OpAMD64SUBB:
8891                 // match: (SUBB x (MOVBconst [c]))
8892                 // cond:
8893                 // result: (SUBBconst x [c])
8894                 {
8895                         x := v.Args[0]
8896                         if v.Args[1].Op != OpAMD64MOVBconst {
8897                                 goto end9ca5d2a70e2df1a5a3ed6786bce1f7b2
8898                         }
8899                         c := v.Args[1].AuxInt
8900                         v.Op = OpAMD64SUBBconst
8901                         v.AuxInt = 0
8902                         v.Aux = nil
8903                         v.resetArgs()
8904                         v.AddArg(x)
8905                         v.AuxInt = c
8906                         return true
8907                 }
8908                 goto end9ca5d2a70e2df1a5a3ed6786bce1f7b2
8909         end9ca5d2a70e2df1a5a3ed6786bce1f7b2:
8910                 ;
8911                 // match: (SUBB (MOVBconst [c]) x)
8912                 // cond:
8913                 // result: (NEGB (SUBBconst <v.Type> x [c]))
8914                 {
8915                         if v.Args[0].Op != OpAMD64MOVBconst {
8916                                 goto endc288755d69b04d24a6aac32a73956411
8917                         }
8918                         c := v.Args[0].AuxInt
8919                         x := v.Args[1]
8920                         v.Op = OpAMD64NEGB
8921                         v.AuxInt = 0
8922                         v.Aux = nil
8923                         v.resetArgs()
8924                         v0 := b.NewValue0(v.Line, OpAMD64SUBBconst, TypeInvalid)
8925                         v0.Type = v.Type
8926                         v0.AddArg(x)
8927                         v0.AuxInt = c
8928                         v.AddArg(v0)
8929                         return true
8930                 }
8931                 goto endc288755d69b04d24a6aac32a73956411
8932         endc288755d69b04d24a6aac32a73956411:
8933                 ;
8934                 // match: (SUBB x x)
8935                 // cond:
8936                 // result: (MOVBconst [0])
8937                 {
8938                         x := v.Args[0]
8939                         if v.Args[1] != x {
8940                                 goto ende8904403d937d95b0d6133d3ec92bb45
8941                         }
8942                         v.Op = OpAMD64MOVBconst
8943                         v.AuxInt = 0
8944                         v.Aux = nil
8945                         v.resetArgs()
8946                         v.AuxInt = 0
8947                         return true
8948                 }
8949                 goto ende8904403d937d95b0d6133d3ec92bb45
8950         ende8904403d937d95b0d6133d3ec92bb45:
8951                 ;
8952         case OpAMD64SUBBconst:
8953                 // match: (SUBBconst [c] (MOVBconst [d]))
8954                 // cond:
8955                 // result: (MOVBconst [d-c])
8956                 {
8957                         c := v.AuxInt
8958                         if v.Args[0].Op != OpAMD64MOVBconst {
8959                                 goto enddc5383558e2f3eae507afcb94eada964
8960                         }
8961                         d := v.Args[0].AuxInt
8962                         v.Op = OpAMD64MOVBconst
8963                         v.AuxInt = 0
8964                         v.Aux = nil
8965                         v.resetArgs()
8966                         v.AuxInt = d - c
8967                         return true
8968                 }
8969                 goto enddc5383558e2f3eae507afcb94eada964
8970         enddc5383558e2f3eae507afcb94eada964:
8971                 ;
8972                 // match: (SUBBconst [c] (SUBBconst [d] x))
8973                 // cond:
8974                 // result: (ADDBconst [-c-d] x)
8975                 {
8976                         c := v.AuxInt
8977                         if v.Args[0].Op != OpAMD64SUBBconst {
8978                                 goto end035c57413a46eb347ecb3736d1510915
8979                         }
8980                         d := v.Args[0].AuxInt
8981                         x := v.Args[0].Args[0]
8982                         v.Op = OpAMD64ADDBconst
8983                         v.AuxInt = 0
8984                         v.Aux = nil
8985                         v.resetArgs()
8986                         v.AuxInt = -c - d
8987                         v.AddArg(x)
8988                         return true
8989                 }
8990                 goto end035c57413a46eb347ecb3736d1510915
8991         end035c57413a46eb347ecb3736d1510915:
8992                 ;
8993         case OpAMD64SUBL:
8994                 // match: (SUBL x (MOVLconst [c]))
8995                 // cond:
8996                 // result: (SUBLconst x [c])
8997                 {
8998                         x := v.Args[0]
8999                         if v.Args[1].Op != OpAMD64MOVLconst {
9000                                 goto end178c1d6c86f9c16f6497586c2f7d8625
9001                         }
9002                         c := v.Args[1].AuxInt
9003                         v.Op = OpAMD64SUBLconst
9004                         v.AuxInt = 0
9005                         v.Aux = nil
9006                         v.resetArgs()
9007                         v.AddArg(x)
9008                         v.AuxInt = c
9009                         return true
9010                 }
9011                 goto end178c1d6c86f9c16f6497586c2f7d8625
9012         end178c1d6c86f9c16f6497586c2f7d8625:
9013                 ;
9014                 // match: (SUBL (MOVLconst [c]) x)
9015                 // cond:
9016                 // result: (NEGL (SUBLconst <v.Type> x [c]))
9017                 {
9018                         if v.Args[0].Op != OpAMD64MOVLconst {
9019                                 goto endb0efe6e15ec20486b849534a00483ae2
9020                         }
9021                         c := v.Args[0].AuxInt
9022                         x := v.Args[1]
9023                         v.Op = OpAMD64NEGL
9024                         v.AuxInt = 0
9025                         v.Aux = nil
9026                         v.resetArgs()
9027                         v0 := b.NewValue0(v.Line, OpAMD64SUBLconst, TypeInvalid)
9028                         v0.Type = v.Type
9029                         v0.AddArg(x)
9030                         v0.AuxInt = c
9031                         v.AddArg(v0)
9032                         return true
9033                 }
9034                 goto endb0efe6e15ec20486b849534a00483ae2
9035         endb0efe6e15ec20486b849534a00483ae2:
9036                 ;
9037                 // match: (SUBL x x)
9038                 // cond:
9039                 // result: (MOVLconst [0])
9040                 {
9041                         x := v.Args[0]
9042                         if v.Args[1] != x {
9043                                 goto end332f1f641f875c69bea7289191e69133
9044                         }
9045                         v.Op = OpAMD64MOVLconst
9046                         v.AuxInt = 0
9047                         v.Aux = nil
9048                         v.resetArgs()
9049                         v.AuxInt = 0
9050                         return true
9051                 }
9052                 goto end332f1f641f875c69bea7289191e69133
9053         end332f1f641f875c69bea7289191e69133:
9054                 ;
9055         case OpAMD64SUBLconst:
9056                 // match: (SUBLconst [c] (MOVLconst [d]))
9057                 // cond:
9058                 // result: (MOVLconst [d-c])
9059                 {
9060                         c := v.AuxInt
9061                         if v.Args[0].Op != OpAMD64MOVLconst {
9062                                 goto end6c5c6d58d4bdd0a5c2f7bf10b343b41e
9063                         }
9064                         d := v.Args[0].AuxInt
9065                         v.Op = OpAMD64MOVLconst
9066                         v.AuxInt = 0
9067                         v.Aux = nil
9068                         v.resetArgs()
9069                         v.AuxInt = d - c
9070                         return true
9071                 }
9072                 goto end6c5c6d58d4bdd0a5c2f7bf10b343b41e
9073         end6c5c6d58d4bdd0a5c2f7bf10b343b41e:
9074                 ;
9075                 // match: (SUBLconst [c] (SUBLconst [d] x))
9076                 // cond:
9077                 // result: (ADDLconst [-c-d] x)
9078                 {
9079                         c := v.AuxInt
9080                         if v.Args[0].Op != OpAMD64SUBLconst {
9081                                 goto end0c9ffb11e8a56ced1b14dbf6bf9a6737
9082                         }
9083                         d := v.Args[0].AuxInt
9084                         x := v.Args[0].Args[0]
9085                         v.Op = OpAMD64ADDLconst
9086                         v.AuxInt = 0
9087                         v.Aux = nil
9088                         v.resetArgs()
9089                         v.AuxInt = -c - d
9090                         v.AddArg(x)
9091                         return true
9092                 }
9093                 goto end0c9ffb11e8a56ced1b14dbf6bf9a6737
9094         end0c9ffb11e8a56ced1b14dbf6bf9a6737:
9095                 ;
9096         case OpAMD64SUBQ:
9097                 // match: (SUBQ x (MOVQconst [c]))
9098                 // cond: is32Bit(c)
9099                 // result: (SUBQconst x [c])
9100                 {
9101                         x := v.Args[0]
9102                         if v.Args[1].Op != OpAMD64MOVQconst {
9103                                 goto end9bbb7b20824a498752c605942fad89c2
9104                         }
9105                         c := v.Args[1].AuxInt
9106                         if !(is32Bit(c)) {
9107                                 goto end9bbb7b20824a498752c605942fad89c2
9108                         }
9109                         v.Op = OpAMD64SUBQconst
9110                         v.AuxInt = 0
9111                         v.Aux = nil
9112                         v.resetArgs()
9113                         v.AddArg(x)
9114                         v.AuxInt = c
9115                         return true
9116                 }
9117                 goto end9bbb7b20824a498752c605942fad89c2
9118         end9bbb7b20824a498752c605942fad89c2:
9119                 ;
9120                 // match: (SUBQ (MOVQconst [c]) x)
9121                 // cond: is32Bit(c)
9122                 // result: (NEGQ (SUBQconst <v.Type> x [c]))
9123                 {
9124                         if v.Args[0].Op != OpAMD64MOVQconst {
9125                                 goto end8beb96de3efee9206d1bd4b7d777d2cb
9126                         }
9127                         c := v.Args[0].AuxInt
9128                         x := v.Args[1]
9129                         if !(is32Bit(c)) {
9130                                 goto end8beb96de3efee9206d1bd4b7d777d2cb
9131                         }
9132                         v.Op = OpAMD64NEGQ
9133                         v.AuxInt = 0
9134                         v.Aux = nil
9135                         v.resetArgs()
9136                         v0 := b.NewValue0(v.Line, OpAMD64SUBQconst, TypeInvalid)
9137                         v0.Type = v.Type
9138                         v0.AddArg(x)
9139                         v0.AuxInt = c
9140                         v.AddArg(v0)
9141                         return true
9142                 }
9143                 goto end8beb96de3efee9206d1bd4b7d777d2cb
9144         end8beb96de3efee9206d1bd4b7d777d2cb:
9145                 ;
9146                 // match: (SUBQ x x)
9147                 // cond:
9148                 // result: (MOVQconst [0])
9149                 {
9150                         x := v.Args[0]
9151                         if v.Args[1] != x {
9152                                 goto endd87d1d839d2dc54d9c90fa4f73383480
9153                         }
9154                         v.Op = OpAMD64MOVQconst
9155                         v.AuxInt = 0
9156                         v.Aux = nil
9157                         v.resetArgs()
9158                         v.AuxInt = 0
9159                         return true
9160                 }
9161                 goto endd87d1d839d2dc54d9c90fa4f73383480
9162         endd87d1d839d2dc54d9c90fa4f73383480:
9163                 ;
9164         case OpAMD64SUBQconst:
9165                 // match: (SUBQconst [c] (MOVQconst [d]))
9166                 // cond:
9167                 // result: (MOVQconst [d-c])
9168                 {
9169                         c := v.AuxInt
9170                         if v.Args[0].Op != OpAMD64MOVQconst {
9171                                 goto endb0daebe6831cf381377c3e4248070f25
9172                         }
9173                         d := v.Args[0].AuxInt
9174                         v.Op = OpAMD64MOVQconst
9175                         v.AuxInt = 0
9176                         v.Aux = nil
9177                         v.resetArgs()
9178                         v.AuxInt = d - c
9179                         return true
9180                 }
9181                 goto endb0daebe6831cf381377c3e4248070f25
9182         endb0daebe6831cf381377c3e4248070f25:
9183                 ;
9184                 // match: (SUBQconst [c] (SUBQconst [d] x))
9185                 // cond:
9186                 // result: (ADDQconst [-c-d] x)
9187                 {
9188                         c := v.AuxInt
9189                         if v.Args[0].Op != OpAMD64SUBQconst {
9190                                 goto end2d40ddb5ae9e90679456254c61858d9d
9191                         }
9192                         d := v.Args[0].AuxInt
9193                         x := v.Args[0].Args[0]
9194                         v.Op = OpAMD64ADDQconst
9195                         v.AuxInt = 0
9196                         v.Aux = nil
9197                         v.resetArgs()
9198                         v.AuxInt = -c - d
9199                         v.AddArg(x)
9200                         return true
9201                 }
9202                 goto end2d40ddb5ae9e90679456254c61858d9d
9203         end2d40ddb5ae9e90679456254c61858d9d:
9204                 ;
9205         case OpAMD64SUBW:
9206                 // match: (SUBW x (MOVWconst [c]))
9207                 // cond:
9208                 // result: (SUBWconst x [c])
9209                 {
9210                         x := v.Args[0]
9211                         if v.Args[1].Op != OpAMD64MOVWconst {
9212                                 goto end135aa9100b2f61d58b37cede37b63731
9213                         }
9214                         c := v.Args[1].AuxInt
9215                         v.Op = OpAMD64SUBWconst
9216                         v.AuxInt = 0
9217                         v.Aux = nil
9218                         v.resetArgs()
9219                         v.AddArg(x)
9220                         v.AuxInt = c
9221                         return true
9222                 }
9223                 goto end135aa9100b2f61d58b37cede37b63731
9224         end135aa9100b2f61d58b37cede37b63731:
9225                 ;
9226                 // match: (SUBW (MOVWconst [c]) x)
9227                 // cond:
9228                 // result: (NEGW (SUBWconst <v.Type> x [c]))
9229                 {
9230                         if v.Args[0].Op != OpAMD64MOVWconst {
9231                                 goto end44d23f7e65a4b1c42d0e6463f8e493b6
9232                         }
9233                         c := v.Args[0].AuxInt
9234                         x := v.Args[1]
9235                         v.Op = OpAMD64NEGW
9236                         v.AuxInt = 0
9237                         v.Aux = nil
9238                         v.resetArgs()
9239                         v0 := b.NewValue0(v.Line, OpAMD64SUBWconst, TypeInvalid)
9240                         v0.Type = v.Type
9241                         v0.AddArg(x)
9242                         v0.AuxInt = c
9243                         v.AddArg(v0)
9244                         return true
9245                 }
9246                 goto end44d23f7e65a4b1c42d0e6463f8e493b6
9247         end44d23f7e65a4b1c42d0e6463f8e493b6:
9248                 ;
9249                 // match: (SUBW x x)
9250                 // cond:
9251                 // result: (MOVWconst [0])
9252                 {
9253                         x := v.Args[0]
9254                         if v.Args[1] != x {
9255                                 goto endb970e7c318d04a1afe1dfe08a7ca0d9c
9256                         }
9257                         v.Op = OpAMD64MOVWconst
9258                         v.AuxInt = 0
9259                         v.Aux = nil
9260                         v.resetArgs()
9261                         v.AuxInt = 0
9262                         return true
9263                 }
9264                 goto endb970e7c318d04a1afe1dfe08a7ca0d9c
9265         endb970e7c318d04a1afe1dfe08a7ca0d9c:
9266                 ;
9267         case OpAMD64SUBWconst:
9268                 // match: (SUBWconst [c] (MOVWconst [d]))
9269                 // cond:
9270                 // result: (MOVWconst [d-c])
9271                 {
9272                         c := v.AuxInt
9273                         if v.Args[0].Op != OpAMD64MOVWconst {
9274                                 goto endae629a229c399eaed7dbb95b1b0e6f8a
9275                         }
9276                         d := v.Args[0].AuxInt
9277                         v.Op = OpAMD64MOVWconst
9278                         v.AuxInt = 0
9279                         v.Aux = nil
9280                         v.resetArgs()
9281                         v.AuxInt = d - c
9282                         return true
9283                 }
9284                 goto endae629a229c399eaed7dbb95b1b0e6f8a
9285         endae629a229c399eaed7dbb95b1b0e6f8a:
9286                 ;
9287                 // match: (SUBWconst [c] (SUBWconst [d] x))
9288                 // cond:
9289                 // result: (ADDWconst [-c-d] x)
9290                 {
9291                         c := v.AuxInt
9292                         if v.Args[0].Op != OpAMD64SUBWconst {
9293                                 goto enda59f08d12aa08717b0443b7bb1b71374
9294                         }
9295                         d := v.Args[0].AuxInt
9296                         x := v.Args[0].Args[0]
9297                         v.Op = OpAMD64ADDWconst
9298                         v.AuxInt = 0
9299                         v.Aux = nil
9300                         v.resetArgs()
9301                         v.AuxInt = -c - d
9302                         v.AddArg(x)
9303                         return true
9304                 }
9305                 goto enda59f08d12aa08717b0443b7bb1b71374
9306         enda59f08d12aa08717b0443b7bb1b71374:
9307                 ;
9308         case OpSignExt16to32:
9309                 // match: (SignExt16to32 x)
9310                 // cond:
9311                 // result: (MOVWQSX x)
9312                 {
9313                         x := v.Args[0]
9314                         v.Op = OpAMD64MOVWQSX
9315                         v.AuxInt = 0
9316                         v.Aux = nil
9317                         v.resetArgs()
9318                         v.AddArg(x)
9319                         return true
9320                 }
9321                 goto end21e4271c2b48a5aa3561ccfa8fa67cd9
9322         end21e4271c2b48a5aa3561ccfa8fa67cd9:
9323                 ;
9324         case OpSignExt16to64:
9325                 // match: (SignExt16to64 x)
9326                 // cond:
9327                 // result: (MOVWQSX x)
9328                 {
9329                         x := v.Args[0]
9330                         v.Op = OpAMD64MOVWQSX
9331                         v.AuxInt = 0
9332                         v.Aux = nil
9333                         v.resetArgs()
9334                         v.AddArg(x)
9335                         return true
9336                 }
9337                 goto endc6d242ee3a3e195ef0f9e8dae47ada75
9338         endc6d242ee3a3e195ef0f9e8dae47ada75:
9339                 ;
9340         case OpSignExt32to64:
9341                 // match: (SignExt32to64 x)
9342                 // cond:
9343                 // result: (MOVLQSX x)
9344                 {
9345                         x := v.Args[0]
9346                         v.Op = OpAMD64MOVLQSX
9347                         v.AuxInt = 0
9348                         v.Aux = nil
9349                         v.resetArgs()
9350                         v.AddArg(x)
9351                         return true
9352                 }
9353                 goto endb9f1a8b2d01eee44964a71a01bca165c
9354         endb9f1a8b2d01eee44964a71a01bca165c:
9355                 ;
9356         case OpSignExt8to16:
9357                 // match: (SignExt8to16 x)
9358                 // cond:
9359                 // result: (MOVBQSX x)
9360                 {
9361                         x := v.Args[0]
9362                         v.Op = OpAMD64MOVBQSX
9363                         v.AuxInt = 0
9364                         v.Aux = nil
9365                         v.resetArgs()
9366                         v.AddArg(x)
9367                         return true
9368                 }
9369                 goto end372869f08e147404b80634e5f83fd506
9370         end372869f08e147404b80634e5f83fd506:
9371                 ;
9372         case OpSignExt8to32:
9373                 // match: (SignExt8to32 x)
9374                 // cond:
9375                 // result: (MOVBQSX x)
9376                 {
9377                         x := v.Args[0]
9378                         v.Op = OpAMD64MOVBQSX
9379                         v.AuxInt = 0
9380                         v.Aux = nil
9381                         v.resetArgs()
9382                         v.AddArg(x)
9383                         return true
9384                 }
9385                 goto end913e3575e5b4cf7f60585c108db40464
9386         end913e3575e5b4cf7f60585c108db40464:
9387                 ;
9388         case OpSignExt8to64:
9389                 // match: (SignExt8to64 x)
9390                 // cond:
9391                 // result: (MOVBQSX x)
9392                 {
9393                         x := v.Args[0]
9394                         v.Op = OpAMD64MOVBQSX
9395                         v.AuxInt = 0
9396                         v.Aux = nil
9397                         v.resetArgs()
9398                         v.AddArg(x)
9399                         return true
9400                 }
9401                 goto endcef6d6001d3f25cf5dacee11a46e5c8c
9402         endcef6d6001d3f25cf5dacee11a46e5c8c:
9403                 ;
9404         case OpSqrt:
9405                 // match: (Sqrt x)
9406                 // cond:
9407                 // result: (SQRTSD x)
9408                 {
9409                         x := v.Args[0]
9410                         v.Op = OpAMD64SQRTSD
9411                         v.AuxInt = 0
9412                         v.Aux = nil
9413                         v.resetArgs()
9414                         v.AddArg(x)
9415                         return true
9416                 }
9417                 goto end72f79ca9ec139e15856aaa03338cf543
9418         end72f79ca9ec139e15856aaa03338cf543:
9419                 ;
9420         case OpStaticCall:
9421                 // match: (StaticCall [argwid] {target} mem)
9422                 // cond:
9423                 // result: (CALLstatic [argwid] {target} mem)
9424                 {
9425                         argwid := v.AuxInt
9426                         target := v.Aux
9427                         mem := v.Args[0]
9428                         v.Op = OpAMD64CALLstatic
9429                         v.AuxInt = 0
9430                         v.Aux = nil
9431                         v.resetArgs()
9432                         v.AuxInt = argwid
9433                         v.Aux = target
9434                         v.AddArg(mem)
9435                         return true
9436                 }
9437                 goto end32c5cbec813d1c2ae94fc9b1090e4b2a
9438         end32c5cbec813d1c2ae94fc9b1090e4b2a:
9439                 ;
9440         case OpStore:
9441                 // match: (Store [8] ptr val mem)
9442                 // cond: is64BitFloat(val.Type)
9443                 // result: (MOVSDstore ptr val mem)
9444                 {
9445                         if v.AuxInt != 8 {
9446                                 goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
9447                         }
9448                         ptr := v.Args[0]
9449                         val := v.Args[1]
9450                         mem := v.Args[2]
9451                         if !(is64BitFloat(val.Type)) {
9452                                 goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
9453                         }
9454                         v.Op = OpAMD64MOVSDstore
9455                         v.AuxInt = 0
9456                         v.Aux = nil
9457                         v.resetArgs()
9458                         v.AddArg(ptr)
9459                         v.AddArg(val)
9460                         v.AddArg(mem)
9461                         return true
9462                 }
9463                 goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
9464         endaeec4f61bc8e67dbf3fa2f79fe4c2b9e:
9465                 ;
9466                 // match: (Store [4] ptr val mem)
9467                 // cond: is32BitFloat(val.Type)
9468                 // result: (MOVSSstore ptr val mem)
9469                 {
9470                         if v.AuxInt != 4 {
9471                                 goto endf638ca0a75871b5062da15324d0e0384
9472                         }
9473                         ptr := v.Args[0]
9474                         val := v.Args[1]
9475                         mem := v.Args[2]
9476                         if !(is32BitFloat(val.Type)) {
9477                                 goto endf638ca0a75871b5062da15324d0e0384
9478                         }
9479                         v.Op = OpAMD64MOVSSstore
9480                         v.AuxInt = 0
9481                         v.Aux = nil
9482                         v.resetArgs()
9483                         v.AddArg(ptr)
9484                         v.AddArg(val)
9485                         v.AddArg(mem)
9486                         return true
9487                 }
9488                 goto endf638ca0a75871b5062da15324d0e0384
9489         endf638ca0a75871b5062da15324d0e0384:
9490                 ;
9491                 // match: (Store [8] ptr val mem)
9492                 // cond:
9493                 // result: (MOVQstore ptr val mem)
9494                 {
9495                         if v.AuxInt != 8 {
9496                                 goto endd1eb7c3ea0c806e7a53ff3be86186eb7
9497                         }
9498                         ptr := v.Args[0]
9499                         val := v.Args[1]
9500                         mem := v.Args[2]
9501                         v.Op = OpAMD64MOVQstore
9502                         v.AuxInt = 0
9503                         v.Aux = nil
9504                         v.resetArgs()
9505                         v.AddArg(ptr)
9506                         v.AddArg(val)
9507                         v.AddArg(mem)
9508                         return true
9509                 }
9510                 goto endd1eb7c3ea0c806e7a53ff3be86186eb7
9511         endd1eb7c3ea0c806e7a53ff3be86186eb7:
9512                 ;
9513                 // match: (Store [4] ptr val mem)
9514                 // cond:
9515                 // result: (MOVLstore ptr val mem)
9516                 {
9517                         if v.AuxInt != 4 {
9518                                 goto end44e3b22360da76ecd59be9a8c2dd1347
9519                         }
9520                         ptr := v.Args[0]
9521                         val := v.Args[1]
9522                         mem := v.Args[2]
9523                         v.Op = OpAMD64MOVLstore
9524                         v.AuxInt = 0
9525                         v.Aux = nil
9526                         v.resetArgs()
9527                         v.AddArg(ptr)
9528                         v.AddArg(val)
9529                         v.AddArg(mem)
9530                         return true
9531                 }
9532                 goto end44e3b22360da76ecd59be9a8c2dd1347
9533         end44e3b22360da76ecd59be9a8c2dd1347:
9534                 ;
9535                 // match: (Store [2] ptr val mem)
9536                 // cond:
9537                 // result: (MOVWstore ptr val mem)
9538                 {
9539                         if v.AuxInt != 2 {
9540                                 goto endd0342b7fd3d0713f3e26922660047c71
9541                         }
9542                         ptr := v.Args[0]
9543                         val := v.Args[1]
9544                         mem := v.Args[2]
9545                         v.Op = OpAMD64MOVWstore
9546                         v.AuxInt = 0
9547                         v.Aux = nil
9548                         v.resetArgs()
9549                         v.AddArg(ptr)
9550                         v.AddArg(val)
9551                         v.AddArg(mem)
9552                         return true
9553                 }
9554                 goto endd0342b7fd3d0713f3e26922660047c71
9555         endd0342b7fd3d0713f3e26922660047c71:
9556                 ;
9557                 // match: (Store [1] ptr val mem)
9558                 // cond:
9559                 // result: (MOVBstore ptr val mem)
9560                 {
9561                         if v.AuxInt != 1 {
9562                                 goto end8e76e20031197ca875889d2b4d0eb1d1
9563                         }
9564                         ptr := v.Args[0]
9565                         val := v.Args[1]
9566                         mem := v.Args[2]
9567                         v.Op = OpAMD64MOVBstore
9568                         v.AuxInt = 0
9569                         v.Aux = nil
9570                         v.resetArgs()
9571                         v.AddArg(ptr)
9572                         v.AddArg(val)
9573                         v.AddArg(mem)
9574                         return true
9575                 }
9576                 goto end8e76e20031197ca875889d2b4d0eb1d1
9577         end8e76e20031197ca875889d2b4d0eb1d1:
9578                 ;
9579         case OpSub16:
9580                 // match: (Sub16 x y)
9581                 // cond:
9582                 // result: (SUBW x y)
9583                 {
9584                         x := v.Args[0]
9585                         y := v.Args[1]
9586                         v.Op = OpAMD64SUBW
9587                         v.AuxInt = 0
9588                         v.Aux = nil
9589                         v.resetArgs()
9590                         v.AddArg(x)
9591                         v.AddArg(y)
9592                         return true
9593                 }
9594                 goto end54adc5de883c0460ca71c6ee464d4244
9595         end54adc5de883c0460ca71c6ee464d4244:
9596                 ;
9597         case OpSub32:
9598                 // match: (Sub32 x y)
9599                 // cond:
9600                 // result: (SUBL x y)
9601                 {
9602                         x := v.Args[0]
9603                         y := v.Args[1]
9604                         v.Op = OpAMD64SUBL
9605                         v.AuxInt = 0
9606                         v.Aux = nil
9607                         v.resetArgs()
9608                         v.AddArg(x)
9609                         v.AddArg(y)
9610                         return true
9611                 }
9612                 goto enddc3a2a488bda8c5856f93343e5ffe5f8
9613         enddc3a2a488bda8c5856f93343e5ffe5f8:
9614                 ;
9615         case OpSub32F:
9616                 // match: (Sub32F x y)
9617                 // cond:
9618                 // result: (SUBSS x y)
9619                 {
9620                         x := v.Args[0]
9621                         y := v.Args[1]
9622                         v.Op = OpAMD64SUBSS
9623                         v.AuxInt = 0
9624                         v.Aux = nil
9625                         v.resetArgs()
9626                         v.AddArg(x)
9627                         v.AddArg(y)
9628                         return true
9629                 }
9630                 goto end20193c1804b0e707702a884fb8abd60d
9631         end20193c1804b0e707702a884fb8abd60d:
9632                 ;
9633         case OpSub64:
9634                 // match: (Sub64 x y)
9635                 // cond:
9636                 // result: (SUBQ x y)
9637                 {
9638                         x := v.Args[0]
9639                         y := v.Args[1]
9640                         v.Op = OpAMD64SUBQ
9641                         v.AuxInt = 0
9642                         v.Aux = nil
9643                         v.resetArgs()
9644                         v.AddArg(x)
9645                         v.AddArg(y)
9646                         return true
9647                 }
9648                 goto endd88d5646309fd9174584888ecc8aca2c
9649         endd88d5646309fd9174584888ecc8aca2c:
9650                 ;
9651         case OpSub64F:
9652                 // match: (Sub64F x y)
9653                 // cond:
9654                 // result: (SUBSD x y)
9655                 {
9656                         x := v.Args[0]
9657                         y := v.Args[1]
9658                         v.Op = OpAMD64SUBSD
9659                         v.AuxInt = 0
9660                         v.Aux = nil
9661                         v.resetArgs()
9662                         v.AddArg(x)
9663                         v.AddArg(y)
9664                         return true
9665                 }
9666                 goto end5d5af7b8a3326bf9151f00a0013b73d7
9667         end5d5af7b8a3326bf9151f00a0013b73d7:
9668                 ;
9669         case OpSub8:
9670                 // match: (Sub8 x y)
9671                 // cond:
9672                 // result: (SUBB x y)
9673                 {
9674                         x := v.Args[0]
9675                         y := v.Args[1]
9676                         v.Op = OpAMD64SUBB
9677                         v.AuxInt = 0
9678                         v.Aux = nil
9679                         v.resetArgs()
9680                         v.AddArg(x)
9681                         v.AddArg(y)
9682                         return true
9683                 }
9684                 goto end7d33bf9bdfa505f96b930563eca7955f
9685         end7d33bf9bdfa505f96b930563eca7955f:
9686                 ;
9687         case OpSubPtr:
9688                 // match: (SubPtr x y)
9689                 // cond:
9690                 // result: (SUBQ x y)
9691                 {
9692                         x := v.Args[0]
9693                         y := v.Args[1]
9694                         v.Op = OpAMD64SUBQ
9695                         v.AuxInt = 0
9696                         v.Aux = nil
9697                         v.resetArgs()
9698                         v.AddArg(x)
9699                         v.AddArg(y)
9700                         return true
9701                 }
9702                 goto end748f63f755afe0b97a8f3cf7e4d9cbfe
9703         end748f63f755afe0b97a8f3cf7e4d9cbfe:
9704                 ;
9705         case OpTrunc16to8:
9706                 // match: (Trunc16to8 x)
9707                 // cond:
9708                 // result: x
9709                 {
9710                         x := v.Args[0]
9711                         v.Op = OpCopy
9712                         v.AuxInt = 0
9713                         v.Aux = nil
9714                         v.resetArgs()
9715                         v.Type = x.Type
9716                         v.AddArg(x)
9717                         return true
9718                 }
9719                 goto end8e2f5e0a6e3a06423c077747de6c2bdd
9720         end8e2f5e0a6e3a06423c077747de6c2bdd:
9721                 ;
9722         case OpTrunc32to16:
9723                 // match: (Trunc32to16 x)
9724                 // cond:
9725                 // result: x
9726                 {
9727                         x := v.Args[0]
9728                         v.Op = OpCopy
9729                         v.AuxInt = 0
9730                         v.Aux = nil
9731                         v.resetArgs()
9732                         v.Type = x.Type
9733                         v.AddArg(x)
9734                         return true
9735                 }
9736                 goto end5bed0e3a3c1c6374d86beb5a4397708c
9737         end5bed0e3a3c1c6374d86beb5a4397708c:
9738                 ;
9739         case OpTrunc32to8:
9740                 // match: (Trunc32to8 x)
9741                 // cond:
9742                 // result: x
9743                 {
9744                         x := v.Args[0]
9745                         v.Op = OpCopy
9746                         v.AuxInt = 0
9747                         v.Aux = nil
9748                         v.resetArgs()
9749                         v.Type = x.Type
9750                         v.AddArg(x)
9751                         return true
9752                 }
9753                 goto endef0b8032ce91979ce6cd0004260c04ee
9754         endef0b8032ce91979ce6cd0004260c04ee:
9755                 ;
9756         case OpTrunc64to16:
9757                 // match: (Trunc64to16 x)
9758                 // cond:
9759                 // result: x
9760                 {
9761                         x := v.Args[0]
9762                         v.Op = OpCopy
9763                         v.AuxInt = 0
9764                         v.Aux = nil
9765                         v.resetArgs()
9766                         v.Type = x.Type
9767                         v.AddArg(x)
9768                         return true
9769                 }
9770                 goto endd32fd6e0ce970c212835e6f71c3dcbfd
9771         endd32fd6e0ce970c212835e6f71c3dcbfd:
9772                 ;
9773         case OpTrunc64to32:
9774                 // match: (Trunc64to32 x)
9775                 // cond:
9776                 // result: x
9777                 {
9778                         x := v.Args[0]
9779                         v.Op = OpCopy
9780                         v.AuxInt = 0
9781                         v.Aux = nil
9782                         v.resetArgs()
9783                         v.Type = x.Type
9784                         v.AddArg(x)
9785                         return true
9786                 }
9787                 goto end1212c4e84153210aff7fd630fb3e1883
9788         end1212c4e84153210aff7fd630fb3e1883:
9789                 ;
9790         case OpTrunc64to8:
9791                 // match: (Trunc64to8 x)
9792                 // cond:
9793                 // result: x
9794                 {
9795                         x := v.Args[0]
9796                         v.Op = OpCopy
9797                         v.AuxInt = 0
9798                         v.Aux = nil
9799                         v.resetArgs()
9800                         v.Type = x.Type
9801                         v.AddArg(x)
9802                         return true
9803                 }
9804                 goto end734f017d4b2810ca2288f7037365824c
9805         end734f017d4b2810ca2288f7037365824c:
9806                 ;
9807         case OpAMD64XORB:
9808                 // match: (XORB x (MOVBconst [c]))
9809                 // cond:
9810                 // result: (XORBconst [c] x)
9811                 {
9812                         x := v.Args[0]
9813                         if v.Args[1].Op != OpAMD64MOVBconst {
9814                                 goto enda9ed9fdd115ffdffa8127c007c34d7b7
9815                         }
9816                         c := v.Args[1].AuxInt
9817                         v.Op = OpAMD64XORBconst
9818                         v.AuxInt = 0
9819                         v.Aux = nil
9820                         v.resetArgs()
9821                         v.AuxInt = c
9822                         v.AddArg(x)
9823                         return true
9824                 }
9825                 goto enda9ed9fdd115ffdffa8127c007c34d7b7
9826         enda9ed9fdd115ffdffa8127c007c34d7b7:
9827                 ;
9828                 // match: (XORB (MOVBconst [c]) x)
9829                 // cond:
9830                 // result: (XORBconst [c] x)
9831                 {
9832                         if v.Args[0].Op != OpAMD64MOVBconst {
9833                                 goto endb02a07d9dc7b802c59f013116e952f3f
9834                         }
9835                         c := v.Args[0].AuxInt
9836                         x := v.Args[1]
9837                         v.Op = OpAMD64XORBconst
9838                         v.AuxInt = 0
9839                         v.Aux = nil
9840                         v.resetArgs()
9841                         v.AuxInt = c
9842                         v.AddArg(x)
9843                         return true
9844                 }
9845                 goto endb02a07d9dc7b802c59f013116e952f3f
9846         endb02a07d9dc7b802c59f013116e952f3f:
9847                 ;
9848                 // match: (XORB x x)
9849                 // cond:
9850                 // result: (MOVBconst [0])
9851                 {
9852                         x := v.Args[0]
9853                         if v.Args[1] != x {
9854                                 goto end2afddc39503d04d572a3a07878f6c9c9
9855                         }
9856                         v.Op = OpAMD64MOVBconst
9857                         v.AuxInt = 0
9858                         v.Aux = nil
9859                         v.resetArgs()
9860                         v.AuxInt = 0
9861                         return true
9862                 }
9863                 goto end2afddc39503d04d572a3a07878f6c9c9
9864         end2afddc39503d04d572a3a07878f6c9c9:
9865                 ;
9866         case OpAMD64XORBconst:
9867                 // match: (XORBconst [c] (MOVBconst [d]))
9868                 // cond:
9869                 // result: (MOVBconst [c^d])
9870                 {
9871                         c := v.AuxInt
9872                         if v.Args[0].Op != OpAMD64MOVBconst {
9873                                 goto end6d8d1b612af9d253605c8bc69b822903
9874                         }
9875                         d := v.Args[0].AuxInt
9876                         v.Op = OpAMD64MOVBconst
9877                         v.AuxInt = 0
9878                         v.Aux = nil
9879                         v.resetArgs()
9880                         v.AuxInt = c ^ d
9881                         return true
9882                 }
9883                 goto end6d8d1b612af9d253605c8bc69b822903
9884         end6d8d1b612af9d253605c8bc69b822903:
9885                 ;
9886         case OpAMD64XORL:
9887                 // match: (XORL x (MOVLconst [c]))
9888                 // cond:
9889                 // result: (XORLconst [c] x)
9890                 {
9891                         x := v.Args[0]
9892                         if v.Args[1].Op != OpAMD64MOVLconst {
9893                                 goto enda9459d509d3416da67d13a22dd074a9c
9894                         }
9895                         c := v.Args[1].AuxInt
9896                         v.Op = OpAMD64XORLconst
9897                         v.AuxInt = 0
9898                         v.Aux = nil
9899                         v.resetArgs()
9900                         v.AuxInt = c
9901                         v.AddArg(x)
9902                         return true
9903                 }
9904                 goto enda9459d509d3416da67d13a22dd074a9c
9905         enda9459d509d3416da67d13a22dd074a9c:
9906                 ;
9907                 // match: (XORL (MOVLconst [c]) x)
9908                 // cond:
9909                 // result: (XORLconst [c] x)
9910                 {
9911                         if v.Args[0].Op != OpAMD64MOVLconst {
9912                                 goto end9c1a0af00eeadd8aa325e55f1f3fb89c
9913                         }
9914                         c := v.Args[0].AuxInt
9915                         x := v.Args[1]
9916                         v.Op = OpAMD64XORLconst
9917                         v.AuxInt = 0
9918                         v.Aux = nil
9919                         v.resetArgs()
9920                         v.AuxInt = c
9921                         v.AddArg(x)
9922                         return true
9923                 }
9924                 goto end9c1a0af00eeadd8aa325e55f1f3fb89c
9925         end9c1a0af00eeadd8aa325e55f1f3fb89c:
9926                 ;
9927                 // match: (XORL x x)
9928                 // cond:
9929                 // result: (MOVLconst [0])
9930                 {
9931                         x := v.Args[0]
9932                         if v.Args[1] != x {
9933                                 goto end7bcf9cfeb69a0d7647389124eb53ce2a
9934                         }
9935                         v.Op = OpAMD64MOVLconst
9936                         v.AuxInt = 0
9937                         v.Aux = nil
9938                         v.resetArgs()
9939                         v.AuxInt = 0
9940                         return true
9941                 }
9942                 goto end7bcf9cfeb69a0d7647389124eb53ce2a
9943         end7bcf9cfeb69a0d7647389124eb53ce2a:
9944                 ;
9945         case OpAMD64XORLconst:
9946                 // match: (XORLconst [c] (MOVLconst [d]))
9947                 // cond:
9948                 // result: (MOVLconst [c^d])
9949                 {
9950                         c := v.AuxInt
9951                         if v.Args[0].Op != OpAMD64MOVLconst {
9952                                 goto end71238075b10b68a226903cc453c4715c
9953                         }
9954                         d := v.Args[0].AuxInt
9955                         v.Op = OpAMD64MOVLconst
9956                         v.AuxInt = 0
9957                         v.Aux = nil
9958                         v.resetArgs()
9959                         v.AuxInt = c ^ d
9960                         return true
9961                 }
9962                 goto end71238075b10b68a226903cc453c4715c
9963         end71238075b10b68a226903cc453c4715c:
9964                 ;
9965         case OpAMD64XORQ:
9966                 // match: (XORQ x (MOVQconst [c]))
9967                 // cond: is32Bit(c)
9968                 // result: (XORQconst [c] x)
9969                 {
9970                         x := v.Args[0]
9971                         if v.Args[1].Op != OpAMD64MOVQconst {
9972                                 goto end452341f950062e0483f16438fb9ec500
9973                         }
9974                         c := v.Args[1].AuxInt
9975                         if !(is32Bit(c)) {
9976                                 goto end452341f950062e0483f16438fb9ec500
9977                         }
9978                         v.Op = OpAMD64XORQconst
9979                         v.AuxInt = 0
9980                         v.Aux = nil
9981                         v.resetArgs()
9982                         v.AuxInt = c
9983                         v.AddArg(x)
9984                         return true
9985                 }
9986                 goto end452341f950062e0483f16438fb9ec500
9987         end452341f950062e0483f16438fb9ec500:
9988                 ;
9989                 // match: (XORQ (MOVQconst [c]) x)
9990                 // cond: is32Bit(c)
9991                 // result: (XORQconst [c] x)
9992                 {
9993                         if v.Args[0].Op != OpAMD64MOVQconst {
9994                                 goto endd221a7e3daaaaa29ee385ad36e061b57
9995                         }
9996                         c := v.Args[0].AuxInt
9997                         x := v.Args[1]
9998                         if !(is32Bit(c)) {
9999                                 goto endd221a7e3daaaaa29ee385ad36e061b57
10000                         }
10001                         v.Op = OpAMD64XORQconst
10002                         v.AuxInt = 0
10003                         v.Aux = nil
10004                         v.resetArgs()
10005                         v.AuxInt = c
10006                         v.AddArg(x)
10007                         return true
10008                 }
10009                 goto endd221a7e3daaaaa29ee385ad36e061b57
10010         endd221a7e3daaaaa29ee385ad36e061b57:
10011                 ;
10012                 // match: (XORQ x x)
10013                 // cond:
10014                 // result: (MOVQconst [0])
10015                 {
10016                         x := v.Args[0]
10017                         if v.Args[1] != x {
10018                                 goto end10575a5d711cf14e6d4dffbb0e8dfaeb
10019                         }
10020                         v.Op = OpAMD64MOVQconst
10021                         v.AuxInt = 0
10022                         v.Aux = nil
10023                         v.resetArgs()
10024                         v.AuxInt = 0
10025                         return true
10026                 }
10027                 goto end10575a5d711cf14e6d4dffbb0e8dfaeb
10028         end10575a5d711cf14e6d4dffbb0e8dfaeb:
10029                 ;
10030         case OpAMD64XORQconst:
10031                 // match: (XORQconst [c] (MOVQconst [d]))
10032                 // cond:
10033                 // result: (MOVQconst [c^d])
10034                 {
10035                         c := v.AuxInt
10036                         if v.Args[0].Op != OpAMD64MOVQconst {
10037                                 goto end3f404d4f07362319fbad2e1ba0827a9f
10038                         }
10039                         d := v.Args[0].AuxInt
10040                         v.Op = OpAMD64MOVQconst
10041                         v.AuxInt = 0
10042                         v.Aux = nil
10043                         v.resetArgs()
10044                         v.AuxInt = c ^ d
10045                         return true
10046                 }
10047                 goto end3f404d4f07362319fbad2e1ba0827a9f
10048         end3f404d4f07362319fbad2e1ba0827a9f:
10049                 ;
10050         case OpAMD64XORW:
10051                 // match: (XORW x (MOVWconst [c]))
10052                 // cond:
10053                 // result: (XORWconst [c] x)
10054                 {
10055                         x := v.Args[0]
10056                         if v.Args[1].Op != OpAMD64MOVWconst {
10057                                 goto end2ca109efd66c221a5691a4da95ec6c67
10058                         }
10059                         c := v.Args[1].AuxInt
10060                         v.Op = OpAMD64XORWconst
10061                         v.AuxInt = 0
10062                         v.Aux = nil
10063                         v.resetArgs()
10064                         v.AuxInt = c
10065                         v.AddArg(x)
10066                         return true
10067                 }
10068                 goto end2ca109efd66c221a5691a4da95ec6c67
10069         end2ca109efd66c221a5691a4da95ec6c67:
10070                 ;
10071                 // match: (XORW (MOVWconst [c]) x)
10072                 // cond:
10073                 // result: (XORWconst [c] x)
10074                 {
10075                         if v.Args[0].Op != OpAMD64MOVWconst {
10076                                 goto end51ee62a06d4301e5a4aed7a6639b1d53
10077                         }
10078                         c := v.Args[0].AuxInt
10079                         x := v.Args[1]
10080                         v.Op = OpAMD64XORWconst
10081                         v.AuxInt = 0
10082                         v.Aux = nil
10083                         v.resetArgs()
10084                         v.AuxInt = c
10085                         v.AddArg(x)
10086                         return true
10087                 }
10088                 goto end51ee62a06d4301e5a4aed7a6639b1d53
10089         end51ee62a06d4301e5a4aed7a6639b1d53:
10090                 ;
10091                 // match: (XORW x x)
10092                 // cond:
10093                 // result: (MOVWconst [0])
10094                 {
10095                         x := v.Args[0]
10096                         if v.Args[1] != x {
10097                                 goto end07f332e857be0c2707797ed480a2faf4
10098                         }
10099                         v.Op = OpAMD64MOVWconst
10100                         v.AuxInt = 0
10101                         v.Aux = nil
10102                         v.resetArgs()
10103                         v.AuxInt = 0
10104                         return true
10105                 }
10106                 goto end07f332e857be0c2707797ed480a2faf4
10107         end07f332e857be0c2707797ed480a2faf4:
10108                 ;
10109         case OpAMD64XORWconst:
10110                 // match: (XORWconst [c] (MOVWconst [d]))
10111                 // cond:
10112                 // result: (MOVWconst [c^d])
10113                 {
10114                         c := v.AuxInt
10115                         if v.Args[0].Op != OpAMD64MOVWconst {
10116                                 goto ende24881ccdfa8486c4593fd9aa5df1ed6
10117                         }
10118                         d := v.Args[0].AuxInt
10119                         v.Op = OpAMD64MOVWconst
10120                         v.AuxInt = 0
10121                         v.Aux = nil
10122                         v.resetArgs()
10123                         v.AuxInt = c ^ d
10124                         return true
10125                 }
10126                 goto ende24881ccdfa8486c4593fd9aa5df1ed6
10127         ende24881ccdfa8486c4593fd9aa5df1ed6:
10128                 ;
10129         case OpXor16:
10130                 // match: (Xor16 x y)
10131                 // cond:
10132                 // result: (XORW x y)
10133                 {
10134                         x := v.Args[0]
10135                         y := v.Args[1]
10136                         v.Op = OpAMD64XORW
10137                         v.AuxInt = 0
10138                         v.Aux = nil
10139                         v.resetArgs()
10140                         v.AddArg(x)
10141                         v.AddArg(y)
10142                         return true
10143                 }
10144                 goto end20efdd5dfd5130abf818de5546a991a0
10145         end20efdd5dfd5130abf818de5546a991a0:
10146                 ;
10147         case OpXor32:
10148                 // match: (Xor32 x y)
10149                 // cond:
10150                 // result: (XORL x y)
10151                 {
10152                         x := v.Args[0]
10153                         y := v.Args[1]
10154                         v.Op = OpAMD64XORL
10155                         v.AuxInt = 0
10156                         v.Aux = nil
10157                         v.resetArgs()
10158                         v.AddArg(x)
10159                         v.AddArg(y)
10160                         return true
10161                 }
10162                 goto end9da6bce98b437e2609488346116a75d8
10163         end9da6bce98b437e2609488346116a75d8:
10164                 ;
10165         case OpXor64:
10166                 // match: (Xor64 x y)
10167                 // cond:
10168                 // result: (XORQ x y)
10169                 {
10170                         x := v.Args[0]
10171                         y := v.Args[1]
10172                         v.Op = OpAMD64XORQ
10173                         v.AuxInt = 0
10174                         v.Aux = nil
10175                         v.resetArgs()
10176                         v.AddArg(x)
10177                         v.AddArg(y)
10178                         return true
10179                 }
10180                 goto endc88cd189c2a6f07ecff324ed94809f8f
10181         endc88cd189c2a6f07ecff324ed94809f8f:
10182                 ;
10183         case OpXor8:
10184                 // match: (Xor8 x y)
10185                 // cond:
10186                 // result: (XORB x y)
10187                 {
10188                         x := v.Args[0]
10189                         y := v.Args[1]
10190                         v.Op = OpAMD64XORB
10191                         v.AuxInt = 0
10192                         v.Aux = nil
10193                         v.resetArgs()
10194                         v.AddArg(x)
10195                         v.AddArg(y)
10196                         return true
10197                 }
10198                 goto end50f4434ef96916d3e65ad3cc236d1723
10199         end50f4434ef96916d3e65ad3cc236d1723:
10200                 ;
10201         case OpZero:
10202                 // match: (Zero [0] _ mem)
10203                 // cond:
10204                 // result: mem
10205                 {
10206                         if v.AuxInt != 0 {
10207                                 goto endc9a38a60f0322f93682daa824611272c
10208                         }
10209                         mem := v.Args[1]
10210                         v.Op = OpCopy
10211                         v.AuxInt = 0
10212                         v.Aux = nil
10213                         v.resetArgs()
10214                         v.Type = mem.Type
10215                         v.AddArg(mem)
10216                         return true
10217                 }
10218                 goto endc9a38a60f0322f93682daa824611272c
10219         endc9a38a60f0322f93682daa824611272c:
10220                 ;
10221                 // match: (Zero [1] destptr mem)
10222                 // cond:
10223                 // result: (MOVBstore destptr (MOVBconst [0]) mem)
10224                 {
10225                         if v.AuxInt != 1 {
10226                                 goto endf7c8ca6a444f19e1142977e2ac42ab24
10227                         }
10228                         destptr := v.Args[0]
10229                         mem := v.Args[1]
10230                         v.Op = OpAMD64MOVBstore
10231                         v.AuxInt = 0
10232                         v.Aux = nil
10233                         v.resetArgs()
10234                         v.AddArg(destptr)
10235                         v0 := b.NewValue0(v.Line, OpAMD64MOVBconst, TypeInvalid)
10236                         v0.AuxInt = 0
10237                         v0.Type = config.fe.TypeUInt8()
10238                         v.AddArg(v0)
10239                         v.AddArg(mem)
10240                         return true
10241                 }
10242                 goto endf7c8ca6a444f19e1142977e2ac42ab24
10243         endf7c8ca6a444f19e1142977e2ac42ab24:
10244                 ;
10245                 // match: (Zero [2] destptr mem)
10246                 // cond:
10247                 // result: (MOVWstore destptr (MOVWconst [0]) mem)
10248                 {
10249                         if v.AuxInt != 2 {
10250                                 goto end7609a67450ab21eba86f456886fc8496
10251                         }
10252                         destptr := v.Args[0]
10253                         mem := v.Args[1]
10254                         v.Op = OpAMD64MOVWstore
10255                         v.AuxInt = 0
10256                         v.Aux = nil
10257                         v.resetArgs()
10258                         v.AddArg(destptr)
10259                         v0 := b.NewValue0(v.Line, OpAMD64MOVWconst, TypeInvalid)
10260                         v0.AuxInt = 0
10261                         v0.Type = config.fe.TypeUInt16()
10262                         v.AddArg(v0)
10263                         v.AddArg(mem)
10264                         return true
10265                 }
10266                 goto end7609a67450ab21eba86f456886fc8496
10267         end7609a67450ab21eba86f456886fc8496:
10268                 ;
10269                 // match: (Zero [4] destptr mem)
10270                 // cond:
10271                 // result: (MOVLstore destptr (MOVLconst [0]) mem)
10272                 {
10273                         if v.AuxInt != 4 {
10274                                 goto enda8e1cf1298794cc3cb79cab108e33007
10275                         }
10276                         destptr := v.Args[0]
10277                         mem := v.Args[1]
10278                         v.Op = OpAMD64MOVLstore
10279                         v.AuxInt = 0
10280                         v.Aux = nil
10281                         v.resetArgs()
10282                         v.AddArg(destptr)
10283                         v0 := b.NewValue0(v.Line, OpAMD64MOVLconst, TypeInvalid)
10284                         v0.AuxInt = 0
10285                         v0.Type = config.fe.TypeUInt32()
10286                         v.AddArg(v0)
10287                         v.AddArg(mem)
10288                         return true
10289                 }
10290                 goto enda8e1cf1298794cc3cb79cab108e33007
10291         enda8e1cf1298794cc3cb79cab108e33007:
10292                 ;
10293                 // match: (Zero [8] destptr mem)
10294                 // cond:
10295                 // result: (MOVQstore destptr (MOVQconst [0]) mem)
10296                 {
10297                         if v.AuxInt != 8 {
10298                                 goto end1791556f0b03ea065d38a3267fbe01c6
10299                         }
10300                         destptr := v.Args[0]
10301                         mem := v.Args[1]
10302                         v.Op = OpAMD64MOVQstore
10303                         v.AuxInt = 0
10304                         v.Aux = nil
10305                         v.resetArgs()
10306                         v.AddArg(destptr)
10307                         v0 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10308                         v0.AuxInt = 0
10309                         v0.Type = config.fe.TypeUInt64()
10310                         v.AddArg(v0)
10311                         v.AddArg(mem)
10312                         return true
10313                 }
10314                 goto end1791556f0b03ea065d38a3267fbe01c6
10315         end1791556f0b03ea065d38a3267fbe01c6:
10316                 ;
10317                 // match: (Zero [3] destptr mem)
10318                 // cond:
10319                 // result: (MOVBstore (ADDQconst [2] destptr) (MOVBconst [0])           (MOVWstore destptr (MOVWconst [0]) mem))
10320                 {
10321                         if v.AuxInt != 3 {
10322                                 goto end7f8f5c8214f8b81a73fdde78b03ce53c
10323                         }
10324                         destptr := v.Args[0]
10325                         mem := v.Args[1]
10326                         v.Op = OpAMD64MOVBstore
10327                         v.AuxInt = 0
10328                         v.Aux = nil
10329                         v.resetArgs()
10330                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10331                         v0.AuxInt = 2
10332                         v0.AddArg(destptr)
10333                         v0.Type = config.fe.TypeUInt64()
10334                         v.AddArg(v0)
10335                         v1 := b.NewValue0(v.Line, OpAMD64MOVBconst, TypeInvalid)
10336                         v1.AuxInt = 0
10337                         v1.Type = config.fe.TypeUInt8()
10338                         v.AddArg(v1)
10339                         v2 := b.NewValue0(v.Line, OpAMD64MOVWstore, TypeInvalid)
10340                         v2.AddArg(destptr)
10341                         v3 := b.NewValue0(v.Line, OpAMD64MOVWconst, TypeInvalid)
10342                         v3.AuxInt = 0
10343                         v3.Type = config.fe.TypeUInt16()
10344                         v2.AddArg(v3)
10345                         v2.AddArg(mem)
10346                         v2.Type = TypeMem
10347                         v.AddArg(v2)
10348                         return true
10349                 }
10350                 goto end7f8f5c8214f8b81a73fdde78b03ce53c
10351         end7f8f5c8214f8b81a73fdde78b03ce53c:
10352                 ;
10353                 // match: (Zero [5] destptr mem)
10354                 // cond:
10355                 // result: (MOVBstore (ADDQconst [4] destptr) (MOVBconst [0])           (MOVLstore destptr (MOVLconst [0]) mem))
10356                 {
10357                         if v.AuxInt != 5 {
10358                                 goto end54466baa4eac09020bee720efbb82d0f
10359                         }
10360                         destptr := v.Args[0]
10361                         mem := v.Args[1]
10362                         v.Op = OpAMD64MOVBstore
10363                         v.AuxInt = 0
10364                         v.Aux = nil
10365                         v.resetArgs()
10366                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10367                         v0.AuxInt = 4
10368                         v0.AddArg(destptr)
10369                         v0.Type = config.fe.TypeUInt64()
10370                         v.AddArg(v0)
10371                         v1 := b.NewValue0(v.Line, OpAMD64MOVBconst, TypeInvalid)
10372                         v1.AuxInt = 0
10373                         v1.Type = config.fe.TypeUInt8()
10374                         v.AddArg(v1)
10375                         v2 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
10376                         v2.AddArg(destptr)
10377                         v3 := b.NewValue0(v.Line, OpAMD64MOVLconst, TypeInvalid)
10378                         v3.AuxInt = 0
10379                         v3.Type = config.fe.TypeUInt32()
10380                         v2.AddArg(v3)
10381                         v2.AddArg(mem)
10382                         v2.Type = TypeMem
10383                         v.AddArg(v2)
10384                         return true
10385                 }
10386                 goto end54466baa4eac09020bee720efbb82d0f
10387         end54466baa4eac09020bee720efbb82d0f:
10388                 ;
10389                 // match: (Zero [6] destptr mem)
10390                 // cond:
10391                 // result: (MOVWstore (ADDQconst [4] destptr) (MOVWconst [0])           (MOVLstore destptr (MOVLconst [0]) mem))
10392                 {
10393                         if v.AuxInt != 6 {
10394                                 goto end3a37ae6095ddc37646d6ad6eeda986e2
10395                         }
10396                         destptr := v.Args[0]
10397                         mem := v.Args[1]
10398                         v.Op = OpAMD64MOVWstore
10399                         v.AuxInt = 0
10400                         v.Aux = nil
10401                         v.resetArgs()
10402                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10403                         v0.AuxInt = 4
10404                         v0.AddArg(destptr)
10405                         v0.Type = config.fe.TypeUInt64()
10406                         v.AddArg(v0)
10407                         v1 := b.NewValue0(v.Line, OpAMD64MOVWconst, TypeInvalid)
10408                         v1.AuxInt = 0
10409                         v1.Type = config.fe.TypeUInt16()
10410                         v.AddArg(v1)
10411                         v2 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
10412                         v2.AddArg(destptr)
10413                         v3 := b.NewValue0(v.Line, OpAMD64MOVLconst, TypeInvalid)
10414                         v3.AuxInt = 0
10415                         v3.Type = config.fe.TypeUInt32()
10416                         v2.AddArg(v3)
10417                         v2.AddArg(mem)
10418                         v2.Type = TypeMem
10419                         v.AddArg(v2)
10420                         return true
10421                 }
10422                 goto end3a37ae6095ddc37646d6ad6eeda986e2
10423         end3a37ae6095ddc37646d6ad6eeda986e2:
10424                 ;
10425                 // match: (Zero [7] destptr mem)
10426                 // cond:
10427                 // result: (MOVLstore (ADDQconst [3] destptr) (MOVLconst [0])           (MOVLstore destptr (MOVLconst [0]) mem))
10428                 {
10429                         if v.AuxInt != 7 {
10430                                 goto endd53a750fa01c5a5a238ba8fcabb416b2
10431                         }
10432                         destptr := v.Args[0]
10433                         mem := v.Args[1]
10434                         v.Op = OpAMD64MOVLstore
10435                         v.AuxInt = 0
10436                         v.Aux = nil
10437                         v.resetArgs()
10438                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10439                         v0.AuxInt = 3
10440                         v0.AddArg(destptr)
10441                         v0.Type = config.fe.TypeUInt64()
10442                         v.AddArg(v0)
10443                         v1 := b.NewValue0(v.Line, OpAMD64MOVLconst, TypeInvalid)
10444                         v1.AuxInt = 0
10445                         v1.Type = config.fe.TypeUInt32()
10446                         v.AddArg(v1)
10447                         v2 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
10448                         v2.AddArg(destptr)
10449                         v3 := b.NewValue0(v.Line, OpAMD64MOVLconst, TypeInvalid)
10450                         v3.AuxInt = 0
10451                         v3.Type = config.fe.TypeUInt32()
10452                         v2.AddArg(v3)
10453                         v2.AddArg(mem)
10454                         v2.Type = TypeMem
10455                         v.AddArg(v2)
10456                         return true
10457                 }
10458                 goto endd53a750fa01c5a5a238ba8fcabb416b2
10459         endd53a750fa01c5a5a238ba8fcabb416b2:
10460                 ;
10461                 // match: (Zero [size] destptr mem)
10462                 // cond: size%8 != 0 && size > 8
10463                 // result: (Zero [size-size%8] (ADDQconst destptr [size%8])             (MOVQstore destptr (MOVQconst [0]) mem))
10464                 {
10465                         size := v.AuxInt
10466                         destptr := v.Args[0]
10467                         mem := v.Args[1]
10468                         if !(size%8 != 0 && size > 8) {
10469                                 goto end5efefe1d9cca07e7ad6f4832f774b938
10470                         }
10471                         v.Op = OpZero
10472                         v.AuxInt = 0
10473                         v.Aux = nil
10474                         v.resetArgs()
10475                         v.AuxInt = size - size%8
10476                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10477                         v0.AddArg(destptr)
10478                         v0.AuxInt = size % 8
10479                         v0.Type = config.fe.TypeUInt64()
10480                         v.AddArg(v0)
10481                         v1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10482                         v1.AddArg(destptr)
10483                         v2 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10484                         v2.AuxInt = 0
10485                         v2.Type = config.fe.TypeUInt64()
10486                         v1.AddArg(v2)
10487                         v1.AddArg(mem)
10488                         v1.Type = TypeMem
10489                         v.AddArg(v1)
10490                         return true
10491                 }
10492                 goto end5efefe1d9cca07e7ad6f4832f774b938
10493         end5efefe1d9cca07e7ad6f4832f774b938:
10494                 ;
10495                 // match: (Zero [16] destptr mem)
10496                 // cond:
10497                 // result: (MOVQstore (ADDQconst [8] destptr) (MOVQconst [0])           (MOVQstore destptr (MOVQconst [0]) mem))
10498                 {
10499                         if v.AuxInt != 16 {
10500                                 goto endad489c16378959a764292e8b1cb72ba2
10501                         }
10502                         destptr := v.Args[0]
10503                         mem := v.Args[1]
10504                         v.Op = OpAMD64MOVQstore
10505                         v.AuxInt = 0
10506                         v.Aux = nil
10507                         v.resetArgs()
10508                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10509                         v0.AuxInt = 8
10510                         v0.AddArg(destptr)
10511                         v0.Type = config.fe.TypeUInt64()
10512                         v.AddArg(v0)
10513                         v1 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10514                         v1.AuxInt = 0
10515                         v1.Type = config.fe.TypeUInt64()
10516                         v.AddArg(v1)
10517                         v2 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10518                         v2.AddArg(destptr)
10519                         v3 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10520                         v3.AuxInt = 0
10521                         v3.Type = config.fe.TypeUInt64()
10522                         v2.AddArg(v3)
10523                         v2.AddArg(mem)
10524                         v2.Type = TypeMem
10525                         v.AddArg(v2)
10526                         return true
10527                 }
10528                 goto endad489c16378959a764292e8b1cb72ba2
10529         endad489c16378959a764292e8b1cb72ba2:
10530                 ;
10531                 // match: (Zero [24] destptr mem)
10532                 // cond:
10533                 // result: (MOVQstore (ADDQconst [16] destptr) (MOVQconst [0])          (MOVQstore (ADDQconst [8] destptr) (MOVQconst [0])                      (MOVQstore destptr (MOVQconst [0]) mem)))
10534                 {
10535                         if v.AuxInt != 24 {
10536                                 goto enddc443320a1be0b3c2e213bd6778197dd
10537                         }
10538                         destptr := v.Args[0]
10539                         mem := v.Args[1]
10540                         v.Op = OpAMD64MOVQstore
10541                         v.AuxInt = 0
10542                         v.Aux = nil
10543                         v.resetArgs()
10544                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10545                         v0.AuxInt = 16
10546                         v0.AddArg(destptr)
10547                         v0.Type = config.fe.TypeUInt64()
10548                         v.AddArg(v0)
10549                         v1 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10550                         v1.AuxInt = 0
10551                         v1.Type = config.fe.TypeUInt64()
10552                         v.AddArg(v1)
10553                         v2 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10554                         v3 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10555                         v3.AuxInt = 8
10556                         v3.AddArg(destptr)
10557                         v3.Type = config.fe.TypeUInt64()
10558                         v2.AddArg(v3)
10559                         v4 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10560                         v4.AuxInt = 0
10561                         v4.Type = config.fe.TypeUInt64()
10562                         v2.AddArg(v4)
10563                         v5 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10564                         v5.AddArg(destptr)
10565                         v6 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10566                         v6.AuxInt = 0
10567                         v6.Type = config.fe.TypeUInt64()
10568                         v5.AddArg(v6)
10569                         v5.AddArg(mem)
10570                         v5.Type = TypeMem
10571                         v2.AddArg(v5)
10572                         v2.Type = TypeMem
10573                         v.AddArg(v2)
10574                         return true
10575                 }
10576                 goto enddc443320a1be0b3c2e213bd6778197dd
10577         enddc443320a1be0b3c2e213bd6778197dd:
10578                 ;
10579                 // match: (Zero [32] destptr mem)
10580                 // cond:
10581                 // result: (MOVQstore (ADDQconst [24] destptr) (MOVQconst [0])          (MOVQstore (ADDQconst [16] destptr) (MOVQconst [0])                     (MOVQstore (ADDQconst [8] destptr) (MOVQconst [0])                              (MOVQstore destptr (MOVQconst [0]) mem))))
10582                 {
10583                         if v.AuxInt != 32 {
10584                                 goto end282b5e36693f06e2cd1ac563e0d419b5
10585                         }
10586                         destptr := v.Args[0]
10587                         mem := v.Args[1]
10588                         v.Op = OpAMD64MOVQstore
10589                         v.AuxInt = 0
10590                         v.Aux = nil
10591                         v.resetArgs()
10592                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10593                         v0.AuxInt = 24
10594                         v0.AddArg(destptr)
10595                         v0.Type = config.fe.TypeUInt64()
10596                         v.AddArg(v0)
10597                         v1 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10598                         v1.AuxInt = 0
10599                         v1.Type = config.fe.TypeUInt64()
10600                         v.AddArg(v1)
10601                         v2 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10602                         v3 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10603                         v3.AuxInt = 16
10604                         v3.AddArg(destptr)
10605                         v3.Type = config.fe.TypeUInt64()
10606                         v2.AddArg(v3)
10607                         v4 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10608                         v4.AuxInt = 0
10609                         v4.Type = config.fe.TypeUInt64()
10610                         v2.AddArg(v4)
10611                         v5 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10612                         v6 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10613                         v6.AuxInt = 8
10614                         v6.AddArg(destptr)
10615                         v6.Type = config.fe.TypeUInt64()
10616                         v5.AddArg(v6)
10617                         v7 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10618                         v7.AuxInt = 0
10619                         v7.Type = config.fe.TypeUInt64()
10620                         v5.AddArg(v7)
10621                         v8 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10622                         v8.AddArg(destptr)
10623                         v9 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10624                         v9.AuxInt = 0
10625                         v9.Type = config.fe.TypeUInt64()
10626                         v8.AddArg(v9)
10627                         v8.AddArg(mem)
10628                         v8.Type = TypeMem
10629                         v5.AddArg(v8)
10630                         v5.Type = TypeMem
10631                         v2.AddArg(v5)
10632                         v2.Type = TypeMem
10633                         v.AddArg(v2)
10634                         return true
10635                 }
10636                 goto end282b5e36693f06e2cd1ac563e0d419b5
10637         end282b5e36693f06e2cd1ac563e0d419b5:
10638                 ;
10639                 // match: (Zero [size] destptr mem)
10640                 // cond: size <= 1024 && size%8 == 0 && size%16 != 0
10641                 // result: (Zero [size-8] (ADDQconst [8] destptr) (MOVQstore destptr (MOVQconst [0]) mem))
10642                 {
10643                         size := v.AuxInt
10644                         destptr := v.Args[0]
10645                         mem := v.Args[1]
10646                         if !(size <= 1024 && size%8 == 0 && size%16 != 0) {
10647                                 goto end240266449c3e493db1c3b38a78682ff0
10648                         }
10649                         v.Op = OpZero
10650                         v.AuxInt = 0
10651                         v.Aux = nil
10652                         v.resetArgs()
10653                         v.AuxInt = size - 8
10654                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10655                         v0.AuxInt = 8
10656                         v0.AddArg(destptr)
10657                         v0.Type = config.fe.TypeUInt64()
10658                         v.AddArg(v0)
10659                         v1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
10660                         v1.AddArg(destptr)
10661                         v2 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10662                         v2.AuxInt = 0
10663                         v2.Type = config.fe.TypeUInt64()
10664                         v1.AddArg(v2)
10665                         v1.AddArg(mem)
10666                         v1.Type = TypeMem
10667                         v.AddArg(v1)
10668                         return true
10669                 }
10670                 goto end240266449c3e493db1c3b38a78682ff0
10671         end240266449c3e493db1c3b38a78682ff0:
10672                 ;
10673                 // match: (Zero [size] destptr mem)
10674                 // cond: size <= 1024 && size%16 == 0
10675                 // result: (DUFFZERO [duffStart(size)] (ADDQconst [duffAdj(size)] destptr) (MOVOconst [0]) mem)
10676                 {
10677                         size := v.AuxInt
10678                         destptr := v.Args[0]
10679                         mem := v.Args[1]
10680                         if !(size <= 1024 && size%16 == 0) {
10681                                 goto endf508bb887eee9119069b22c23dbca138
10682                         }
10683                         v.Op = OpAMD64DUFFZERO
10684                         v.AuxInt = 0
10685                         v.Aux = nil
10686                         v.resetArgs()
10687                         v.AuxInt = duffStart(size)
10688                         v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
10689                         v0.AuxInt = duffAdj(size)
10690                         v0.AddArg(destptr)
10691                         v0.Type = config.fe.TypeUInt64()
10692                         v.AddArg(v0)
10693                         v1 := b.NewValue0(v.Line, OpAMD64MOVOconst, TypeInvalid)
10694                         v1.AuxInt = 0
10695                         v1.Type = config.fe.TypeFloat64()
10696                         v.AddArg(v1)
10697                         v.AddArg(mem)
10698                         return true
10699                 }
10700                 goto endf508bb887eee9119069b22c23dbca138
10701         endf508bb887eee9119069b22c23dbca138:
10702                 ;
10703                 // match: (Zero [size] destptr mem)
10704                 // cond: size > 1024 && size%8 == 0
10705                 // result: (REPSTOSQ destptr (MOVQconst [size/8]) (MOVQconst [0]) mem)
10706                 {
10707                         size := v.AuxInt
10708                         destptr := v.Args[0]
10709                         mem := v.Args[1]
10710                         if !(size > 1024 && size%8 == 0) {
10711                                 goto endb9d55d4ba0e70ed918e3ac757727441b
10712                         }
10713                         v.Op = OpAMD64REPSTOSQ
10714                         v.AuxInt = 0
10715                         v.Aux = nil
10716                         v.resetArgs()
10717                         v.AddArg(destptr)
10718                         v0 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10719                         v0.AuxInt = size / 8
10720                         v0.Type = config.fe.TypeUInt64()
10721                         v.AddArg(v0)
10722                         v1 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
10723                         v1.AuxInt = 0
10724                         v1.Type = config.fe.TypeUInt64()
10725                         v.AddArg(v1)
10726                         v.AddArg(mem)
10727                         return true
10728                 }
10729                 goto endb9d55d4ba0e70ed918e3ac757727441b
10730         endb9d55d4ba0e70ed918e3ac757727441b:
10731                 ;
10732         case OpZeroExt16to32:
10733                 // match: (ZeroExt16to32 x)
10734                 // cond:
10735                 // result: (MOVWQZX x)
10736                 {
10737                         x := v.Args[0]
10738                         v.Op = OpAMD64MOVWQZX
10739                         v.AuxInt = 0
10740                         v.Aux = nil
10741                         v.resetArgs()
10742                         v.AddArg(x)
10743                         return true
10744                 }
10745                 goto endbfff79412a2cc96095069c66812844b4
10746         endbfff79412a2cc96095069c66812844b4:
10747                 ;
10748         case OpZeroExt16to64:
10749                 // match: (ZeroExt16to64 x)
10750                 // cond:
10751                 // result: (MOVWQZX x)
10752                 {
10753                         x := v.Args[0]
10754                         v.Op = OpAMD64MOVWQZX
10755                         v.AuxInt = 0
10756                         v.Aux = nil
10757                         v.resetArgs()
10758                         v.AddArg(x)
10759                         return true
10760                 }
10761                 goto end7a40262c5c856101058d2bd518ed0910
10762         end7a40262c5c856101058d2bd518ed0910:
10763                 ;
10764         case OpZeroExt32to64:
10765                 // match: (ZeroExt32to64 x)
10766                 // cond:
10767                 // result: (MOVLQZX x)
10768                 {
10769                         x := v.Args[0]
10770                         v.Op = OpAMD64MOVLQZX
10771                         v.AuxInt = 0
10772                         v.Aux = nil
10773                         v.resetArgs()
10774                         v.AddArg(x)
10775                         return true
10776                 }
10777                 goto enddf83bdc8cc6c5673a9ef7aca7affe45a
10778         enddf83bdc8cc6c5673a9ef7aca7affe45a:
10779                 ;
10780         case OpZeroExt8to16:
10781                 // match: (ZeroExt8to16 x)
10782                 // cond:
10783                 // result: (MOVBQZX x)
10784                 {
10785                         x := v.Args[0]
10786                         v.Op = OpAMD64MOVBQZX
10787                         v.AuxInt = 0
10788                         v.Aux = nil
10789                         v.resetArgs()
10790                         v.AddArg(x)
10791                         return true
10792                 }
10793                 goto endd03d53d2a585727e4107ae1a3cc55479
10794         endd03d53d2a585727e4107ae1a3cc55479:
10795                 ;
10796         case OpZeroExt8to32:
10797                 // match: (ZeroExt8to32 x)
10798                 // cond:
10799                 // result: (MOVBQZX x)
10800                 {
10801                         x := v.Args[0]
10802                         v.Op = OpAMD64MOVBQZX
10803                         v.AuxInt = 0
10804                         v.Aux = nil
10805                         v.resetArgs()
10806                         v.AddArg(x)
10807                         return true
10808                 }
10809                 goto endcbd33e965b3dab14fced5ae93d8949de
10810         endcbd33e965b3dab14fced5ae93d8949de:
10811                 ;
10812         case OpZeroExt8to64:
10813                 // match: (ZeroExt8to64 x)
10814                 // cond:
10815                 // result: (MOVBQZX x)
10816                 {
10817                         x := v.Args[0]
10818                         v.Op = OpAMD64MOVBQZX
10819                         v.AuxInt = 0
10820                         v.Aux = nil
10821                         v.resetArgs()
10822                         v.AddArg(x)
10823                         return true
10824                 }
10825                 goto end63ae7cc15db9d15189b2f1342604b2cb
10826         end63ae7cc15db9d15189b2f1342604b2cb:
10827         }
10828         return false
10829 }
10830 func rewriteBlockAMD64(b *Block) bool {
10831         switch b.Kind {
10832         case BlockAMD64EQ:
10833                 // match: (EQ (InvertFlags cmp) yes no)
10834                 // cond:
10835                 // result: (EQ cmp yes no)
10836                 {
10837                         v := b.Control
10838                         if v.Op != OpAMD64InvertFlags {
10839                                 goto end6b8e9afc73b1c4d528f31a60d2575fae
10840                         }
10841                         cmp := v.Args[0]
10842                         yes := b.Succs[0]
10843                         no := b.Succs[1]
10844                         b.Kind = BlockAMD64EQ
10845                         b.Control = cmp
10846                         b.Succs[0] = yes
10847                         b.Succs[1] = no
10848                         return true
10849                 }
10850                 goto end6b8e9afc73b1c4d528f31a60d2575fae
10851         end6b8e9afc73b1c4d528f31a60d2575fae:
10852                 ;
10853         case BlockAMD64GE:
10854                 // match: (GE (InvertFlags cmp) yes no)
10855                 // cond:
10856                 // result: (LE cmp yes no)
10857                 {
10858                         v := b.Control
10859                         if v.Op != OpAMD64InvertFlags {
10860                                 goto end0610f000a6988ee8310307ec2ea138f8
10861                         }
10862                         cmp := v.Args[0]
10863                         yes := b.Succs[0]
10864                         no := b.Succs[1]
10865                         b.Kind = BlockAMD64LE
10866                         b.Control = cmp
10867                         b.Succs[0] = yes
10868                         b.Succs[1] = no
10869                         return true
10870                 }
10871                 goto end0610f000a6988ee8310307ec2ea138f8
10872         end0610f000a6988ee8310307ec2ea138f8:
10873                 ;
10874         case BlockAMD64GT:
10875                 // match: (GT (InvertFlags cmp) yes no)
10876                 // cond:
10877                 // result: (LT cmp yes no)
10878                 {
10879                         v := b.Control
10880                         if v.Op != OpAMD64InvertFlags {
10881                                 goto endf60c0660b6a8aa9565c97fc87f04eb34
10882                         }
10883                         cmp := v.Args[0]
10884                         yes := b.Succs[0]
10885                         no := b.Succs[1]
10886                         b.Kind = BlockAMD64LT
10887                         b.Control = cmp
10888                         b.Succs[0] = yes
10889                         b.Succs[1] = no
10890                         return true
10891                 }
10892                 goto endf60c0660b6a8aa9565c97fc87f04eb34
10893         endf60c0660b6a8aa9565c97fc87f04eb34:
10894                 ;
10895         case BlockIf:
10896                 // match: (If (SETL  cmp) yes no)
10897                 // cond:
10898                 // result: (LT  cmp yes no)
10899                 {
10900                         v := b.Control
10901                         if v.Op != OpAMD64SETL {
10902                                 goto end94277282f4b83f0c035b23711a075801
10903                         }
10904                         cmp := v.Args[0]
10905                         yes := b.Succs[0]
10906                         no := b.Succs[1]
10907                         b.Kind = BlockAMD64LT
10908                         b.Control = cmp
10909                         b.Succs[0] = yes
10910                         b.Succs[1] = no
10911                         return true
10912                 }
10913                 goto end94277282f4b83f0c035b23711a075801
10914         end94277282f4b83f0c035b23711a075801:
10915                 ;
10916                 // match: (If (SETLE cmp) yes no)
10917                 // cond:
10918                 // result: (LE  cmp yes no)
10919                 {
10920                         v := b.Control
10921                         if v.Op != OpAMD64SETLE {
10922                                 goto enda84798dd797927b54a9a2987421b2ba2
10923                         }
10924                         cmp := v.Args[0]
10925                         yes := b.Succs[0]
10926                         no := b.Succs[1]
10927                         b.Kind = BlockAMD64LE
10928                         b.Control = cmp
10929                         b.Succs[0] = yes
10930                         b.Succs[1] = no
10931                         return true
10932                 }
10933                 goto enda84798dd797927b54a9a2987421b2ba2
10934         enda84798dd797927b54a9a2987421b2ba2:
10935                 ;
10936                 // match: (If (SETG  cmp) yes no)
10937                 // cond:
10938                 // result: (GT  cmp yes no)
10939                 {
10940                         v := b.Control
10941                         if v.Op != OpAMD64SETG {
10942                                 goto end3434ef985979cbf394455ab5b559567c
10943                         }
10944                         cmp := v.Args[0]
10945                         yes := b.Succs[0]
10946                         no := b.Succs[1]
10947                         b.Kind = BlockAMD64GT
10948                         b.Control = cmp
10949                         b.Succs[0] = yes
10950                         b.Succs[1] = no
10951                         return true
10952                 }
10953                 goto end3434ef985979cbf394455ab5b559567c
10954         end3434ef985979cbf394455ab5b559567c:
10955                 ;
10956                 // match: (If (SETGE cmp) yes no)
10957                 // cond:
10958                 // result: (GE  cmp yes no)
10959                 {
10960                         v := b.Control
10961                         if v.Op != OpAMD64SETGE {
10962                                 goto endee147d81d8620a5e23cb92bd9f13cf8d
10963                         }
10964                         cmp := v.Args[0]
10965                         yes := b.Succs[0]
10966                         no := b.Succs[1]
10967                         b.Kind = BlockAMD64GE
10968                         b.Control = cmp
10969                         b.Succs[0] = yes
10970                         b.Succs[1] = no
10971                         return true
10972                 }
10973                 goto endee147d81d8620a5e23cb92bd9f13cf8d
10974         endee147d81d8620a5e23cb92bd9f13cf8d:
10975                 ;
10976                 // match: (If (SETEQ cmp) yes no)
10977                 // cond:
10978                 // result: (EQ  cmp yes no)
10979                 {
10980                         v := b.Control
10981                         if v.Op != OpAMD64SETEQ {
10982                                 goto ende7d85ccc850fc3963c50a91df096de17
10983                         }
10984                         cmp := v.Args[0]
10985                         yes := b.Succs[0]
10986                         no := b.Succs[1]
10987                         b.Kind = BlockAMD64EQ
10988                         b.Control = cmp
10989                         b.Succs[0] = yes
10990                         b.Succs[1] = no
10991                         return true
10992                 }
10993                 goto ende7d85ccc850fc3963c50a91df096de17
10994         ende7d85ccc850fc3963c50a91df096de17:
10995                 ;
10996                 // match: (If (SETNE cmp) yes no)
10997                 // cond:
10998                 // result: (NE  cmp yes no)
10999                 {
11000                         v := b.Control
11001                         if v.Op != OpAMD64SETNE {
11002                                 goto endba4b54260ecda1b5731b129c0eb493d0
11003                         }
11004                         cmp := v.Args[0]
11005                         yes := b.Succs[0]
11006                         no := b.Succs[1]
11007                         b.Kind = BlockAMD64NE
11008                         b.Control = cmp
11009                         b.Succs[0] = yes
11010                         b.Succs[1] = no
11011                         return true
11012                 }
11013                 goto endba4b54260ecda1b5731b129c0eb493d0
11014         endba4b54260ecda1b5731b129c0eb493d0:
11015                 ;
11016                 // match: (If (SETB  cmp) yes no)
11017                 // cond:
11018                 // result: (ULT cmp yes no)
11019                 {
11020                         v := b.Control
11021                         if v.Op != OpAMD64SETB {
11022                                 goto endf84eedfcd3f18f5c9c3f3d1045a24330
11023                         }
11024                         cmp := v.Args[0]
11025                         yes := b.Succs[0]
11026                         no := b.Succs[1]
11027                         b.Kind = BlockAMD64ULT
11028                         b.Control = cmp
11029                         b.Succs[0] = yes
11030                         b.Succs[1] = no
11031                         return true
11032                 }
11033                 goto endf84eedfcd3f18f5c9c3f3d1045a24330
11034         endf84eedfcd3f18f5c9c3f3d1045a24330:
11035                 ;
11036                 // match: (If (SETBE cmp) yes no)
11037                 // cond:
11038                 // result: (ULE cmp yes no)
11039                 {
11040                         v := b.Control
11041                         if v.Op != OpAMD64SETBE {
11042                                 goto endfe0178f6f4406945ca8966817d04be60
11043                         }
11044                         cmp := v.Args[0]
11045                         yes := b.Succs[0]
11046                         no := b.Succs[1]
11047                         b.Kind = BlockAMD64ULE
11048                         b.Control = cmp
11049                         b.Succs[0] = yes
11050                         b.Succs[1] = no
11051                         return true
11052                 }
11053                 goto endfe0178f6f4406945ca8966817d04be60
11054         endfe0178f6f4406945ca8966817d04be60:
11055                 ;
11056                 // match: (If (SETA  cmp) yes no)
11057                 // cond:
11058                 // result: (UGT cmp yes no)
11059                 {
11060                         v := b.Control
11061                         if v.Op != OpAMD64SETA {
11062                                 goto end2b5a2d7756bdba01a732bf54d9acdb73
11063                         }
11064                         cmp := v.Args[0]
11065                         yes := b.Succs[0]
11066                         no := b.Succs[1]
11067                         b.Kind = BlockAMD64UGT
11068                         b.Control = cmp
11069                         b.Succs[0] = yes
11070                         b.Succs[1] = no
11071                         return true
11072                 }
11073                 goto end2b5a2d7756bdba01a732bf54d9acdb73
11074         end2b5a2d7756bdba01a732bf54d9acdb73:
11075                 ;
11076                 // match: (If (SETAE cmp) yes no)
11077                 // cond:
11078                 // result: (UGE cmp yes no)
11079                 {
11080                         v := b.Control
11081                         if v.Op != OpAMD64SETAE {
11082                                 goto end9bea9963c3c5dfb97249a5feb8287f94
11083                         }
11084                         cmp := v.Args[0]
11085                         yes := b.Succs[0]
11086                         no := b.Succs[1]
11087                         b.Kind = BlockAMD64UGE
11088                         b.Control = cmp
11089                         b.Succs[0] = yes
11090                         b.Succs[1] = no
11091                         return true
11092                 }
11093                 goto end9bea9963c3c5dfb97249a5feb8287f94
11094         end9bea9963c3c5dfb97249a5feb8287f94:
11095                 ;
11096                 // match: (If (SETGF  cmp) yes no)
11097                 // cond:
11098                 // result: (UGT  cmp yes no)
11099                 {
11100                         v := b.Control
11101                         if v.Op != OpAMD64SETGF {
11102                                 goto enda72d68674cfa26b5982a43756bca6767
11103                         }
11104                         cmp := v.Args[0]
11105                         yes := b.Succs[0]
11106                         no := b.Succs[1]
11107                         b.Kind = BlockAMD64UGT
11108                         b.Control = cmp
11109                         b.Succs[0] = yes
11110                         b.Succs[1] = no
11111                         return true
11112                 }
11113                 goto enda72d68674cfa26b5982a43756bca6767
11114         enda72d68674cfa26b5982a43756bca6767:
11115                 ;
11116                 // match: (If (SETGEF cmp) yes no)
11117                 // cond:
11118                 // result: (UGE  cmp yes no)
11119                 {
11120                         v := b.Control
11121                         if v.Op != OpAMD64SETGEF {
11122                                 goto endccc171c1d66dd60ac0275d1f78259315
11123                         }
11124                         cmp := v.Args[0]
11125                         yes := b.Succs[0]
11126                         no := b.Succs[1]
11127                         b.Kind = BlockAMD64UGE
11128                         b.Control = cmp
11129                         b.Succs[0] = yes
11130                         b.Succs[1] = no
11131                         return true
11132                 }
11133                 goto endccc171c1d66dd60ac0275d1f78259315
11134         endccc171c1d66dd60ac0275d1f78259315:
11135                 ;
11136                 // match: (If (SETEQF cmp) yes no)
11137                 // cond:
11138                 // result: (EQF  cmp yes no)
11139                 {
11140                         v := b.Control
11141                         if v.Op != OpAMD64SETEQF {
11142                                 goto end58cb74d05266a79003ebdd733afb66fa
11143                         }
11144                         cmp := v.Args[0]
11145                         yes := b.Succs[0]
11146                         no := b.Succs[1]
11147                         b.Kind = BlockAMD64EQF
11148                         b.Control = cmp
11149                         b.Succs[0] = yes
11150                         b.Succs[1] = no
11151                         return true
11152                 }
11153                 goto end58cb74d05266a79003ebdd733afb66fa
11154         end58cb74d05266a79003ebdd733afb66fa:
11155                 ;
11156                 // match: (If (SETNEF cmp) yes no)
11157                 // cond:
11158                 // result: (EQF  cmp yes no)
11159                 {
11160                         v := b.Control
11161                         if v.Op != OpAMD64SETNEF {
11162                                 goto endfe25939ca97349543bc2d2ce4f97ba41
11163                         }
11164                         cmp := v.Args[0]
11165                         yes := b.Succs[0]
11166                         no := b.Succs[1]
11167                         b.Kind = BlockAMD64EQF
11168                         b.Control = cmp
11169                         b.Succs[0] = yes
11170                         b.Succs[1] = no
11171                         return true
11172                 }
11173                 goto endfe25939ca97349543bc2d2ce4f97ba41
11174         endfe25939ca97349543bc2d2ce4f97ba41:
11175                 ;
11176                 // match: (If cond yes no)
11177                 // cond:
11178                 // result: (NE (TESTB cond cond) yes no)
11179                 {
11180                         v := b.Control
11181                         cond := v
11182                         yes := b.Succs[0]
11183                         no := b.Succs[1]
11184                         b.Kind = BlockAMD64NE
11185                         v0 := b.NewValue0(v.Line, OpAMD64TESTB, TypeInvalid)
11186                         v0.AddArg(cond)
11187                         v0.AddArg(cond)
11188                         v0.Type = TypeFlags
11189                         b.Control = v0
11190                         b.Succs[0] = yes
11191                         b.Succs[1] = no
11192                         return true
11193                 }
11194                 goto end5bdbb8d5ea62ff2a76dccf3f9e89d94d
11195         end5bdbb8d5ea62ff2a76dccf3f9e89d94d:
11196                 ;
11197         case BlockAMD64LE:
11198                 // match: (LE (InvertFlags cmp) yes no)
11199                 // cond:
11200                 // result: (GE cmp yes no)
11201                 {
11202                         v := b.Control
11203                         if v.Op != OpAMD64InvertFlags {
11204                                 goto end0d49d7d087fe7578e8015cf13dae37e3
11205                         }
11206                         cmp := v.Args[0]
11207                         yes := b.Succs[0]
11208                         no := b.Succs[1]
11209                         b.Kind = BlockAMD64GE
11210                         b.Control = cmp
11211                         b.Succs[0] = yes
11212                         b.Succs[1] = no
11213                         return true
11214                 }
11215                 goto end0d49d7d087fe7578e8015cf13dae37e3
11216         end0d49d7d087fe7578e8015cf13dae37e3:
11217                 ;
11218         case BlockAMD64LT:
11219                 // match: (LT (InvertFlags cmp) yes no)
11220                 // cond:
11221                 // result: (GT cmp yes no)
11222                 {
11223                         v := b.Control
11224                         if v.Op != OpAMD64InvertFlags {
11225                                 goto end6a408cde0fee0ae7b7da0443c8d902bf
11226                         }
11227                         cmp := v.Args[0]
11228                         yes := b.Succs[0]
11229                         no := b.Succs[1]
11230                         b.Kind = BlockAMD64GT
11231                         b.Control = cmp
11232                         b.Succs[0] = yes
11233                         b.Succs[1] = no
11234                         return true
11235                 }
11236                 goto end6a408cde0fee0ae7b7da0443c8d902bf
11237         end6a408cde0fee0ae7b7da0443c8d902bf:
11238                 ;
11239         case BlockAMD64NE:
11240                 // match: (NE (TESTB (SETL  cmp)) yes no)
11241                 // cond:
11242                 // result: (LT  cmp yes no)
11243                 {
11244                         v := b.Control
11245                         if v.Op != OpAMD64TESTB {
11246                                 goto end0b9ca165d6b395de676eebef94bc62f7
11247                         }
11248                         if v.Args[0].Op != OpAMD64SETL {
11249                                 goto end0b9ca165d6b395de676eebef94bc62f7
11250                         }
11251                         cmp := v.Args[0].Args[0]
11252                         yes := b.Succs[0]
11253                         no := b.Succs[1]
11254                         b.Kind = BlockAMD64LT
11255                         b.Control = cmp
11256                         b.Succs[0] = yes
11257                         b.Succs[1] = no
11258                         return true
11259                 }
11260                 goto end0b9ca165d6b395de676eebef94bc62f7
11261         end0b9ca165d6b395de676eebef94bc62f7:
11262                 ;
11263                 // match: (NE (TESTB (SETLE cmp)) yes no)
11264                 // cond:
11265                 // result: (LE  cmp yes no)
11266                 {
11267                         v := b.Control
11268                         if v.Op != OpAMD64TESTB {
11269                                 goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
11270                         }
11271                         if v.Args[0].Op != OpAMD64SETLE {
11272                                 goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
11273                         }
11274                         cmp := v.Args[0].Args[0]
11275                         yes := b.Succs[0]
11276                         no := b.Succs[1]
11277                         b.Kind = BlockAMD64LE
11278                         b.Control = cmp
11279                         b.Succs[0] = yes
11280                         b.Succs[1] = no
11281                         return true
11282                 }
11283                 goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
11284         endaaba0ee4d0ff8c66a1c3107d2a14c4bc:
11285                 ;
11286                 // match: (NE (TESTB (SETG  cmp)) yes no)
11287                 // cond:
11288                 // result: (GT  cmp yes no)
11289                 {
11290                         v := b.Control
11291                         if v.Op != OpAMD64TESTB {
11292                                 goto end1b689463137526b36ba9ceed1e76e512
11293                         }
11294                         if v.Args[0].Op != OpAMD64SETG {
11295                                 goto end1b689463137526b36ba9ceed1e76e512
11296                         }
11297                         cmp := v.Args[0].Args[0]
11298                         yes := b.Succs[0]
11299                         no := b.Succs[1]
11300                         b.Kind = BlockAMD64GT
11301                         b.Control = cmp
11302                         b.Succs[0] = yes
11303                         b.Succs[1] = no
11304                         return true
11305                 }
11306                 goto end1b689463137526b36ba9ceed1e76e512
11307         end1b689463137526b36ba9ceed1e76e512:
11308                 ;
11309                 // match: (NE (TESTB (SETGE cmp)) yes no)
11310                 // cond:
11311                 // result: (GE  cmp yes no)
11312                 {
11313                         v := b.Control
11314                         if v.Op != OpAMD64TESTB {
11315                                 goto end99eefee595c658b997f41577ed853c2e
11316                         }
11317                         if v.Args[0].Op != OpAMD64SETGE {
11318                                 goto end99eefee595c658b997f41577ed853c2e
11319                         }
11320                         cmp := v.Args[0].Args[0]
11321                         yes := b.Succs[0]
11322                         no := b.Succs[1]
11323                         b.Kind = BlockAMD64GE
11324                         b.Control = cmp
11325                         b.Succs[0] = yes
11326                         b.Succs[1] = no
11327                         return true
11328                 }
11329                 goto end99eefee595c658b997f41577ed853c2e
11330         end99eefee595c658b997f41577ed853c2e:
11331                 ;
11332                 // match: (NE (TESTB (SETEQ cmp)) yes no)
11333                 // cond:
11334                 // result: (EQ  cmp yes no)
11335                 {
11336                         v := b.Control
11337                         if v.Op != OpAMD64TESTB {
11338                                 goto end371b67d3d63e9b92d848b09c3324e8b9
11339                         }
11340                         if v.Args[0].Op != OpAMD64SETEQ {
11341                                 goto end371b67d3d63e9b92d848b09c3324e8b9
11342                         }
11343                         cmp := v.Args[0].Args[0]
11344                         yes := b.Succs[0]
11345                         no := b.Succs[1]
11346                         b.Kind = BlockAMD64EQ
11347                         b.Control = cmp
11348                         b.Succs[0] = yes
11349                         b.Succs[1] = no
11350                         return true
11351                 }
11352                 goto end371b67d3d63e9b92d848b09c3324e8b9
11353         end371b67d3d63e9b92d848b09c3324e8b9:
11354                 ;
11355                 // match: (NE (TESTB (SETNE cmp)) yes no)
11356                 // cond:
11357                 // result: (NE  cmp yes no)
11358                 {
11359                         v := b.Control
11360                         if v.Op != OpAMD64TESTB {
11361                                 goto endd245f2aac2191d32e57cd2e321daa453
11362                         }
11363                         if v.Args[0].Op != OpAMD64SETNE {
11364                                 goto endd245f2aac2191d32e57cd2e321daa453
11365                         }
11366                         cmp := v.Args[0].Args[0]
11367                         yes := b.Succs[0]
11368                         no := b.Succs[1]
11369                         b.Kind = BlockAMD64NE
11370                         b.Control = cmp
11371                         b.Succs[0] = yes
11372                         b.Succs[1] = no
11373                         return true
11374                 }
11375                 goto endd245f2aac2191d32e57cd2e321daa453
11376         endd245f2aac2191d32e57cd2e321daa453:
11377                 ;
11378                 // match: (NE (TESTB (SETB  cmp)) yes no)
11379                 // cond:
11380                 // result: (ULT cmp yes no)
11381                 {
11382                         v := b.Control
11383                         if v.Op != OpAMD64TESTB {
11384                                 goto end90c4bec851e734d37457d611b1a5ff28
11385                         }
11386                         if v.Args[0].Op != OpAMD64SETB {
11387                                 goto end90c4bec851e734d37457d611b1a5ff28
11388                         }
11389                         cmp := v.Args[0].Args[0]
11390                         yes := b.Succs[0]
11391                         no := b.Succs[1]
11392                         b.Kind = BlockAMD64ULT
11393                         b.Control = cmp
11394                         b.Succs[0] = yes
11395                         b.Succs[1] = no
11396                         return true
11397                 }
11398                 goto end90c4bec851e734d37457d611b1a5ff28
11399         end90c4bec851e734d37457d611b1a5ff28:
11400                 ;
11401                 // match: (NE (TESTB (SETBE cmp)) yes no)
11402                 // cond:
11403                 // result: (ULE cmp yes no)
11404                 {
11405                         v := b.Control
11406                         if v.Op != OpAMD64TESTB {
11407                                 goto end3a68a28114e9b89ee0708823386bc1ee
11408                         }
11409                         if v.Args[0].Op != OpAMD64SETBE {
11410                                 goto end3a68a28114e9b89ee0708823386bc1ee
11411                         }
11412                         cmp := v.Args[0].Args[0]
11413                         yes := b.Succs[0]
11414                         no := b.Succs[1]
11415                         b.Kind = BlockAMD64ULE
11416                         b.Control = cmp
11417                         b.Succs[0] = yes
11418                         b.Succs[1] = no
11419                         return true
11420                 }
11421                 goto end3a68a28114e9b89ee0708823386bc1ee
11422         end3a68a28114e9b89ee0708823386bc1ee:
11423                 ;
11424                 // match: (NE (TESTB (SETA  cmp)) yes no)
11425                 // cond:
11426                 // result: (UGT cmp yes no)
11427                 {
11428                         v := b.Control
11429                         if v.Op != OpAMD64TESTB {
11430                                 goto end16496f57185756e960d536b057c776c0
11431                         }
11432                         if v.Args[0].Op != OpAMD64SETA {
11433                                 goto end16496f57185756e960d536b057c776c0
11434                         }
11435                         cmp := v.Args[0].Args[0]
11436                         yes := b.Succs[0]
11437                         no := b.Succs[1]
11438                         b.Kind = BlockAMD64UGT
11439                         b.Control = cmp
11440                         b.Succs[0] = yes
11441                         b.Succs[1] = no
11442                         return true
11443                 }
11444                 goto end16496f57185756e960d536b057c776c0
11445         end16496f57185756e960d536b057c776c0:
11446                 ;
11447                 // match: (NE (TESTB (SETAE cmp)) yes no)
11448                 // cond:
11449                 // result: (UGE cmp yes no)
11450                 {
11451                         v := b.Control
11452                         if v.Op != OpAMD64TESTB {
11453                                 goto endbd122fd599aeb9e60881a0fa735e2fde
11454                         }
11455                         if v.Args[0].Op != OpAMD64SETAE {
11456                                 goto endbd122fd599aeb9e60881a0fa735e2fde
11457                         }
11458                         cmp := v.Args[0].Args[0]
11459                         yes := b.Succs[0]
11460                         no := b.Succs[1]
11461                         b.Kind = BlockAMD64UGE
11462                         b.Control = cmp
11463                         b.Succs[0] = yes
11464                         b.Succs[1] = no
11465                         return true
11466                 }
11467                 goto endbd122fd599aeb9e60881a0fa735e2fde
11468         endbd122fd599aeb9e60881a0fa735e2fde:
11469                 ;
11470                 // match: (NE (TESTB (SETGF  cmp)) yes no)
11471                 // cond:
11472                 // result: (UGT  cmp yes no)
11473                 {
11474                         v := b.Control
11475                         if v.Op != OpAMD64TESTB {
11476                                 goto endb2499521f7f351e24757f8c918c3598e
11477                         }
11478                         if v.Args[0].Op != OpAMD64SETGF {
11479                                 goto endb2499521f7f351e24757f8c918c3598e
11480                         }
11481                         cmp := v.Args[0].Args[0]
11482                         yes := b.Succs[0]
11483                         no := b.Succs[1]
11484                         b.Kind = BlockAMD64UGT
11485                         b.Control = cmp
11486                         b.Succs[0] = yes
11487                         b.Succs[1] = no
11488                         return true
11489                 }
11490                 goto endb2499521f7f351e24757f8c918c3598e
11491         endb2499521f7f351e24757f8c918c3598e:
11492                 ;
11493                 // match: (NE (TESTB (SETGEF cmp)) yes no)
11494                 // cond:
11495                 // result: (UGE  cmp yes no)
11496                 {
11497                         v := b.Control
11498                         if v.Op != OpAMD64TESTB {
11499                                 goto end20461774babea665c4ca7c4f790a7209
11500                         }
11501                         if v.Args[0].Op != OpAMD64SETGEF {
11502                                 goto end20461774babea665c4ca7c4f790a7209
11503                         }
11504                         cmp := v.Args[0].Args[0]
11505                         yes := b.Succs[0]
11506                         no := b.Succs[1]
11507                         b.Kind = BlockAMD64UGE
11508                         b.Control = cmp
11509                         b.Succs[0] = yes
11510                         b.Succs[1] = no
11511                         return true
11512                 }
11513                 goto end20461774babea665c4ca7c4f790a7209
11514         end20461774babea665c4ca7c4f790a7209:
11515                 ;
11516                 // match: (NE (TESTB (SETEQF cmp)) yes no)
11517                 // cond:
11518                 // result: (EQF  cmp yes no)
11519                 {
11520                         v := b.Control
11521                         if v.Op != OpAMD64TESTB {
11522                                 goto end236616ef13d489b78736cda7bcc1d168
11523                         }
11524                         if v.Args[0].Op != OpAMD64SETEQF {
11525                                 goto end236616ef13d489b78736cda7bcc1d168
11526                         }
11527                         cmp := v.Args[0].Args[0]
11528                         yes := b.Succs[0]
11529                         no := b.Succs[1]
11530                         b.Kind = BlockAMD64EQF
11531                         b.Control = cmp
11532                         b.Succs[0] = yes
11533                         b.Succs[1] = no
11534                         return true
11535                 }
11536                 goto end236616ef13d489b78736cda7bcc1d168
11537         end236616ef13d489b78736cda7bcc1d168:
11538                 ;
11539                 // match: (NE (TESTB (SETNEF cmp)) yes no)
11540                 // cond:
11541                 // result: (NEF  cmp yes no)
11542                 {
11543                         v := b.Control
11544                         if v.Op != OpAMD64TESTB {
11545                                 goto endc992f3c266b16cb5f6aa98faa8f55600
11546                         }
11547                         if v.Args[0].Op != OpAMD64SETNEF {
11548                                 goto endc992f3c266b16cb5f6aa98faa8f55600
11549                         }
11550                         cmp := v.Args[0].Args[0]
11551                         yes := b.Succs[0]
11552                         no := b.Succs[1]
11553                         b.Kind = BlockAMD64NEF
11554                         b.Control = cmp
11555                         b.Succs[0] = yes
11556                         b.Succs[1] = no
11557                         return true
11558                 }
11559                 goto endc992f3c266b16cb5f6aa98faa8f55600
11560         endc992f3c266b16cb5f6aa98faa8f55600:
11561                 ;
11562                 // match: (NE (InvertFlags cmp) yes no)
11563                 // cond:
11564                 // result: (NE cmp yes no)
11565                 {
11566                         v := b.Control
11567                         if v.Op != OpAMD64InvertFlags {
11568                                 goto end713001aba794e50b582fbff930e110af
11569                         }
11570                         cmp := v.Args[0]
11571                         yes := b.Succs[0]
11572                         no := b.Succs[1]
11573                         b.Kind = BlockAMD64NE
11574                         b.Control = cmp
11575                         b.Succs[0] = yes
11576                         b.Succs[1] = no
11577                         return true
11578                 }
11579                 goto end713001aba794e50b582fbff930e110af
11580         end713001aba794e50b582fbff930e110af:
11581                 ;
11582         case BlockAMD64UGE:
11583                 // match: (UGE (InvertFlags cmp) yes no)
11584                 // cond:
11585                 // result: (ULE cmp yes no)
11586                 {
11587                         v := b.Control
11588                         if v.Op != OpAMD64InvertFlags {
11589                                 goto ende3e4ddc183ca1a46598b11c2d0d13966
11590                         }
11591                         cmp := v.Args[0]
11592                         yes := b.Succs[0]
11593                         no := b.Succs[1]
11594                         b.Kind = BlockAMD64ULE
11595                         b.Control = cmp
11596                         b.Succs[0] = yes
11597                         b.Succs[1] = no
11598                         return true
11599                 }
11600                 goto ende3e4ddc183ca1a46598b11c2d0d13966
11601         ende3e4ddc183ca1a46598b11c2d0d13966:
11602                 ;
11603         case BlockAMD64UGT:
11604                 // match: (UGT (InvertFlags cmp) yes no)
11605                 // cond:
11606                 // result: (ULT cmp yes no)
11607                 {
11608                         v := b.Control
11609                         if v.Op != OpAMD64InvertFlags {
11610                                 goto end49818853af2e5251175d06c62768cae7
11611                         }
11612                         cmp := v.Args[0]
11613                         yes := b.Succs[0]
11614                         no := b.Succs[1]
11615                         b.Kind = BlockAMD64ULT
11616                         b.Control = cmp
11617                         b.Succs[0] = yes
11618                         b.Succs[1] = no
11619                         return true
11620                 }
11621                 goto end49818853af2e5251175d06c62768cae7
11622         end49818853af2e5251175d06c62768cae7:
11623                 ;
11624         case BlockAMD64ULE:
11625                 // match: (ULE (InvertFlags cmp) yes no)
11626                 // cond:
11627                 // result: (UGE cmp yes no)
11628                 {
11629                         v := b.Control
11630                         if v.Op != OpAMD64InvertFlags {
11631                                 goto endd6698aac0d67261293b558c95ea17b4f
11632                         }
11633                         cmp := v.Args[0]
11634                         yes := b.Succs[0]
11635                         no := b.Succs[1]
11636                         b.Kind = BlockAMD64UGE
11637                         b.Control = cmp
11638                         b.Succs[0] = yes
11639                         b.Succs[1] = no
11640                         return true
11641                 }
11642                 goto endd6698aac0d67261293b558c95ea17b4f
11643         endd6698aac0d67261293b558c95ea17b4f:
11644                 ;
11645         case BlockAMD64ULT:
11646                 // match: (ULT (InvertFlags cmp) yes no)
11647                 // cond:
11648                 // result: (UGT cmp yes no)
11649                 {
11650                         v := b.Control
11651                         if v.Op != OpAMD64InvertFlags {
11652                                 goto end35105dbc9646f02577167e45ae2f2fd2
11653                         }
11654                         cmp := v.Args[0]
11655                         yes := b.Succs[0]
11656                         no := b.Succs[1]
11657                         b.Kind = BlockAMD64UGT
11658                         b.Control = cmp
11659                         b.Succs[0] = yes
11660                         b.Succs[1] = no
11661                         return true
11662                 }
11663                 goto end35105dbc9646f02577167e45ae2f2fd2
11664         end35105dbc9646f02577167e45ae2f2fd2:
11665         }
11666         return false
11667 }